sms4_ori_test_00.v

用Verilog实现国内第一个商用密码算法SMS4的加密和解密。

//synopsys translate_off
`include "timescale.v"
//synopsys translate_on

module sms4_ori_test_00;

reg  [0:127] key_in;
reg  [0:127] data_in;
reg  start;
reg  enc;
reg  din_vld;
reg  [0:1] key_vld;
reg  clk;
reg  reset;

wire [0:127] key_out;
wire [0:127] data_out;
wire busy;
wire dout_vld;
wire key_str;

sms4_ori  sms4_ori_test(
                        .key_out(key_out),
                        .data_out(data_out),
                        .busy(busy),
                        .dout_vld(dout_vld),
                        .key_str(key_str),
                        .key_in(key_in),
                        .data_in(data_in),
                        .start(start),
                        .enc(enc),
                        .din_vld(din_vld),
                        .key_vld(key_vld),
                        .clk(clk),
                        .reset(reset)
                        );


initial 
 begin
   data_in=128'h404cd32180dfa2c34f77b017c3f2b4d8;
   key_in=128'h0123456789abcdeffedcba9876543210;
   reset=0;
   clk=0;
   $display("the input data is : %h", data_in);
   $display("the input key is : %h", key_in);
   #4 reset   = 1;
   #4 enc     = 0;
      start   = 1;
      din_vld = 1;
      key_vld = 2'b01;
   #4 key_vld = 2'b11;
   #130 din_vld = 0;
   #300
   $display("The output key is :%h", key_out);
   $display("The encrypted data is :%h", data_out);
   #10
   data_in=128'h404cd32180dfa2c34f77b017c3f2b4d8;
   key_in=128'h0123456789abcdeffedcba9876543210;
   $display("the input data is : %h", data_in);
   $display("the input key is : %h", key_in);
   #4 enc     = 1;
   #4 enc     = 0;
      din_vld = 1;
      key_vld = 2'b01;
   #4 key_vld = 2'b11;
   #130 din_vld = 0;
   #300
   $display("The output key is :%h", key_out);
   $display("The encrypted data is :%h", data_out);
   $stop;
  end
  
always #2 clk=~clk;

endmodule