alu.hif

vhd语言

HIF003
--
-- Copyright (C) 1988-2001 Altera Corporation
-- Any megafunction design, and related net list (encrypted or decrypted),
-- support information, device programming or simulation file, and any other
-- associated documentation or information provided by Altera or a partner
-- under Altera's Megafunction Partnership Program may be used only to
-- program PLD devices (but not masked PLD devices) from Altera.  Any other
-- use of such megafunction design, net list, support information, device
-- programming or simulation file, or any other related documentation or
-- information is prohibited for any other purpose, including, but not
-- limited to modification, reverse engineering, de-compiling, or use with
-- any other silicon devices, unless such use is explicitly licensed under
-- a separate agreement with Altera or a megafunction partner.  Title to
-- the intellectual property, including patents, copyrights, trademarks,
-- trade secrets, or maskworks, embodied in any such megafunction design,
-- net list, support information, device programming or simulation file, or
-- any other related documentation or information provided by Altera or a
-- megafunction partner, remains with Altera, the megafunction partner, or
-- their respective licensors.  No other licenses, including any licenses
-- needed under any third party's intellectual property, are provided herein.
--
-- Warning: do not edit this file!
--
FILES
{
	f74163.gdf
	{
		f74163 [] []
		{
			9 [] [];
		}
	}
	74163.tdf
	{
		74163 [DEVICE_FAMILY,USE_LPM_FOR_AHDL_OPERATORS] [aglobal.inc]
		{
			8 [DEVICE_FAMILY=FLEX10K,USE_LPM_FOR_AHDL_OPERATORS=OFF] [LDN,CLRN,CLK,ENP,RCO,ENT,D,C,B,QD,QC,QB,QA,A];
		}
	}
	74374.gdf
	{
		74374 [] []
		{
			2 [] [];
		}
	}
	74273.gdf
	{
		74273 [] []
		{
			3 [] [];
		}
	}
	74257.gdf
	{
		74257 [] []
		{
			4 [] [];
		}
	}
	74181.gdf
	{
		74181 [] []
		{
			5 [] [];
		}
	}
	74139.gdf
	{
		74139 [] []
		{
			10 [] [];
		}
	}
	74244.gdf
	{
		74244 [] []
		{
			1 [] [];
		}
	}
	lpm_ram_io.tdf
	{
		lpm_ram_io [DEVICE_FAMILY,LPM_FILE=NO_FILE,LPM_OUTDATA=REGISTERED,LPM_ADDRESS_CONTROL=REGISTERED,LPM_INDATA=REGISTERED,LPM_NUMWORDS,LPM_WIDTHAD,LPM_WIDTH,USE_LPM_FOR_AHDL_OPERATORS] [altram.inc,lpm_mux.inc,lpm_decode.inc,aglobal.inc]
		{
			24 [DEVICE_FAMILY=FLEX10K,LPM_FILE=NO_FILE,LPM_OUTDATA=UNREGISTERED,LPM_ADDRESS_CONTROL=REGISTERED,LPM_INDATA=REGISTERED,LPM_NUMWORDS=256,LPM_WIDTHAD=8,LPM_WIDTH=8,USE_LPM_FOR_AHDL_OPERATORS=OFF] [dio1,dio2,dio3,dio4,dio5,dio6,dio7,outenab,we,inclock,memenab,address0,address1,address2,address3,address4,address5,address6,address7];
			17 [USE_LPM_FOR_AHDL_OPERATORS=OFF,LPM_WIDTH=8,LPM_WIDTHAD=8,LPM_NUMWORDS=256,LPM_INDATA=REGISTERED,LPM_ADDRESS_CONTROL=REGISTERED,LPM_OUTDATA=UNREGISTERED,LPM_FILE="c:\moxingji\file.mif",DEVICE_FAMILY=FLEX10K] [address7,address6,address5,address4,address3,address2,address1,address0,memenab,inclock,we,outenab,dio7,dio6,dio5,dio4,dio3,dio2,dio1,dio0];
			22 [USE_LPM_FOR_AHDL_OPERATORS=OFF,LPM_WIDTH=8,LPM_WIDTHAD=8,LPM_NUMWORDS=256,LPM_INDATA=REGISTERED,LPM_ADDRESS_CONTROL=REGISTERED,LPM_OUTDATA=UNREGISTERED,LPM_FILE=NO_FILE,DEVICE_FAMILY=FLEX10K] [address7,address6,address5,address4,address3,address2,address1,address0,memenab,inclock,we,outenab,dio7,dio6,dio5,dio4,dio3,dio2,dio1,dio0];
		}
	}
	74373.gdf
	{
		74373 [] []
		{
			16 [] [];
		}
	}
	74161.tdf
	{
		74161 [USE_LPM_FOR_AHDL_OPERATORS,DEVICE_FAMILY] [aglobal.inc]
		{
			13 [USE_LPM_FOR_AHDL_OPERATORS=OFF,DEVICE_FAMILY=FLEX10K] [LDN,A,QD,QC,QB,QA,ENT,D,C,B,RCO,CLRN,CLK,ENP];
			15 [USE_LPM_FOR_AHDL_OPERATORS=OFF,DEVICE_FAMILY=FLEX10K] [LDN,A,QD,QC,QB,QA,ENT,D,C,B,CLRN,CLK,ENP];
		}
	}
	f74161.gdf
	{
		f74161 [] []
		{
			14 [] [];
		}
	}
	altram.tdf
	{
		altram [USE_LPM_FOR_AHDL_OPERATORS,WIDTH,AD_WIDTH,NUMWORDS,FILE=NO_FILE,REGISTERINPUTMODE=DEFAULT,USE_EAB=ON,DEVICE_FAMILY] [aglobal.inc,lpm_mux.inc,lpm_decode.inc,memmodes.inc]
		{
			18 [USE_LPM_FOR_AHDL_OPERATORS=OFF,WIDTH=8,AD_WIDTH=8,NUMWORDS=256,FILE="c:\moxingji\file.mif",REGISTERINPUTMODE=ALL,USE_EAB=ON,DEVICE_FAMILY=FLEX10K] [ClockI,Address0,Address1,Address2,Address3,Address4,Address5,Address6,Address7,Data0,Data1,Data2,Data3,Data4,Data5,Data6,Data7,WE,Q0,Q1,Q2,Q3,Q4,Q5,Q6,Q7];
			23 [USE_LPM_FOR_AHDL_OPERATORS=OFF,WIDTH=8,AD_WIDTH=8,NUMWORDS=256,FILE=NO_FILE,REGISTERINPUTMODE=ALL,USE_EAB=ON,DEVICE_FAMILY=FLEX10K] [ClockI,Address0,Address1,Address2,Address3,Address4,Address5,Address6,Address7,Data0,Data1,Data2,Data3,Data4,Data5,Data6,Data7,WE,Q0,Q1,Q2,Q3,Q4,Q5,Q6,Q7];
		}
	}
	2sel1.gdf
	{
		2sel1 [] []
		{
			20 [] [];
		}
	}
	multi.vhd
	{
		multi [] [U1147235.DLS,U7449008.DLS,U2043679.DLS]
		{
			11 [] [];
		}
		ONE_BIT_ADDER [] []
		{
			19 [] [];
		}
	}
	cdu16.gdf
	{
		cdu16 [] []
		{
			7 [] [];
		}
	}
	cdu.gdf
	{
		cdu [] []
		{
			6 [] [];
		}
	}
	4sel1.gdf
	{
		4sel1 [] []
		{
			21 [] [];
		}
	}
	alu.gdf
	{
		alu [] []
		{
			0 [] [];
		}
	}
}
TREE
{
	alu::(0,0):(0): alu.gdf
	{
		74373::(0,0):(331): 74373.gdf;
		2sel1::(0,0):(261): 2sel1.gdf;
		lpm_ram_io::(0,0):(145): lpm_ram_io.tdf
		{
			altram:23:(66,5):(48,sram): altram.tdf;
		}
		74161::(0,0):(134): 74161.tdf
		{
			f74161:14:(33,3):(41,sub): f74161.gdf;
		}
		74161::(0,0):(135): 74161.tdf
		{
			f74161:14:(33,3):(41,sub): f74161.gdf;
		}
		multi::(0,0):(94): multi.vhd
		{
			one_bit_adder:19:(104,9):(2382,U_4_5): multi.vhd;
			one_bit_adder:19:(103,9):(2381,U_4_4): multi.vhd;
			one_bit_adder:19:(102,9):(2380,U_4_3): multi.vhd;
			one_bit_adder:19:(101,9):(2379,U_4_2): multi.vhd;
			one_bit_adder:19:(100,9):(2378,U_4_1): multi.vhd;
			one_bit_adder:19:(99,9):(2377,U_4_0): multi.vhd;
			one_bit_adder:19:(97,9):(2376,U_3_5): multi.vhd;
			one_bit_adder:19:(96,9):(2375,U_3_4): multi.vhd;
			one_bit_adder:19:(95,9):(2374,U_3_3): multi.vhd;
			one_bit_adder:19:(94,9):(2373,U_3_2): multi.vhd;
			one_bit_adder:19:(93,9):(2372,U_3_1): multi.vhd;
			one_bit_adder:19:(92,9):(2371,U_3_0): multi.vhd;
			one_bit_adder:19:(90,9):(2370,U_2_5): multi.vhd;
			one_bit_adder:19:(89,9):(2369,U_2_4): multi.vhd;
			one_bit_adder:19:(88,9):(2368,U_2_3): multi.vhd;
			one_bit_adder:19:(87,9):(2367,U_2_2): multi.vhd;
			one_bit_adder:19:(86,9):(2366,U_2_1): multi.vhd;
			one_bit_adder:19:(85,9):(2365,U_2_0): multi.vhd;
			one_bit_adder:19:(83,9):(2364,U_1_5): multi.vhd;
			one_bit_adder:19:(82,9):(2363,U_1_4): multi.vhd;
			one_bit_adder:19:(81,9):(2362,U_1_3): multi.vhd;
			one_bit_adder:19:(80,9):(2361,U_1_2): multi.vhd;
			one_bit_adder:19:(79,9):(2360,U_1_1): multi.vhd;
			one_bit_adder:19:(78,9):(2359,U_1_0): multi.vhd;
			one_bit_adder:19:(76,9):(2358,U_0_5): multi.vhd;
			one_bit_adder:19:(75,9):(2357,U_0_4): multi.vhd;
			one_bit_adder:19:(74,9):(2356,U_0_3): multi.vhd;
			one_bit_adder:19:(73,9):(2355,U_0_2): multi.vhd;
			one_bit_adder:19:(72,9):(2354,U_0_1): multi.vhd;
			one_bit_adder:19:(71,9):(2353,U_0_0): multi.vhd;
		}
		cdu::(0,0):(12): cdu.gdf
		{
			cdu16:7:(0,0):(1): cdu16.gdf
			{
				74163:8:(0,0):(1): 74163.tdf
				{
					f74163:9:(33,3):(41,sub): f74163.gdf;
				}
			}
			cdu16:7:(0,0):(2): cdu16.gdf
			{
				74163:8:(0,0):(1): 74163.tdf
				{
					f74163:9:(33,3):(41,sub): f74163.gdf;
				}
			}
		}
		74181::(0,0):(1): 74181.gdf;
		74181::(0,0):(2): 74181.gdf;
		74257::(0,0):(3): 74257.gdf;
		74257::(0,0):(4): 74257.gdf;
		74273::(0,0):(5): 74273.gdf;
		74273::(0,0):(6): 74273.gdf;
		74273::(0,0):(141): 74273.gdf;
		74374::(0,0):(7): 74374.gdf;
		74374::(0,0):(8): 74374.gdf;
		74374::(0,0):(9): 74374.gdf;
		74374::(0,0):(10): 74374.gdf;
		74244::(0,0):(106): 74244.gdf;
		74244::(0,0):(119): 74244.gdf;
		74244::(0,0):(11): 74244.gdf;
		74244::(0,0):(142): 74244.gdf;
		4sel1::(0,0):(293): 4sel1.gdf;
	}
}