sdr_top.prd

来自「使用FPGA做SDRAM控制器」· PRD 代码 · 共 14 行

#-- Synplicity, Inc.
#-- Version 7.7       
#-- Project file E:\zhangmai\WORK\ip_porting\sdram_controller_xp\synthesis\xm\synplicity\sdr_top.prd
#-- Written on Wed Jan 19 14:09:57 2005

#
### Watch Implementation type ###
#
watch_impl -active
#
### Watch Implementation properties ###
#
watch_prop -clear