uart.plg

UART 串口程序

@P:  Worst Slack : -2.986
@P:  rcvr|clkdiv_inferred_clock[3] - Estimated Frequency : 203.8 MHz
@P:  rcvr|clkdiv_inferred_clock[3] - Requested Frequency : 200.0 MHz
@P:  rcvr|clkdiv_inferred_clock[3] - Estimated Period : 4.907
@P:  rcvr|clkdiv_inferred_clock[3] - Requested Period : 5.000
@P:  rcvr|clkdiv_inferred_clock[3] - Slack : 0.093
@P:  txmit|clkdiv_inferred_clock[3] - Estimated Frequency : 91.1 MHz
@P:  txmit|clkdiv_inferred_clock[3] - Requested Frequency : 200.0 MHz
@P:  txmit|clkdiv_inferred_clock[3] - Estimated Period : 10.972
@P:  txmit|clkdiv_inferred_clock[3] - Requested Period : 5.000
@P:  txmit|clkdiv_inferred_clock[3] - Slack : -2.986
@P:  uart|clk16x - Estimated Frequency : 203.8 MHz
@P:  uart|clk16x - Requested Frequency : 200.0 MHz
@P:  uart|clk16x - Estimated Period : 4.907
@P:  uart|clk16x - Requested Period : 5.000
@P:  uart|clk16x - Slack : 0.093
@P:  uart|wrn - Estimated Frequency : 397.9 MHz
@P:  uart|wrn - Requested Frequency : 200.0 MHz
@P:  uart|wrn - Estimated Period : 2.513
@P:  uart|wrn - Requested Period : 5.000
@P:  uart|wrn - Slack : 2.487
@P:  System - Estimated Frequency : 169.2 MHz
@P:  System - Requested Frequency : 200.0 MHz
@P:  System - Estimated Period : 5.909
@P:  System - Requested Period : 5.000
@P:  System - Slack : -0.909
@P:  CPU Time : 0h:00m:02s