keyboard.tan.qmsg

矩阵键盘的vhdl编程,非常的实用,带有去抖动

{ "Info" "ITDB_FULL_TCO_RESULT" "clk display\[7\] codetran:u4\|key_code\[0\] 10.862 ns register " "Info: tco from clock \"clk\" to destination pin \"display\[7\]\" through register \"codetran:u4\|key_code\[0\]\" is 10.862 ns" { { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "clk source 3.458 ns + Longest register " "Info: + Longest clock path from clock \"clk\" to source register is 3.458 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(1.163 ns) 1.163 ns clk 1 CLK PIN_62 55 " "Info: 1: + IC(0.000 ns) + CELL(1.163 ns) = 1.163 ns; Loc. = PIN_62; Fanout = 55; CLK Node = 'clk'" {  } { { "d:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "" { clk } "NODE_NAME" } } { "keyboard.vhd" "" { Text "C:/Documents and Settings/xiazi/桌面/代码/keyboard/keyboard/keyboard.vhd" 6 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(1.377 ns) + CELL(0.918 ns) 3.458 ns codetran:u4\|key_code\[0\] 2 REG LC_X7_Y1_N6 7 " "Info: 2: + IC(1.377 ns) + CELL(0.918 ns) = 3.458 ns; Loc. = LC_X7_Y1_N6; Fanout = 7; REG Node = 'codetran:u4\|key_code\[0\]'" {  } { { "d:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "2.295 ns" { clk codetran:u4|key_code[0] } "NODE_NAME" } } { "codetran.vhd" "" { Text "C:/Documents and Settings/xiazi/桌面/代码/keyboard/keyboard/codetran.vhd" 14 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "2.081 ns ( 60.18 % ) " "Info: Total cell delay = 2.081 ns ( 60.18 % )" {  } {  } 0 0 "Total cell delay = %1!s! %2!s!" 0 0} { "Info" "ITDB_TOTAL_IC_DELAY" "1.377 ns ( 39.82 % ) " "Info: Total interconnect delay = 1.377 ns ( 39.82 % )" {  } {  } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0}  } { { "d:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "3.458 ns" { clk codetran:u4|key_code[0] } "NODE_NAME" } } { "d:/altera/quartus60/win/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/altera/quartus60/win/Technology_Viewer.qrui" "3.458 ns" { clk clk~combout codetran:u4|key_code[0] } { 0.000ns 0.000ns 1.377ns } { 0.000ns 1.163ns 0.918ns } } }  } 0 0 "%4!c! %5!s! clock path from clock \"%1!s!\" to %2!s! %6!s! is %3!s!" 0 0} { "Info" "ITDB_FULL_TCO_DELAY" "0.376 ns + " "Info: + Micro clock to output delay of source is 0.376 ns" {  } { { "codetran.vhd" "" { Text "C:/Documents and Settings/xiazi/桌面/代码/keyboard/keyboard/codetran.vhd" 14 -1 0 } }  } 0 0 "%2!c! Micro clock to output delay of source is %1!s!" 0 0} { "Info" "ITDB_FULL_DATA_PATH_RESULT" "7.028 ns + Longest register pin " "Info: + Longest register to pin delay is 7.028 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.000 ns) 0.000 ns codetran:u4\|key_code\[0\] 1 REG LC_X7_Y1_N6 7 " "Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = LC_X7_Y1_N6; Fanout = 7; REG Node = 'codetran:u4\|key_code\[0\]'" {  } { { "d:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "" { codetran:u4|key_code[0] } "NODE_NAME" } } { "codetran.vhd" "" { Text "C:/Documents and Settings/xiazi/桌面/代码/keyboard/keyboard/codetran.vhd" 14 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(1.308 ns) + CELL(0.914 ns) 2.222 ns led:u5\|Mux0~13 2 COMB LC_X6_Y1_N0 1 " "Info: 2: + IC(1.308 ns) + CELL(0.914 ns) = 2.222 ns; Loc. = LC_X6_Y1_N0; Fanout = 1; COMB Node = 'led:u5\|Mux0~13'" {  } { { "d:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "2.222 ns" { codetran:u4|key_code[0] led:u5|Mux0~13 } "NODE_NAME" } } { "led.vhd" "" { Text "C:/Documents and Settings/xiazi/桌面/代码/keyboard/keyboard/led.vhd" 19 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(2.484 ns) + CELL(2.322 ns) 7.028 ns display\[7\] 3 PIN PIN_66 0 " "Info: 3: + IC(2.484 ns) + CELL(2.322 ns) = 7.028 ns; Loc. = PIN_66; Fanout = 0; PIN Node = 'display\[7\]'" {  } { { "d:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "4.806 ns" { led:u5|Mux0~13 display[7] } "NODE_NAME" } } { "keyboard.vhd" "" { Text "C:/Documents and Settings/xiazi/桌面/代码/keyboard/keyboard/keyboard.vhd" 9 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "3.236 ns ( 46.04 % ) " "Info: Total cell delay = 3.236 ns ( 46.04 % )" {  } {  } 0 0 "Total cell delay = %1!s! %2!s!" 0 0} { "Info" "ITDB_TOTAL_IC_DELAY" "3.792 ns ( 53.96 % ) " "Info: Total interconnect delay = 3.792 ns ( 53.96 % )" {  } {  } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0}  } { { "d:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "7.028 ns" { codetran:u4|key_code[0] led:u5|Mux0~13 display[7] } "NODE_NAME" } } { "d:/altera/quartus60/win/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/altera/quartus60/win/Technology_Viewer.qrui" "7.028 ns" { codetran:u4|key_code[0] led:u5|Mux0~13 display[7] } { 0.000ns 1.308ns 2.484ns } { 0.000ns 0.914ns 2.322ns } } }  } 0 0 "%2!c! %3!s! %4!s! to %5!s! delay is %1!s!" 0 0}  } { { "d:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "3.458 ns" { clk codetran:u4|key_code[0] } "NODE_NAME" } } { "d:/altera/quartus60/win/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/altera/quartus60/win/Technology_Viewer.qrui" "3.458 ns" { clk clk~combout codetran:u4|key_code[0] } { 0.000ns 0.000ns 1.377ns } { 0.000ns 1.163ns 0.918ns } } } { "d:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "7.028 ns" { codetran:u4|key_code[0] led:u5|Mux0~13 display[7] } "NODE_NAME" } } { "d:/altera/quartus60/win/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/altera/quartus60/win/Technology_Viewer.qrui" "7.028 ns" { codetran:u4|key_code[0] led:u5|Mux0~13 display[7] } { 0.000ns 1.308ns 2.484ns } { 0.000ns 0.914ns 2.322ns } } }  } 0 0 "tco from clock \"%1!s!\" to destination pin \"%2!s!\" through %5!s! \"%3!s!\" is %4!s!" 0 0}
{ "Info" "ITDB_TH_RESULT" "key_press:u2\|sig_2 row\[2\] clk 2.401 ns register " "Info: th for register \"key_press:u2\|sig_2\" (data pin = \"row\[2\]\", clock pin = \"clk\") is 2.401 ns" { { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "clk destination 8.073 ns + Longest register " "Info: + Longest clock path from clock \"clk\" to destination register is 8.073 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(1.163 ns) 1.163 ns clk 1 CLK PIN_62 55 " "Info: 1: + IC(0.000 ns) + CELL(1.163 ns) = 1.163 ns; Loc. = PIN_62; Fanout = 55; CLK Node = 'clk'" {  } { { "d:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "" { clk } "NODE_NAME" } } { "keyboard.vhd" "" { Text "C:/Documents and Settings/xiazi/桌面/代码/keyboard/keyboard/keyboard.vhd" 6 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(1.377 ns) + CELL(1.294 ns) 3.834 ns scan_gen:u1\|fredivn:u1\|outclk 2 REG LC_X6_Y3_N8 6 " "Info: 2: + IC(1.377 ns) + CELL(1.294 ns) = 3.834 ns; Loc. = LC_X6_Y3_N8; Fanout = 6; REG Node = 'scan_gen:u1\|fredivn:u1\|outclk'" {  } { { "d:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "2.671 ns" { clk scan_gen:u1|fredivn:u1|outclk } "NODE_NAME" } } { "fredivn.vhd" "" { Text "C:/Documents and Settings/xiazi/桌面/代码/keyboard/keyboard/fredivn.vhd" 10 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(3.321 ns) + CELL(0.918 ns) 8.073 ns key_press:u2\|sig_2 3 REG LC_X3_Y1_N9 2 " "Info: 3: + IC(3.321 ns) + CELL(0.918 ns) = 8.073 ns; Loc. = LC_X3_Y1_N9; Fanout = 2; REG Node = 'key_press:u2\|sig_2'" {  } { { "d:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "4.239 ns" { scan_gen:u1|fredivn:u1|outclk key_press:u2|sig_2 } "NODE_NAME" } } { "key_press.vhd" "" { Text "C:/Documents and Settings/xiazi/桌面/代码/keyboard/keyboard/key_press.vhd" 12 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "3.375 ns ( 41.81 % ) " "Info: Total cell delay = 3.375 ns ( 41.81 % )" {  } {  } 0 0 "Total cell delay = %1!s! %2!s!" 0 0} { "Info" "ITDB_TOTAL_IC_DELAY" "4.698 ns ( 58.19 % ) " "Info: Total interconnect delay = 4.698 ns ( 58.19 % )" {  } {  } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0}  } { { "d:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "8.073 ns" { clk scan_gen:u1|fredivn:u1|outclk key_press:u2|sig_2 } "NODE_NAME" } } { "d:/altera/quartus60/win/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/altera/quartus60/win/Technology_Viewer.qrui" "8.073 ns" { clk clk~combout scan_gen:u1|fredivn:u1|outclk key_press:u2|sig_2 } { 0.000ns 0.000ns 1.377ns 3.321ns } { 0.000ns 1.163ns 1.294ns 0.918ns } } }  } 0 0 "%4!c! %5!s! clock path from clock \"%1!s!\" to %2!s! %6!s! is %3!s!" 0 0} { "Info" "ITDB_FULL_TH_DELAY" "0.221 ns + " "Info: + Micro hold delay of destination is 0.221 ns" {  } { { "key_press.vhd" "" { Text "C:/Documents and Settings/xiazi/桌面/代码/keyboard/keyboard/key_press.vhd" 12 -1 0 } }  } 0 0 "%2!c! Micro hold delay of destination is %1!s!" 0 0} { "Info" "ITDB_FULL_DATA_PATH_RESULT" "5.893 ns - Shortest pin register " "Info: - Shortest pin to register delay is 5.893 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(1.132 ns) 1.132 ns row\[2\] 1 PIN PIN_36 2 " "Info: 1: + IC(0.000 ns) + CELL(1.132 ns) = 1.132 ns; Loc. = PIN_36; Fanout = 2; PIN Node = 'row\[2\]'" {  } { { "d:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "" { row[2] } "NODE_NAME" } } { "keyboard.vhd" "" { Text "C:/Documents and Settings/xiazi/桌面/代码/keyboard/keyboard/keyboard.vhd" 7 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(2.651 ns) + CELL(0.740 ns) 4.523 ns key_scan:u3\|tmp_1~27 2 COMB LC_X3_Y1_N3 6 " "Info: 2: + IC(2.651 ns) + CELL(0.740 ns) = 4.523 ns; Loc. = LC_X3_Y1_N3; Fanout = 6; COMB Node = 'key_scan:u3\|tmp_1~27'" {  } { { "d:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "3.391 ns" { row[2] key_scan:u3|tmp_1~27 } "NODE_NAME" } } { "key_scan.vhd" "" { Text "C:/Documents and Settings/xiazi/桌面/代码/keyboard/keyboard/key_scan.vhd" 14 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.779 ns) + CELL(0.591 ns) 5.893 ns key_press:u2\|sig_2 3 REG LC_X3_Y1_N9 2 " "Info: 3: + IC(0.779 ns) + CELL(0.591 ns) = 5.893 ns; Loc. = LC_X3_Y1_N9; Fanout = 2; REG Node = 'key_press:u2\|sig_2'" {  } { { "d:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "1.370 ns" { key_scan:u3|tmp_1~27 key_press:u2|sig_2 } "NODE_NAME" } } { "key_press.vhd" "" { Text "C:/Documents and Settings/xiazi/桌面/代码/keyboard/keyboard/key_press.vhd" 12 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "2.463 ns ( 41.80 % ) " "Info: Total cell delay = 2.463 ns ( 41.80 % )" {  } {  } 0 0 "Total cell delay = %1!s! %2!s!" 0 0} { "Info" "ITDB_TOTAL_IC_DELAY" "3.430 ns ( 58.20 % ) " "Info: Total interconnect delay = 3.430 ns ( 58.20 % )" {  } {  } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0}  } { { "d:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "5.893 ns" { row[2] key_scan:u3|tmp_1~27 key_press:u2|sig_2 } "NODE_NAME" } } { "d:/altera/quartus60/win/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/altera/quartus60/win/Technology_Viewer.qrui" "5.893 ns" { row[2] row[2]~combout key_scan:u3|tmp_1~27 key_press:u2|sig_2 } { 0.000ns 0.000ns 2.651ns 0.779ns } { 0.000ns 1.132ns 0.740ns 0.591ns } } }  } 0 0 "%2!c! %3!s! %4!s! to %5!s! delay is %1!s!" 0 0}  } { { "d:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "8.073 ns" { clk scan_gen:u1|fredivn:u1|outclk key_press:u2|sig_2 } "NODE_NAME" } } { "d:/altera/quartus60/win/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/altera/quartus60/win/Technology_Viewer.qrui" "8.073 ns" { clk clk~combout scan_gen:u1|fredivn:u1|outclk key_press:u2|sig_2 } { 0.000ns 0.000ns 1.377ns 3.321ns } { 0.000ns 1.163ns 1.294ns 0.918ns } } } { "d:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "5.893 ns" { row[2] key_scan:u3|tmp_1~27 key_press:u2|sig_2 } "NODE_NAME" } } { "d:/altera/quartus60/win/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/altera/quartus60/win/Technology_Viewer.qrui" "5.893 ns" { row[2] row[2]~combout key_scan:u3|tmp_1~27 key_press:u2|sig_2 } { 0.000ns 0.000ns 2.651ns 0.779ns } { 0.000ns 1.132ns 0.740ns 0.591ns } } }  } 0 0 "th for %5!s! \"%1!s!\" (data pin = \"%2!s!\", clock pin = \"%3!s!\") is %4!s!" 0 0}
{ "Info" "IQEXE_ERROR_COUNT" "Timing Analyzer 0 s 4 s Quartus II " "Info: Quartus II Timing Analyzer was successful. 0 errors, 4 warnings" { { "Info" "IQEXE_END_BANNER_TIME" "Sun Nov 25 00:07:45 2007 " "Info: Processing ended: Sun Nov 25 00:07:45 2007" {  } {  } 0 0 "Processing ended: %1!s!" 0 0} { "Info" "IQEXE_ELAPSED_TIME" "00:00:02 " "Info: Elapsed time: 00:00:02" {  } {  } 0 0 "Elapsed time: %1!s!" 0 0}  } {  } 0 0 "%6!s! %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0}