📄 keyboard.map.rpt
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; |keyboard ; 126 (0) ; 61 ; 0 ; 19 ; 0 ; 65 (0) ; 23 (0) ; 38 (0) ; 32 (0) ; 0 (0) ; |keyboard ;
; |codetran:u4| ; 10 (10) ; 4 ; 0 ; 0 ; 0 ; 6 (6) ; 0 (0) ; 4 (4) ; 0 (0) ; 0 (0) ; |keyboard|codetran:u4 ;
; |key_press:u2| ; 8 (8) ; 5 ; 0 ; 0 ; 0 ; 3 (3) ; 0 (0) ; 5 (5) ; 0 (0) ; 0 (0) ; |keyboard|key_press:u2 ;
; |key_scan:u3| ; 20 (19) ; 19 ; 0 ; 0 ; 0 ; 1 (1) ; 0 (0) ; 19 (18) ; 0 (0) ; 0 (0) ; |keyboard|key_scan:u3 ;
; |dff2:u1| ; 1 (1) ; 1 ; 0 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 1 (1) ; 0 (0) ; 0 (0) ; |keyboard|key_scan:u3|dff2:u1 ;
; |led:u5| ; 8 (8) ; 0 ; 0 ; 0 ; 0 ; 8 (8) ; 0 (0) ; 0 (0) ; 0 (0) ; 0 (0) ; |keyboard|led:u5 ;
; |scan_gen:u1| ; 80 (0) ; 33 ; 0 ; 0 ; 0 ; 47 (0) ; 23 (0) ; 10 (0) ; 32 (0) ; 0 (0) ; |keyboard|scan_gen:u1 ;
; |fredivn:u1| ; 80 (80) ; 33 ; 0 ; 0 ; 0 ; 47 (47) ; 23 (23) ; 10 (10) ; 32 (32) ; 0 (0) ; |keyboard|scan_gen:u1|fredivn:u1 ;
+----------------------------+-------------+--------------+------------+------+--------------+--------------+-------------------+------------------+-----------------+------------+----------------------------------+
Note: For table entries with two numbers listed, the numbers in parentheses indicate the number of resources of the given type used by the specific entity alone. The numbers listed outside of parentheses indicate the total resources of the given type used by the specific entity and all of its sub-entities in the hierarchy.
+---------------------------------------------------------------------------------------------------+
; User-Specified and Inferred Latches ;
+----------------------------------------------------+---------------------+------------------------+
; Latch Name ; Latch Enable Signal ; Free of Timing Hazards ;
+----------------------------------------------------+---------------------+------------------------+
; key_press:u2|sig_3 ; key_press:u2|sig_2 ; yes ;
; Number of user-specified and inferred latches = 1 ; ; ;
+----------------------------------------------------+---------------------+------------------------+
Note: All latches listed above may not be present at the end of synthesis due to various synthesis optimizations.
+------------------------------------------------------+
; General Register Statistics ;
+----------------------------------------------+-------+
; Statistic ; Value ;
+----------------------------------------------+-------+
; Total registers ; 61 ;
; Number of registers using Synchronous Clear ; 0 ;
; Number of registers using Synchronous Load ; 0 ;
; Number of registers using Asynchronous Clear ; 1 ;
; Number of registers using Asynchronous Load ; 0 ;
; Number of registers using Clock Enable ; 0 ;
; Number of registers using Preset ; 0 ;
+----------------------------------------------+-------+
+--------------------------------------------------+
; Inverted Register Statistics ;
+----------------------------------------+---------+
; Inverted Register ; Fan out ;
+----------------------------------------+---------+
; scan_gen:u1|fredivn:u1|count[31] ; 3 ;
; scan_gen:u1|fredivn:u1|count[0] ; 4 ;
; Total number of inverted registers = 2 ; ;
+----------------------------------------+---------+
+--------------------------------------------------------------------------------------------------------------------------------------------------+
; Multiplexer Restructuring Statistics (Restructuring Performed) ;
+--------------------+-----------+---------------+----------------------+------------------------+------------+------------------------------------+
; Multiplexer Inputs ; Bus Width ; Baseline Area ; Area if Restructured ; Saving if Restructured ; Registered ; Example Multiplexer Output ;
+--------------------+-----------+---------------+----------------------+------------------------+------------+------------------------------------+
; 3:1 ; 2 bits ; 4 LEs ; 2 LEs ; 2 LEs ; Yes ; |keyboard|key_scan:u3|counter[0] ;
; 3:1 ; 8 bits ; 16 LEs ; 8 LEs ; 8 LEs ; Yes ; |keyboard|key_scan:u3|scan_code[7] ;
+--------------------+-----------+---------------+----------------------+------------------------+------------+------------------------------------+
+-----------------------------------------------+
; Source assignments for scan_gen:u1|fredivn:u1 ;
+----------------+-------+------+---------------+
; Assignment ; Value ; From ; To ;
+----------------+-------+------+---------------+
; POWER_UP_LEVEL ; High ; - ; count[0] ;
; POWER_UP_LEVEL ; Low ; - ; count[1] ;
; POWER_UP_LEVEL ; Low ; - ; count[2] ;
; POWER_UP_LEVEL ; Low ; - ; count[3] ;
; POWER_UP_LEVEL ; Low ; - ; count[4] ;
; POWER_UP_LEVEL ; Low ; - ; count[5] ;
; POWER_UP_LEVEL ; Low ; - ; count[6] ;
; POWER_UP_LEVEL ; Low ; - ; count[7] ;
; POWER_UP_LEVEL ; Low ; - ; count[8] ;
; POWER_UP_LEVEL ; Low ; - ; count[9] ;
; POWER_UP_LEVEL ; Low ; - ; count[10] ;
; POWER_UP_LEVEL ; Low ; - ; count[11] ;
; POWER_UP_LEVEL ; Low ; - ; count[12] ;
; POWER_UP_LEVEL ; Low ; - ; count[13] ;
; POWER_UP_LEVEL ; Low ; - ; count[14] ;
; POWER_UP_LEVEL ; Low ; - ; count[15] ;
; POWER_UP_LEVEL ; Low ; - ; count[16] ;
; POWER_UP_LEVEL ; Low ; - ; count[17] ;
; POWER_UP_LEVEL ; Low ; - ; count[18] ;
; POWER_UP_LEVEL ; Low ; - ; count[19] ;
; POWER_UP_LEVEL ; Low ; - ; count[20] ;
; POWER_UP_LEVEL ; Low ; - ; count[21] ;
; POWER_UP_LEVEL ; Low ; - ; count[22] ;
; POWER_UP_LEVEL ; Low ; - ; count[23] ;
; POWER_UP_LEVEL ; Low ; - ; count[24] ;
; POWER_UP_LEVEL ; Low ; - ; count[25] ;
; POWER_UP_LEVEL ; Low ; - ; count[26] ;
; POWER_UP_LEVEL ; Low ; - ; count[27] ;
; POWER_UP_LEVEL ; Low ; - ; count[28] ;
; POWER_UP_LEVEL ; Low ; - ; count[29] ;
; POWER_UP_LEVEL ; Low ; - ; count[30] ;
; POWER_UP_LEVEL ; High ; - ; count[31] ;
+----------------+-------+------+---------------+
+---------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: scan_gen:u1|fredivn:u1 ;
+----------------+-------+--------------------------------------------+
; Parameter Name ; Value ; Type ;
+----------------+-------+--------------------------------------------+
; n ; 3686 ; Integer ;
+----------------+-------+--------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings Tables in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".
+-------------------------------+
; Analysis & Synthesis Messages ;
+-------------------------------+
Info: *******************************************************************
Info: Running Quartus II Analysis & Synthesis
Info: Version 6.0 Build 178 04/27/2006 SJ Full Version
Info: Processing started: Sun Nov 25 00:07:27 2007
Info: Command: quartus_map --read_settings_files=on --write_settings_files=off keyboard -c keyboard
Warning: Entity "dff2" obtained from "C:/Documents and Settings/xiazi/桌面/代码/keyboard/keyboard/dff2.vhd" instead of from Quartus II megafunction library
Info: Found 2 design units, including 1 entities, in source file dff2.vhd
Info: Found design unit 1: dff2-rtl
Info: Found entity 1: dff2
Info: Found 2 design units, including 1 entities, in source file fredivn.vhd
Info: Found design unit 1: fredivn-rtl
Info: Found entity 1: fredivn
Info: Found 2 design units, including 1 entities, in source file codetran.vhd
Info: Found design unit 1: codetran-behav
Info: Found entity 1: codetran
Info: Found 2 design units, including 1 entities, in source file key_press.vhd
Info: Found design unit 1: key_press-behav
Info: Found entity 1: key_press
Info: Found 2 design units, including 1 entities, in source file key_scan.vhd
Info: Found design unit 1: key_scan-behav
Info: Found entity 1: key_scan
Info: Found 2 design units, including 1 entities, in source file keyboard.vhd
Info: Found design unit 1: keyboard-rtl
Info: Found entity 1: keyboard
Info: Found 3 design units, including 1 entities, in source file scan_gen.vhd
Info: Found design unit 1: test_con
Info: Found design unit 2: scan_gen-rtl
Info: Found entity 1: scan_gen
Info: Found 2 design units, including 1 entities, in source file led.vhd
Info: Found design unit 1: led-rtl
Info: Found entity 1: led
Info: Elaborating entity "keyboard" for the top level hierarchy
Info: Elaborating entity "scan_gen" for hierarchy "scan_gen:u1"
Info: Elaborating entity "fredivn" for hierarchy "scan_gen:u1|fredivn:u1"
Info: Elaborating entity "key_press" for hierarchy "key_press:u2"
Warning (10631): VHDL Process Statement warning at key_press.vhd(42): inferring latch(es) for signal or variable "sig_3", which holds its previous value in one or more paths through the process
Info (10041): Verilog HDL or VHDL info at key_press.vhd(42): inferred latch for "sig_3"
Info: Elaborating entity "key_scan" for hierarchy "key_scan:u3"
Warning (10036): Verilog HDL or VHDL warning at key_scan.vhd(14): object "sig_3" assigned a value but never read
Warning (10036): Verilog HDL or VHDL warning at key_scan.vhd(14): object "sig_5" assigned a value but never read
Info: Elaborating entity "dff2" for hierarchy "key_scan:u3|dff2:u1"
Warning (10631): VHDL Process Statement warning at dff2.vhd(11): inferring latch(es) for signal or variable "notq", which holds its previous value in one or more paths through the process
Info (10041): Verilog HDL or VHDL info at dff2.vhd(11): inferred latch for "notq"
Info: Elaborating entity "codetran" for hierarchy "codetran:u4"
Info: Elaborating entity "led" for hierarchy "led:u5"
Info: Duplicate registers merged to single register
Info: Duplicate register "key_scan:u3|sig_com[0]" merged to single register "key_scan:u3|com[3]"
Warning: Output pins are stuck at VCC or GND
Warning: Pin "display[0]" stuck at VCC
Info: Implemented 145 device resources after synthesis - the final resource count might be different
Info: Implemented 5 input pins
Info: Implemented 14 output pins
Info: Implemented 126 logic cells
Info: Quartus II Analysis & Synthesis was successful. 0 errors, 7 warnings
Info: Processing ended: Sun Nov 25 00:07:32 2007
Info: Elapsed time: 00:00:05
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