block1.hif

vhdl实现音乐播放,播放梁祝乐曲

address_a3
-1
3
address_a2
-1
3
address_a1
-1
3
address_a0
-1
3
}
# include_file {
d:|altera|72|quartus|libraries|megafunctions|aglobal72.inc
f39123b8592ab2dac019716e56b3ec18
d:|altera|72|quartus|libraries|megafunctions|lpm_mux.inc
c22bfd353214c01495b560fc34e47d79
d:|altera|72|quartus|libraries|megafunctions|lpm_decode.inc
bd0e2f5e01c1bd360461dceb53d48
d:|altera|72|quartus|libraries|megafunctions|stratix_ram_block.inc
2263a3bdfffeb150af977ee13902f70
d:|altera|72|quartus|libraries|megafunctions|a_rdenreg.inc
60d229340bc3c24acb0a137b4849830
d:|altera|72|quartus|libraries|megafunctions|altrom.inc
d4e3a69a331d3a99d3281790d99a1ebd
d:|altera|72|quartus|libraries|megafunctions|altdpram.inc
99d442b5b66c88db4daf94d99c6e4e77
d:|altera|72|quartus|libraries|megafunctions|altram.inc
e66a83eccf6717bed97c99d891ad085
d:|altera|72|quartus|libraries|megafunctions|altqpram.inc
74e08939f96a7ea8e7a4d59a5b01fe7
}
# hierarchies {
notetabs:inst4|music_rom:u1|altsyncram:altsyncram_component
}
# lmf
d:|altera|72|quartus|lmf|
d41d8cd98f0b24e980998ecf8427e
# macro_sequence

# end
# entity
altsyncram_gq41
# storage
db|Block1.(9).cnf
db|Block1.(9).cnf
# case_insensitive
# source_file
db|altsyncram_gq41.tdf
c13a1f197c3c2fa454a381e23dd827a
6
# used_port {
q_a3
-1
3
q_a2
-1
3
q_a1
-1
3
q_a0
-1
3
clock0
-1
3
address_a7
-1
3
address_a6
-1
3
address_a5
-1
3
address_a4
-1
3
address_a3
-1
3
address_a2
-1
3
address_a1
-1
3
address_a0
-1
3
}
# hierarchies {
notetabs:inst4|music_rom:u1|altsyncram:altsyncram_component|altsyncram_gq41:auto_generated
}
# lmf
d:|altera|72|quartus|lmf|
d41d8cd98f0b24e980998ecf8427e
# macro_sequence

# end
# entity
altsyncram_8962
# storage
db|Block1.(10).cnf
db|Block1.(10).cnf
# case_insensitive
# source_file
db|altsyncram_8962.tdf
4b40d24655f968bdce8bea52c98246ae
6
# used_port {
wren_b
-1
3
q_b3
-1
3
q_b2
-1
3
q_b1
-1
3
q_b0
-1
3
q_a3
-1
3
q_a2
-1
3
q_a1
-1
3
q_a0
-1
3
data_b3
-1
3
data_b2
-1
3
data_b1
-1
3
data_b0
-1
3
clock1
-1
3
clock0
-1
3
address_b7
-1
3
address_b6
-1
3
address_b5
-1
3
address_b4
-1
3
address_b3
-1
3
address_b2
-1
3
address_b1
-1
3
address_b0
-1
3
address_a7
-1
3
address_a6
-1
3
address_a5
-1
3
address_a4
-1
3
address_a3
-1
3
address_a2
-1
3
address_a1
-1
3
address_a0
-1
3
}
# memory_file {
date.hex
38a12ae461fc769d2e2e0eba67b543
}
# hierarchies {
notetabs:inst4|music_rom:u1|altsyncram:altsyncram_component|altsyncram_gq41:auto_generated|altsyncram_8962:altsyncram1
}
# lmf
d:|altera|72|quartus|lmf|
d41d8cd98f0b24e980998ecf8427e
# macro_sequence

# end
# entity
sld_mod_ram_rom
# storage
db|Block1.(11).cnf
db|Block1.(11).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
d:|altera|72|quartus|libraries|megafunctions|sld_mod_ram_rom.vhd
1634e1b8e8963c49682f1d9e1589e95
4
# internal_option {
IP_SHOW_ELABORATION_MESSAGES
OFF
HDL_INITIAL_FANOUT_LIMIT
OFF
AUTO_RESOURCE_SHARING
OFF
AUTO_RAM_RECOGNITION
ON
AUTO_ROM_RECOGNITION
ON
}
# user_parameter {
sld_node_info
135818752
PARAMETER_SIGNED_DEC
DEF
sld_auto_instance_index
yes
PARAMETER_STRING
DEF
sld_ip_version
1
PARAMETER_SIGNED_DEC
DEF
sld_ip_minor_version
3
PARAMETER_SIGNED_DEC
DEF
sld_common_ip_version
0
PARAMETER_SIGNED_DEC
DEF
width_word
4
PARAMETER_UNKNOWN
USR
numwords
256
PARAMETER_UNKNOWN
USR
widthad
8
PARAMETER_UNKNOWN
USR
shift_count_bits
3
PARAMETER_UNKNOWN
USR
cvalue
0000
PARAMETER_UNKNOWN
USR
is_data_in_ram
1
PARAMETER_UNKNOWN
USR
is_readable
1
PARAMETER_UNKNOWN
USR
node_name
1668246833
PARAMETER_UNKNOWN
USR
 constraint(address)
7 downto 0
PARAMETER_STRING
USR
}
# hierarchies {
notetabs:inst4|music_rom:u1|altsyncram:altsyncram_component|altsyncram_gq41:auto_generated|sld_mod_ram_rom:mgl_prim2
}
# lmf
d:|altera|72|quartus|lmf|maxplus2.lmf
9a59d39b0706640b4b2718e8a1ff1f
# macro_sequence

# end
# entity
sld_rom_sr
# storage
db|Block1.(12).cnf
db|Block1.(12).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
d:|altera|72|quartus|libraries|megafunctions|sld_rom_sr.vhd
289c5d86b3cfff8b4a53596c88b2f9be
4
# internal_option {
IP_SHOW_ELABORATION_MESSAGES
OFF
HDL_INITIAL_FANOUT_LIMIT
OFF
AUTO_RESOURCE_SHARING
OFF
AUTO_RAM_RECOGNITION
ON
AUTO_ROM_RECOGNITION
ON
}
# user_parameter {
common_ip_version
0
PARAMETER_SIGNED_DEC
USR
n_bits
80
PARAMETER_SIGNED_DEC
USR
word_size
4
PARAMETER_SIGNED_DEC
USR
 constraint(rom_data)
79 downto 0
PARAMETER_STRING
USR
}
# hierarchies {
notetabs:inst4|music_rom:u1|altsyncram:altsyncram_component|altsyncram_gq41:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:name_gen:info_rom_sr
}
# lmf
d:|altera|72|quartus|lmf|maxplus2.lmf
9a59d39b0706640b4b2718e8a1ff1f
# macro_sequence

# end
# entity
clock3000000
# storage
db|Block1.(13).cnf
db|Block1.(13).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
clock3000000.vhd
1e36f3344d418324968e5ea37d55
4
# internal_option {
HDL_INITIAL_FANOUT_LIMIT
OFF
AUTO_RESOURCE_SHARING
OFF
AUTO_RAM_RECOGNITION
ON
AUTO_ROM_RECOGNITION
ON
}
# hierarchies {
clock3000000:inst3
}
# lmf
d:|altera|72|quartus|lmf|maxplus2.lmf
9a59d39b0706640b4b2718e8a1ff1f
# macro_sequence

# end
# entity
sld_hub
# storage
db|Block1.(14).cnf
db|Block1.(14).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
d:|altera|72|quartus|libraries|megafunctions|sld_hub.vhd
6e9e745e59c7027e95e782bf1f2fa1
4
# internal_option {
IP_SHOW_ELABORATION_MESSAGES
OFF
HDL_INITIAL_FANOUT_LIMIT
OFF
AUTO_RESOURCE_SHARING
OFF
AUTO_RAM_RECOGNITION
ON
AUTO_ROM_RECOGNITION
ON
}
# user_parameter {
sld_hub_ip_version
1
PARAMETER_UNKNOWN
USR
sld_hub_ip_minor_version
3
PARAMETER_UNKNOWN
USR
sld_common_ip_version
0
PARAMETER_UNKNOWN
USR
device_family
Cyclone
PARAMETER_UNKNOWN
USR
n_nodes
1
PARAMETER_UNKNOWN
USR
n_sel_bits
1
PARAMETER_UNKNOWN
USR
n_node_ir_bits
5
PARAMETER_UNKNOWN
USR
node_info
00001000000110000110111000000000
PARAMETER_UNSIGNED_BIN
USR
compilation_mode
1
PARAMETER_UNKNOWN
USR
}
# lmf
d:|altera|72|quartus|lmf|maxplus2.lmf
9a59d39b0706640b4b2718e8a1ff1f
# macro_sequence

# end
# entity
sld_jtag_state_machine
# storage
db|Block1.(15).cnf
db|Block1.(15).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
d:|altera|72|quartus|libraries|megafunctions|sld_hub.vhd
6e9e745e59c7027e95e782bf1f2fa1
4
# internal_option {
IP_SHOW_ELABORATION_MESSAGES
OFF
HDL_INITIAL_FANOUT_LIMIT
OFF
AUTO_RESOURCE_SHARING
OFF
AUTO_RAM_RECOGNITION
ON
AUTO_ROM_RECOGNITION
ON
}
# user_parameter {
ip_major_version
1
PARAMETER_SIGNED_DEC
USR
ip_minor_version
3
PARAMETER_SIGNED_DEC
USR
common_ip_version
0
PARAMETER_SIGNED_DEC
USR
 constraint(jtag_state)
15 downto 0
PARAMETER_STRING
USR
}
# lmf
d:|altera|72|quartus|lmf|maxplus2.lmf
9a59d39b0706640b4b2718e8a1ff1f
# macro_sequence

# end
# entity
lpm_shiftreg
# storage
db|Block1.(16).cnf
db|Block1.(16).cnf
# case_insensitive
# source_file
d:|altera|72|quartus|libraries|megafunctions|lpm_shiftreg.tdf
c5ab523d1aaaec8081935aa7394e8f66
6
# user_parameter {
LPM_WIDTH
10
PARAMETER_SIGNED_DEC
USR
LPM_DIRECTION
RIGHT
PARAMETER_UNKNOWN
USR
LPM_AVALUE
UNUSED
PARAMETER_UNKNOWN
DEF
LPM_SVALUE
UNUSED
PARAMETER_UNKNOWN
DEF
DEVICE_FAMILY
Cyclone
PARAMETER_UNKNOWN
USR
AUTO_CARRY_CHAINS
ON
AUTO_CARRY
USR
IGNORE_CARRY_BUFFERS
OFF
IGNORE_CARRY
USR
AUTO_CASCADE_CHAINS
ON
AUTO_CASCADE
USR
IGNORE_CASCADE_BUFFERS
OFF
IGNORE_CASCADE
USR
}
# used_port {
shiftin
-1
3
q9
-1
3
q8
-1
3
q7
-1
3
q6
-1
3
q5
-1
3
q4
-1
3
q3
-1
3
q2
-1
3
q1
-1
3
q0
-1
3
enable
-1
3
clock
-1
3
aclr
-1
3
}
# include_file {
d:|altera|72|quartus|libraries|megafunctions|aglobal72.inc
f39123b8592ab2dac019716e56b3ec18
d:|altera|72|quartus|libraries|megafunctions|lpm_constant.inc
dcde44eee59335c1e2fe75d574f9646
d:|altera|72|quartus|libraries|megafunctions|dffeea.inc
55d29d20f7e852c37746bec4e2495ec
}
# lmf
d:|altera|72|quartus|lmf|
d41d8cd98f0b24e980998ecf8427e
# macro_sequence

# end
# entity
lpm_decode
# storage
db|Block1.(17).cnf
db|Block1.(17).cnf
# case_insensitive
# source_file
d:|altera|72|quartus|libraries|megafunctions|lpm_decode.tdf
e54fe7084974ccb962d679caa84bdd
6
# user_parameter {
LPM_WIDTH
3
PARAMETER_SIGNED_DEC
USR
LPM_DECODES
8
PARAMETER_SIGNED_DEC
USR
LPM_PIPELINE
1
PARAMETER_SIGNED_DEC
USR
CASCADE_CHAIN
MANUAL
PARAMETER_UNKNOWN
USR
DEVICE_FAMILY
Cyclone
PARAMETER_UNKNOWN
USR
CBXI_PARAMETER
decode_ogi
PARAMETER_UNKNOWN
USR
AUTO_CARRY_CHAINS
ON
AUTO_CARRY
USR
IGNORE_CARRY_BUFFERS
OFF
IGNORE_CARRY
USR
AUTO_CASCADE_CHAINS
ON
AUTO_CASCADE
USR
IGNORE_CASCADE_BUFFERS
OFF
IGNORE_CASCADE
USR
}
# used_port {
eq7
-1
3
eq3
-1
3
eq2
-1
3
eq1
-1
3
eq0
-1
3
enable
-1
3
data2
-1
3
data1
-1
3
data0
-1
3
clock
-1
3
clken
-1
3
aclr
-1
3
}
# include_file {
d:|altera|72|quartus|libraries|megafunctions|aglobal72.inc
f39123b8592ab2dac019716e56b3ec18
d:|altera|72|quartus|libraries|megafunctions|lpm_constant.inc
dcde44eee59335c1e2fe75d574f9646
d:|altera|72|quartus|libraries|megafunctions|declut.inc
b1d5939399e5c04dfe1d209af8cc490
d:|altera|72|quartus|libraries|megafunctions|altshift.inc
70fa13aee7d6d160ef20b2de32813a
d:|altera|72|quartus|libraries|megafunctions|lpm_compare.inc
aec4ea1b78f4cda1c3effe18f1abbf63
}
# lmf
d:|altera|72|quartus|lmf|
d41d8cd98f0b24e980998ecf8427e
# macro_sequence

# end
# entity
decode_ogi
# storage
db|Block1.(18).cnf
db|Block1.(18).cnf
# case_insensitive
# source_file
db|decode_ogi.tdf
953d943456a255fcdac93d491efb90
6
# used_port {
eq7
-1
3
eq6
-1
3
eq5
-1
3
eq4
-1
3
eq3
-1
3
eq2
-1
3
eq1
-1
3
eq0
-1
3
enable
-1
3
data2
-1
3
data1
-1
3
data0
-1
3
clock
-1
3
clken
-1
3
aclr
-1
3
}
# lmf
d:|altera|72|quartus|lmf|
d41d8cd98f0b24e980998ecf8427e
# macro_sequence

# end
# entity
sld_dffex
# storage
db|Block1.(19).cnf
db|Block1.(19).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
d:|altera|72|quartus|libraries|megafunctions|sld_dffex.vhd
e07a659f3de75fb323a077607414df48
4
# internal_option {
IP_SHOW_ELABORATION_MESSAGES
OFF
HDL_INITIAL_FANOUT_LIMIT
OFF
AUTO_RESOURCE_SHARING
OFF
AUTO_RAM_RECOGNITION
ON
AUTO_ROM_RECOGNITION
ON
}
# user_parameter {
size
1
PARAMETER_SIGNED_DEC
USR
 constraint(d)
0 downto 0
PARAMETER_STRING
USR
 constraint(q)
0 downto 0
PARAMETER_STRING
USR
}
# lmf
d:|altera|72|quartus|lmf|maxplus2.lmf
9a59d39b0706640b4b2718e8a1ff1f
# macro_sequence

# end
# entity
sld_dffex
# storage
db|Block1.(20).cnf
db|Block1.(20).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
d:|altera|72|quartus|libraries|megafunctions|sld_dffex.vhd
e07a659f3de75fb323a077607414df48
4
# internal_option {
IP_SHOW_ELABORATION_MESSAGES
OFF
HDL_INITIAL_FANOUT_LIMIT
OFF
AUTO_RESOURCE_SHARING
OFF
AUTO_RAM_RECOGNITION
ON
AUTO_ROM_RECOGNITION
ON
}
# user_parameter {
size
6
PARAMETER_SIGNED_DEC
USR
 constraint(d)
5 downto 0
PARAMETER_STRING
USR
 constraint(q)
5 downto 0
PARAMETER_STRING
USR
}
# lmf
d:|altera|72|quartus|lmf|maxplus2.lmf
9a59d39b0706640b4b2718e8a1ff1f
# macro_sequence

# end
# entity
sld_dffex
# storage
db|Block1.(21).cnf
db|Block1.(21).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
d:|altera|72|quartus|libraries|megafunctions|sld_dffex.vhd
e07a659f3de75fb323a077607414df48
4
# internal_option {
IP_SHOW_ELABORATION_MESSAGES
OFF
HDL_INITIAL_FANOUT_LIMIT
OFF
AUTO_RESOURCE_SHARING
OFF
AUTO_RAM_RECOGNITION
ON
AUTO_ROM_RECOGNITION
ON
}
# user_parameter {
size
5
PARAMETER_SIGNED_DEC
USR
 constraint(d)
4 downto 0
PARAMETER_STRING
USR
 constraint(q)
4 downto 0
PARAMETER_STRING
USR
}
# lmf
d:|altera|72|quartus|lmf|maxplus2.lmf
9a59d39b0706640b4b2718e8a1ff1f
# macro_sequence

# end
# entity
sld_rom_sr
# storage
db|Block1.(22).cnf
db|Block1.(22).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
d:|altera|72|quartus|libraries|megafunctions|sld_rom_sr.vhd
289c5d86b3cfff8b4a53596c88b2f9be
4
# internal_option {
IP_SHOW_ELABORATION_MESSAGES
OFF
HDL_INITIAL_FANOUT_LIMIT
OFF
AUTO_RESOURCE_SHARING
OFF
AUTO_RAM_RECOGNITION
ON
AUTO_ROM_RECOGNITION
OFF
}
# user_parameter {
common_ip_version
0
PARAMETER_SIGNED_DEC
USR
n_bits
64
PARAMETER_SIGNED_DEC
USR
word_size
4
PARAMETER_SIGNED_DEC
USR
 constraint(rom_data)
63 downto 0
PARAMETER_STRING
USR
}
# lmf
d:|altera|72|quartus|lmf|maxplus2.lmf
9a59d39b0706640b4b2718e8a1ff1f
# macro_sequence

# end
# complete