block1.map.rpt

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; Auto Clock Enable Replacement                                                  ; On                 ; On                 ;
; Allow Synchronous Control Signals                                              ; On                 ; On                 ;
; Force Use of Synchronous Clear Signals                                         ; Off                ; Off                ;
; Auto RAM Block Balancing                                                       ; On                 ; On                 ;
; Auto RAM to Logic Cell Conversion                                              ; Off                ; Off                ;
; Auto Resource Sharing                                                          ; Off                ; Off                ;
; Allow Any RAM Size For Recognition                                             ; Off                ; Off                ;
; Allow Any ROM Size For Recognition                                             ; Off                ; Off                ;
; Allow Any Shift Register Size For Recognition                                  ; Off                ; Off                ;
; Ignore translate_off and synthesis_off directives                              ; Off                ; Off                ;
; Show Parameter Settings Tables in Synthesis Report                             ; On                 ; On                 ;
; Ignore Maximum Fan-Out Assignments                                             ; Off                ; Off                ;
; Retiming Meta-Stability Register Sequence Length                               ; 2                  ; 2                  ;
; PowerPlay Power Optimization                                                   ; Normal compilation ; Normal compilation ;
; HDL message level                                                              ; Level2             ; Level2             ;
; Suppress Register Optimization Related Messages                                ; Off                ; Off                ;
; Number of Removed Registers Reported in Synthesis Report                       ; 100                ; 100                ;
; Clock MUX Protection                                                           ; On                 ; On                 ;
; Block Design Naming                                                            ; Auto               ; Auto               ;
+--------------------------------------------------------------------------------+--------------------+--------------------+


+----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Analysis & Synthesis Source Files Read                                                                                                                               ;
+----------------------------------+-----------------+---------------------------------------+-------------------------------------------------------------------------+
; File Name with User-Entered Path ; Used in Netlist ; File Type                             ; File Name with Absolute Path                                            ;
+----------------------------------+-----------------+---------------------------------------+-------------------------------------------------------------------------+
; Block1.bdf                       ; yes             ; User Block Diagram/Schematic File     ; C:/Documents and Settings/Administrator/桌面/yue/Block1.bdf             ;
; date.hex                         ; yes             ; User Hexadecimal (Intel-Format) File  ; C:/Documents and Settings/Administrator/桌面/yue/date.hex               ;
; Speakera.vhd                     ; yes             ; User VHDL File                        ; C:/Documents and Settings/Administrator/桌面/yue/Speakera.vhd           ;
; ToneTaba.vhd                     ; yes             ; User VHDL File                        ; C:/Documents and Settings/Administrator/桌面/yue/ToneTaba.vhd           ;
; notetabs.vhd                     ; yes             ; User VHDL File                        ; C:/Documents and Settings/Administrator/桌面/yue/notetabs.vhd           ;
; clock2.vhd                       ; yes             ; User VHDL File                        ; C:/Documents and Settings/Administrator/桌面/yue/clock2.vhd             ;
; clock3000000.vhd                 ; yes             ; User VHDL File                        ; C:/Documents and Settings/Administrator/桌面/yue/clock3000000.vhd       ;
; kkk.vhd                          ; yes             ; Other                                 ; C:/Documents and Settings/Administrator/桌面/yue/kkk.vhd                ;
; altpll.tdf                       ; yes             ; Megafunction                          ; d:/altera/72/quartus/libraries/megafunctions/altpll.tdf                 ;
; aglobal72.inc                    ; yes             ; Megafunction                          ; d:/altera/72/quartus/libraries/megafunctions/aglobal72.inc              ;
; stratix_pll.inc                  ; yes             ; Megafunction                          ; d:/altera/72/quartus/libraries/megafunctions/stratix_pll.inc            ;
; stratixii_pll.inc                ; yes             ; Megafunction                          ; d:/altera/72/quartus/libraries/megafunctions/stratixii_pll.inc          ;
; cycloneii_pll.inc                ; yes             ; Megafunction                          ; d:/altera/72/quartus/libraries/megafunctions/cycloneii_pll.inc          ;
; music_rom.vhd                    ; yes             ; Other                                 ; C:/Documents and Settings/Administrator/桌面/yue/music_rom.vhd          ;
; altsyncram.tdf                   ; yes             ; Megafunction                          ; d:/altera/72/quartus/libraries/megafunctions/altsyncram.tdf             ;
; stratix_ram_block.inc            ; yes             ; Megafunction                          ; d:/altera/72/quartus/libraries/megafunctions/stratix_ram_block.inc      ;
; lpm_mux.inc                      ; yes             ; Megafunction                          ; d:/altera/72/quartus/libraries/megafunctions/lpm_mux.inc                ;
; lpm_decode.inc                   ; yes             ; Megafunction                          ; d:/altera/72/quartus/libraries/megafunctions/lpm_decode.inc             ;
; a_rdenreg.inc                    ; yes             ; Megafunction                          ; d:/altera/72/quartus/libraries/megafunctions/a_rdenreg.inc              ;
; altrom.inc                       ; yes             ; Megafunction                          ; d:/altera/72/quartus/libraries/megafunctions/altrom.inc                 ;
; altram.inc                       ; yes             ; Megafunction                          ; d:/altera/72/quartus/libraries/megafunctions/altram.inc                 ;
; altdpram.inc                     ; yes             ; Megafunction                          ; d:/altera/72/quartus/libraries/megafunctions/altdpram.inc               ;
; altqpram.inc                     ; yes             ; Megafunction                          ; d:/altera/72/quartus/libraries/megafunctions/altqpram.inc               ;
; db/altsyncram_gq41.tdf           ; yes             ; Auto-Generated Megafunction           ; C:/Documents and Settings/Administrator/桌面/yue/db/altsyncram_gq41.tdf ;
; db/altsyncram_8962.tdf           ; yes             ; Auto-Generated Megafunction           ; C:/Documents and Settings/Administrator/桌面/yue/db/altsyncram_8962.tdf ;
; sld_mod_ram_rom.vhd              ; yes             ; Encrypted Megafunction                ; d:/altera/72/quartus/libraries/megafunctions/sld_mod_ram_rom.vhd        ;
; sld_rom_sr.vhd                   ; yes             ; Encrypted Megafunction                ; d:/altera/72/quartus/libraries/megafunctions/sld_rom_sr.vhd             ;
; sld_hub.vhd                      ; yes             ; Encrypted Megafunction                ; d:/altera/72/quartus/libraries/megafunctions/sld_hub.vhd                ;
; lpm_shiftreg.tdf                 ; yes             ; Megafunction                          ; d:/altera/72/quartus/libraries/megafunctions/lpm_shiftreg.tdf           ;
; lpm_constant.inc                 ; yes             ; Megafunction                          ; d:/altera/72/quartus/libraries/megafunctions/lpm_constant.inc           ;
; dffeea.inc                       ; yes             ; Megafunction                          ; d:/altera/72/quartus/libraries/megafunctions/dffeea.inc                 ;
; lpm_decode.tdf                   ; yes             ; Megafunction                          ; d:/altera/72/quartus/libraries/megafunctions/lpm_decode.tdf             ;
; declut.inc                       ; yes             ; Megafunction                          ; d:/altera/72/quartus/libraries/megafunctions/declut.inc                 ;
; altshift.inc                     ; yes             ; Megafunction                          ; d:/altera/72/quartus/libraries/megafunctions/altshift.inc               ;
; lpm_compare.inc                  ; yes             ; Megafunction                          ; d:/altera/72/quartus/libraries/megafunctions/lpm_compare.inc            ;
; db/decode_ogi.tdf                ; yes             ; Auto-Generated Megafunction           ; C:/Documents and Settings/Administrator/桌面/yue/db/decode_ogi.tdf      ;
; sld_dffex.vhd                    ; yes             ; Encrypted Megafunction                ; d:/altera/72/quartus/libraries/megafunctions/sld_dffex.vhd              ;
+----------------------------------+-----------------+---------------------------------------+-------------------------------------------------------------------------+


+------------------------------------------------------------------------+
; Analysis & Synthesis Resource Usage Summary                            ;
+---------------------------------------------+--------------------------+
; Resource                                    ; Usage                    ;
+---------------------------------------------+--------------------------+
; Total logic elements                        ; 294                      ;
;     -- Combinational with no register       ; 143                      ;
;     -- Register only                        ; 21                       ;
;     -- Combinational with a register        ; 130                      ;
;                                             ;                          ;
; Logic element usage by number of LUT inputs ;                          ;
;     -- 4 input functions                    ; 97                       ;
;     -- 3 input functions                    ; 49                       ;
;     -- 2 input functions                    ; 114                      ;
;     -- 1 input functions                    ; 12                       ;
;     -- 0 input functions                    ; 1                        ;
;                                             ;                          ;
; Logic elements by mode                      ;                          ;
;     -- normal mode                          ; 238                      ;
;     -- arithmetic mode                      ; 56                       ;
;     -- qfbk mode                            ; 0                        ;
;     -- register cascade mode                ; 0                        ;
;     -- synchronous clear/load mode          ; 40                       ;
;     -- asynchronous clear/load mode         ; 63                       ;
;                                             ;                          ;
; Total registers                             ; 151                      ;
; Total logic cells in carry chains           ; 63                       ;
; I/O pins                                    ; 6                        ;
; Total memory bits                           ; 1024                     ;
; Total PLLs                                  ; 1                        ;
; Maximum fan-out node                        ; altera_internal_jtag~TDO ;
; Maximum fan-out                             ; 110                      ;
; Total fan-out                               ; 1187                     ;
; Average fan-out                             ; 3.88                     ;
+---------------------------------------------+--------------------------+


+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Analysis & Synthesis Resource Utilization by Entity                                                                                                                                                                                                                                                                                                                                                                           ;
+------------------------------------------------------------------------+-------------+--------------+-------------+------+--------------+--------------+-------------------+------------------+-----------------+------------+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+--------------+
; Compilation Hierarchy Node                                             ; Logic Cells ; LC Registers ; Memory Bits ; Pins ; Virtual Pins ; LUT-Only LCs ; Register-Only LCs ; LUT/Register LCs ; Carry Chain LCs ; Packed LCs ; Full Hierarchy Name                                                                                                                                                             ; Library Name ;
+------------------------------------------------------------------------+-------------+--------------+-------------+------+--------------+--------------+-------------------+------------------+-----------------+------------+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+--------------+
; |Block1                                                                ; 294 (2)     ; 151          ; 1024        ; 6    ; 0            ; 143 (2)      ; 21 (0)            ; 130 (0)          ; 63 (0)          ; 0 (0)      ; |Block1                                                                                                                                                                         ; work         ;
;    |Speakera:inst5|                                                    ; 29 (29)     ; 19           ; 0           ; 0    ; 0            ; 10 (10)      ; 1 (1)             ; 18 (18)          ; 16 (16)         ; 0 (0)      ; |Block1|Speakera:inst5                                                                                                                                                          ; work         ;
;    |ToneTaba:inst6|                                                    ; 23 (23)     ; 0            ; 0           ; 0    ; 0            ; 23 (23)      ; 0 (0)             ; 0 (0)            ; 0 (0)           ; 0 (0)      ; |Block1|ToneTaba:inst6                                                                                                                                                          ; work         ;
;    |clock2:inst2|                                                      ; 1 (1)       ; 1            ; 0           ; 0    ; 0            ; 0 (0)        ; 0 (0)             ; 1 (1)            ; 0 (0)           ; 0 (0)      ; |Block1|clock2:inst2                                                                                                                                                            ; work         ;
;    |clock3000000:inst3|                                                ; 62 (62)     ; 23           ; 0           ; 0    ; 0            ; 39 (39)      ; 0 (0)             ; 23 (23)          ; 22 (22)         ; 0 (0)      ; |Block1|clock3000000:inst3                                                                                                                                                      ; work         ;
;    |kkk:inst|                                                          ; 0 (0)       ; 0            ; 0           ; 0    ; 0            ; 0 (0)        ; 0 (0)             ; 0 (0)            ; 0 (0)           ; 0 (0)      ; |Block1|kkk:inst                                                                                                                                                                ; work         ;