alarm_clock.map.qmsg
来自「在ACEX EP1K30TC144-3实现了闹钟功能,并能修改定时,和当前时间」· QMSG 代码 · 共 92 行 · 第 1/4 页
QMSG
92 行
{ "Info" "IVRFX_VRFC_LATCH_INFERRED" "DISPLAY_TIME\[0\]\[1\] DISPLAY_DRIVER.vhd(21) " "Info (10041): Verilog HDL or VHDL info at DISPLAY_DRIVER.vhd(21): inferred latch for \"DISPLAY_TIME\[0\]\[1\]\"" { } { { "DISPLAY_DRIVER.vhd" "" { Text "E:/clock/DISPLAY_DRIVER.vhd" 21 0 0 } } } 0 10041 "Verilog HDL or VHDL info at %2!s!: inferred latch for \"%1!s!\"" 0 0}
{ "Info" "IVRFX_VRFC_LATCH_INFERRED" "DISPLAY_TIME\[0\]\[2\] DISPLAY_DRIVER.vhd(21) " "Info (10041): Verilog HDL or VHDL info at DISPLAY_DRIVER.vhd(21): inferred latch for \"DISPLAY_TIME\[0\]\[2\]\"" { } { { "DISPLAY_DRIVER.vhd" "" { Text "E:/clock/DISPLAY_DRIVER.vhd" 21 0 0 } } } 0 10041 "Verilog HDL or VHDL info at %2!s!: inferred latch for \"%1!s!\"" 0 0}
{ "Info" "IVRFX_VRFC_LATCH_INFERRED" "DISPLAY_TIME\[0\]\[3\] DISPLAY_DRIVER.vhd(21) " "Info (10041): Verilog HDL or VHDL info at DISPLAY_DRIVER.vhd(21): inferred latch for \"DISPLAY_TIME\[0\]\[3\]\"" { } { { "DISPLAY_DRIVER.vhd" "" { Text "E:/clock/DISPLAY_DRIVER.vhd" 21 0 0 } } } 0 10041 "Verilog HDL or VHDL info at %2!s!: inferred latch for \"%1!s!\"" 0 0}
{ "Info" "IVRFX_VRFC_LATCH_INFERRED" "DISPLAY_TIME\[1\]\[0\] DISPLAY_DRIVER.vhd(21) " "Info (10041): Verilog HDL or VHDL info at DISPLAY_DRIVER.vhd(21): inferred latch for \"DISPLAY_TIME\[1\]\[0\]\"" { } { { "DISPLAY_DRIVER.vhd" "" { Text "E:/clock/DISPLAY_DRIVER.vhd" 21 0 0 } } } 0 10041 "Verilog HDL or VHDL info at %2!s!: inferred latch for \"%1!s!\"" 0 0}
{ "Info" "IVRFX_VRFC_LATCH_INFERRED" "DISPLAY_TIME\[1\]\[1\] DISPLAY_DRIVER.vhd(21) " "Info (10041): Verilog HDL or VHDL info at DISPLAY_DRIVER.vhd(21): inferred latch for \"DISPLAY_TIME\[1\]\[1\]\"" { } { { "DISPLAY_DRIVER.vhd" "" { Text "E:/clock/DISPLAY_DRIVER.vhd" 21 0 0 } } } 0 10041 "Verilog HDL or VHDL info at %2!s!: inferred latch for \"%1!s!\"" 0 0}
{ "Info" "IVRFX_VRFC_LATCH_INFERRED" "DISPLAY_TIME\[1\]\[2\] DISPLAY_DRIVER.vhd(21) " "Info (10041): Verilog HDL or VHDL info at DISPLAY_DRIVER.vhd(21): inferred latch for \"DISPLAY_TIME\[1\]\[2\]\"" { } { { "DISPLAY_DRIVER.vhd" "" { Text "E:/clock/DISPLAY_DRIVER.vhd" 21 0 0 } } } 0 10041 "Verilog HDL or VHDL info at %2!s!: inferred latch for \"%1!s!\"" 0 0}
{ "Info" "IVRFX_VRFC_LATCH_INFERRED" "DISPLAY_TIME\[1\]\[3\] DISPLAY_DRIVER.vhd(21) " "Info (10041): Verilog HDL or VHDL info at DISPLAY_DRIVER.vhd(21): inferred latch for \"DISPLAY_TIME\[1\]\[3\]\"" { } { { "DISPLAY_DRIVER.vhd" "" { Text "E:/clock/DISPLAY_DRIVER.vhd" 21 0 0 } } } 0 10041 "Verilog HDL or VHDL info at %2!s!: inferred latch for \"%1!s!\"" 0 0}
{ "Info" "IVRFX_VRFC_LATCH_INFERRED" "DISPLAY_TIME\[2\]\[0\] DISPLAY_DRIVER.vhd(21) " "Info (10041): Verilog HDL or VHDL info at DISPLAY_DRIVER.vhd(21): inferred latch for \"DISPLAY_TIME\[2\]\[0\]\"" { } { { "DISPLAY_DRIVER.vhd" "" { Text "E:/clock/DISPLAY_DRIVER.vhd" 21 0 0 } } } 0 10041 "Verilog HDL or VHDL info at %2!s!: inferred latch for \"%1!s!\"" 0 0}
{ "Info" "IVRFX_VRFC_LATCH_INFERRED" "DISPLAY_TIME\[2\]\[1\] DISPLAY_DRIVER.vhd(21) " "Info (10041): Verilog HDL or VHDL info at DISPLAY_DRIVER.vhd(21): inferred latch for \"DISPLAY_TIME\[2\]\[1\]\"" { } { { "DISPLAY_DRIVER.vhd" "" { Text "E:/clock/DISPLAY_DRIVER.vhd" 21 0 0 } } } 0 10041 "Verilog HDL or VHDL info at %2!s!: inferred latch for \"%1!s!\"" 0 0}
{ "Info" "IVRFX_VRFC_LATCH_INFERRED" "DISPLAY_TIME\[2\]\[2\] DISPLAY_DRIVER.vhd(21) " "Info (10041): Verilog HDL or VHDL info at DISPLAY_DRIVER.vhd(21): inferred latch for \"DISPLAY_TIME\[2\]\[2\]\"" { } { { "DISPLAY_DRIVER.vhd" "" { Text "E:/clock/DISPLAY_DRIVER.vhd" 21 0 0 } } } 0 10041 "Verilog HDL or VHDL info at %2!s!: inferred latch for \"%1!s!\"" 0 0}
{ "Info" "IVRFX_VRFC_LATCH_INFERRED" "DISPLAY_TIME\[2\]\[3\] DISPLAY_DRIVER.vhd(21) " "Info (10041): Verilog HDL or VHDL info at DISPLAY_DRIVER.vhd(21): inferred latch for \"DISPLAY_TIME\[2\]\[3\]\"" { } { { "DISPLAY_DRIVER.vhd" "" { Text "E:/clock/DISPLAY_DRIVER.vhd" 21 0 0 } } } 0 10041 "Verilog HDL or VHDL info at %2!s!: inferred latch for \"%1!s!\"" 0 0}
{ "Info" "IVRFX_VRFC_LATCH_INFERRED" "DISPLAY_TIME\[3\]\[0\] DISPLAY_DRIVER.vhd(21) " "Info (10041): Verilog HDL or VHDL info at DISPLAY_DRIVER.vhd(21): inferred latch for \"DISPLAY_TIME\[3\]\[0\]\"" { } { { "DISPLAY_DRIVER.vhd" "" { Text "E:/clock/DISPLAY_DRIVER.vhd" 21 0 0 } } } 0 10041 "Verilog HDL or VHDL info at %2!s!: inferred latch for \"%1!s!\"" 0 0}
{ "Info" "IVRFX_VRFC_LATCH_INFERRED" "DISPLAY_TIME\[3\]\[1\] DISPLAY_DRIVER.vhd(21) " "Info (10041): Verilog HDL or VHDL info at DISPLAY_DRIVER.vhd(21): inferred latch for \"DISPLAY_TIME\[3\]\[1\]\"" { } { { "DISPLAY_DRIVER.vhd" "" { Text "E:/clock/DISPLAY_DRIVER.vhd" 21 0 0 } } } 0 10041 "Verilog HDL or VHDL info at %2!s!: inferred latch for \"%1!s!\"" 0 0}
{ "Info" "IVRFX_VRFC_LATCH_INFERRED" "DISPLAY_TIME\[3\]\[2\] DISPLAY_DRIVER.vhd(21) " "Info (10041): Verilog HDL or VHDL info at DISPLAY_DRIVER.vhd(21): inferred latch for \"DISPLAY_TIME\[3\]\[2\]\"" { } { { "DISPLAY_DRIVER.vhd" "" { Text "E:/clock/DISPLAY_DRIVER.vhd" 21 0 0 } } } 0 10041 "Verilog HDL or VHDL info at %2!s!: inferred latch for \"%1!s!\"" 0 0}
{ "Info" "IVRFX_VRFC_LATCH_INFERRED" "DISPLAY_TIME\[3\]\[3\] DISPLAY_DRIVER.vhd(21) " "Info (10041): Verilog HDL or VHDL info at DISPLAY_DRIVER.vhd(21): inferred latch for \"DISPLAY_TIME\[3\]\[3\]\"" { } { { "DISPLAY_DRIVER.vhd" "" { Text "E:/clock/DISPLAY_DRIVER.vhd" 21 0 0 } } } 0 10041 "Verilog HDL or VHDL info at %2!s!: inferred latch for \"%1!s!\"" 0 0}
{ "Info" "IVRFX_VRFC_LATCH_INFERRED" "DISPLAY_TIME\[4\]\[0\] DISPLAY_DRIVER.vhd(21) " "Info (10041): Verilog HDL or VHDL info at DISPLAY_DRIVER.vhd(21): inferred latch for \"DISPLAY_TIME\[4\]\[0\]\"" { } { { "DISPLAY_DRIVER.vhd" "" { Text "E:/clock/DISPLAY_DRIVER.vhd" 21 0 0 } } } 0 10041 "Verilog HDL or VHDL info at %2!s!: inferred latch for \"%1!s!\"" 0 0}
{ "Info" "IVRFX_VRFC_LATCH_INFERRED" "DISPLAY_TIME\[4\]\[1\] DISPLAY_DRIVER.vhd(21) " "Info (10041): Verilog HDL or VHDL info at DISPLAY_DRIVER.vhd(21): inferred latch for \"DISPLAY_TIME\[4\]\[1\]\"" { } { { "DISPLAY_DRIVER.vhd" "" { Text "E:/clock/DISPLAY_DRIVER.vhd" 21 0 0 } } } 0 10041 "Verilog HDL or VHDL info at %2!s!: inferred latch for \"%1!s!\"" 0 0}
{ "Info" "IVRFX_VRFC_LATCH_INFERRED" "DISPLAY_TIME\[4\]\[2\] DISPLAY_DRIVER.vhd(21) " "Info (10041): Verilog HDL or VHDL info at DISPLAY_DRIVER.vhd(21): inferred latch for \"DISPLAY_TIME\[4\]\[2\]\"" { } { { "DISPLAY_DRIVER.vhd" "" { Text "E:/clock/DISPLAY_DRIVER.vhd" 21 0 0 } } } 0 10041 "Verilog HDL or VHDL info at %2!s!: inferred latch for \"%1!s!\"" 0 0}
{ "Info" "IVRFX_VRFC_LATCH_INFERRED" "DISPLAY_TIME\[4\]\[3\] DISPLAY_DRIVER.vhd(21) " "Info (10041): Verilog HDL or VHDL info at DISPLAY_DRIVER.vhd(21): inferred latch for \"DISPLAY_TIME\[4\]\[3\]\"" { } { { "DISPLAY_DRIVER.vhd" "" { Text "E:/clock/DISPLAY_DRIVER.vhd" 21 0 0 } } } 0 10041 "Verilog HDL or VHDL info at %2!s!: inferred latch for \"%1!s!\"" 0 0}
{ "Info" "IVRFX_VRFC_LATCH_INFERRED" "DISPLAY_TIME\[5\]\[0\] DISPLAY_DRIVER.vhd(21) " "Info (10041): Verilog HDL or VHDL info at DISPLAY_DRIVER.vhd(21): inferred latch for \"DISPLAY_TIME\[5\]\[0\]\"" { } { { "DISPLAY_DRIVER.vhd" "" { Text "E:/clock/DISPLAY_DRIVER.vhd" 21 0 0 } } } 0 10041 "Verilog HDL or VHDL info at %2!s!: inferred latch for \"%1!s!\"" 0 0}
{ "Info" "IVRFX_VRFC_LATCH_INFERRED" "DISPLAY_TIME\[5\]\[1\] DISPLAY_DRIVER.vhd(21) " "Info (10041): Verilog HDL or VHDL info at DISPLAY_DRIVER.vhd(21): inferred latch for \"DISPLAY_TIME\[5\]\[1\]\"" { } { { "DISPLAY_DRIVER.vhd" "" { Text "E:/clock/DISPLAY_DRIVER.vhd" 21 0 0 } } } 0 10041 "Verilog HDL or VHDL info at %2!s!: inferred latch for \"%1!s!\"" 0 0}
{ "Info" "IVRFX_VRFC_LATCH_INFERRED" "DISPLAY_TIME\[5\]\[2\] DISPLAY_DRIVER.vhd(21) " "Info (10041): Verilog HDL or VHDL info at DISPLAY_DRIVER.vhd(21): inferred latch for \"DISPLAY_TIME\[5\]\[2\]\"" { } { { "DISPLAY_DRIVER.vhd" "" { Text "E:/clock/DISPLAY_DRIVER.vhd" 21 0 0 } } } 0 10041 "Verilog HDL or VHDL info at %2!s!: inferred latch for \"%1!s!\"" 0 0}
{ "Info" "IVRFX_VRFC_LATCH_INFERRED" "DISPLAY_TIME\[5\]\[3\] DISPLAY_DRIVER.vhd(21) " "Info (10041): Verilog HDL or VHDL info at DISPLAY_DRIVER.vhd(21): inferred latch for \"DISPLAY_TIME\[5\]\[3\]\"" { } { { "DISPLAY_DRIVER.vhd" "" { Text "E:/clock/DISPLAY_DRIVER.vhd" 21 0 0 } } } 0 10041 "Verilog HDL or VHDL info at %2!s!: inferred latch for \"%1!s!\"" 0 0}
⌨️ 快捷键说明
复制代码Ctrl + C
搜索代码Ctrl + F
全屏模式F11
增大字号Ctrl + =
减小字号Ctrl + -
显示快捷键?