alarm_counter.vhd
来自「在ACEX EP1K30TC144-3实现了闹钟功能,并能修改定时,和当前时间」· VHDL 代码 · 共 66 行
VHD
66 行
--时间计数器的源程序ALARM_COUNTER.VHD
LIBRARY IEEE;
USE IEEE.STD_LOGIC_1164.ALL;
USE WORK.P_ALARM.ALL;
ENTITY ALARM_COUNTER IS
PORT(NEW_CURRENT_TIME:IN T_CLOCK_TIME;
LOAD_NEW_C: IN STD_LOGIC;
CLK: IN STD_LOGIC;
RESET: IN STD_LOGIC;
CURRENT_TIME: OUT T_CLOCK_TIME);
END ENTITY ALARM_COUNTER;
ARCHITECTURE ART OF ALARM_COUNTER IS
SIGNAL I_CURRENT_TIME : T_CLOCK_TIME;
BEGIN
PROCESS(CLK,RESET,LOAD_NEW_C,NEW_CURRENT_TIME) IS
VARIABLE C_T:T_CLOCK_TIME;
BEGIN
IF RESET = '1' THEN
I_CURRENT_TIME <= (OTHERS=>0);
ELSIF LOAD_NEW_C ='1' THEN
I_CURRENT_TIME <= NEW_CURRENT_TIME;
ELSIF RISING_EDGE(CLK) THEN
C_T := I_CURRENT_TIME;
IF C_T(0) < 9 THEN
C_T(0) := C_T(0) + 1;
ELSE
C_T(0) := 0;
IF C_T(1) < 5 THEN
C_T(1) := C_T(1) + 1;
----------------------------------------------
ELSE
C_T(1) := 0;
IF C_T(2) < 9 THEN
C_T(2) := C_T(2) + 1;
ELSE
C_T(2) := 0;
IF C_T(3) < 5 THEN
C_T(3) := C_T(3) + 1;
------------------------------------------------
ELSE
C_T(3) := 0;
IF C_T(5) < 2 THEN
IF C_T(4) < 9 THEN
C_T(4) := C_T(4) + 1;
ELSE
C_T(4) := 0;
C_T(5) := C_T(5) + 1;
END IF;
ELSE
IF C_T(4) < 3 THEN
C_T(4) := C_T(4) + 1;
ELSE
C_T(4) := 0;
C_T(5) := 0;
END IF;
END IF;
END IF;
END IF;
END IF;
END IF;
I_CURRENT_TIME <= C_T;
END IF;
END PROCESS;
CURRENT_TIME <= I_CURRENT_TIME;
END ARCHITECTURE ART;
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