📄 read_me.txt
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READ_ME.TXT file for KCPSM3
---------------------------
[Release 8a - 4th August - New ZIP file to correct fault with PB_BMM.EXE file supplied Release 8]
Release 8
Date : 6th July 2005
Macro Version v1.30
Assembler Version v1.30
This is the 8th release of PicoBlaze for Spartan-3, Spartan-3E Virtex-II, Virtex-IIPro and
Virtex-4 devices.
Note that the main documentation for this macro, User Guide (UG129), is not included in
this package. It should be downloaded from the PicoBlaze web site (www.xilinx.com/picoblaze)
where a forum and other user pages can also be accessed.
New information
---------------
This release includes minor changes to the assembler and provides descriptions and tools to
facilitate the use of the Xilinx DATA2MEM utility (see DATA2MEM_assistance directory). This
provides a way to modify a PicoBlaze program directly in the configuration BIT file and should
be very useful for program development in designs.
Additional UART macros are provided (in VHDL) which allow parity bits to be transmitted and
received. These have been used in a few designs, but your help is requested in verifying them and
any feedback would be most welcome. Please see the VHDL directory for the additional files and notes.
My continued thanks to Nick Sawyer and Shalin Sheth of Xilinx for their ongoing support of the
Verilog files.
Relatively New Information
--------------------------
Do check out the JTAG loader utility which allows rapid modifications to be made to PSM
programs during development. Once you have used it once, you will use it all the time.
Thanks here to Kristian Chaplin of Xilinx for this very useful tool.
The assembler has a new 'INST' directive (please read Additional Assembler Notes).
Author
------
Ken Chapman
email: chapman@xilinx.com
Staff Engineer - Applications Specialist
Xilinx Ltd (UK)
email: ken.chapman@xilinx.com
picoblaze@xilinx.com
--------------------
It is advised that questions are directed to 'picoblaze@xilinx.com' especially concerning the
Verilog code. Use of the PicoBlaze forum is also encouraged.
Quick Description
-----------------
KCPSM3 is a very simple 8-bit micro controller designed to be 100% embedded into a
Spartan-3(E), Virtex-II(PRO) or Virtex-4 device and is based on the popular KCPSM and
KCPSM2 macros which have the collective name 'PicoBlaze'.
It features 16 general purpose registers and an internal 64-byte scratch pad memory.
A simple ALU supporting addition, subtraction, compare, logical operations and testing
including parity, shifts and rotates. The ALU also supports Carry and Zero flags which
can be used in conditional jumps and calls. An internal program counter stack supports
nested subroutines automatically. Controls include a reset, an interrupt and interrupt
acknowledge.
The KCPSM3 assembler is supplied to assist in the development of programs.
Performance >44 MIPS. Best of all, it uses just 96 slices
- you could fit 12 of them into an XC3S200 device, but would you ever need to?!
The main documentation is provided in User Guide UG129 and is supplemented by the original
'KCPSM3_manual.pdf' supplied with this package.
Important Note
--------------
It should be appreciated that it is virtually impossible to fully test a processor given
the almost infinite number of combinations of code and signals which can be encountered.
However, KCPSM3 benefited greatly from being based heavily on the experience gained with
KCPSM and KCPSM2 which are extremely stable designs used by thousands of engineers for
nearly five years. KCPSM3 was completed in June 2003 and has been a used by many engineers
in a wide range of applications during the past 24 months.
So although this version of KCPSM3 and the assembler are believed to be stable and fully
operational, your help is requested in the continuous verification of the functionality
of the KCPSM3 macro and assembler. All reports, (good or bad) or recommendations will be
gratefully received by the author.....
Please send your reports via email to: ken.chapman@xilinx.com
KCPSM3 Macro Revision History
-----------------------------
V1.00 - First release to users.
V1.10 - Change of '--translate off' and '--translate on' meta command directives
to '--synthesis translate off' and '--synthesis translate on'.
V1.20 - Addition of code to enhance simulation. No functional changes.
V1.30 - Functional change. The ENABLE INTERRUPT instruction is used to enable
the interrupt input and an active interrupt automatically disables future
interrupts. The functional change was made to deal with a situation in which
the ENABLE INTERRUPT instruction is being used in a program at a point where
the interrupt input is already enabled. If the execution of this instruction
occurred at the same time as an active interrupt event, the net effect was
that the interrupts were not disabled by the interrupt event. The change
has no effect on any other situation.
An improvement to the ZERO and CARRY flag logic was also made which has no
effect on functionality but is an enhancement to performance.
KCPSM3 Assembler Revision History
---------------------------------
V1.00 - First release to users.
V1.01 - Improvement to interpretation of PSM file name.
V1.10 - Support of Verilog and System Generator design flows.
V1.12 - Improved handling of TAB characters and blank lines in PSM file.
V1.13 - Allow ROM_form.v to contain concatenation statements which use curly brackets.
V1.20 - Addition of the INST directive. Improved coverage of Verilog syntax.
V1.30 - Time stamp added to the LOG, VHDL and Verilog files (The ROM_form templates
supplied with this release are required to benefit from this feature).
Generation of MEM file required by DATA2MEM.
Contents
--------
This package contains many files, but don't panic, many of them are additional
files which I hope you will find useful reference. Files have been grouped into
directories to help you find the files you would like to access.
READ_ME.TXT - This file
KCPSM3_Manual.PDF - Alternative and older form of documentation for KCPSM3.
Please see User Guide UG129 for more further information.
UART_Manual.pdf - Documentation for simple UART transmitter and Receiver macros which are
suitable for connection to KCPSM3.
UART_real_time_clock.pdf - Documentation for a reference design in which KCPSM3 and the UART macros
are used to provide a real time digital clock with alarm. The document
describes key aspects of the VHDL hardware design and assembler code.
kcpsm3.ngc - This is an alternative file defining the KCPSM3 processor and
would be used as a 'black box' in a non HDL design flow.
VHDL files
----------
kcpsm3.vhd. - The VHDL definition of the KCPSM3 processor. This file is the
primary design flow for implementation and simulation. The use of
this file is described in the documentation.
embedded_kcspm3.vhd - VHDL file in which the KCPSM3 processor is connected to its
associated program ROM. This can be used as example code and
is described in the documentation.
kcpsm3_int_test.vhd - Example design VHDL file as used in the documentation.
test_bench.vhd - Example VHDL test bench to use with kcpsm3_int_test.vhd to
reproduce the wave forms seen in the documentation.
uart_clock.vhd - VHDL hardware description for the real time clock reference design
uart_tx.vhd - UART transmitter, 8-bit, no parity, 1 stop bit, with integral 16-byte FIFO
buffer. Occupies 18 slices.
uart_rx.vhd - UART receiver, 8-bit, no parity, 1 stop bit, with integral 16-byte FIFO buffer.
Occupies 22 slices.
kcuart_tx.vhd - UART transmitter, 8-bit, no parity, 1 stop bit.
Can be used standalone, but typically used as part of uart_tx.vhd.
kcuart_rx.vhd - UART receiver, 8-bit, no parity, 1 stop bit.
Can be used standalone, but typically used as part of uart_rx.vhd.
bbfifo_16x8.vhd - A 16 byte synchronous FIFO buffer occupying 8 slices.
Used in uart_tx and uart_rx, but also useful standalone.
UART9_readme.txt - Description of the 9-bit UART macros suitable for parity operations.
NOTE: You should be familiar with the normal 8-bit UART macros and
documentation before trying these versions.
uart9_tx.vhd - 9-bit UART transmitter with integral 16-character FIFO buffer.
uart9_rx.vhd - 9-bit UART receiver with integral 16-character FIFO buffer.
kcuart9_tx.vhd - 9-bit UART transmitter.
kcuart9_rx.vhd - 9-bit UART receiver.
bbfifo9_16x9.vhd - A 16 character synchronous FIFO buffer occupying 9 slices.
Used in uart9_tx and uart9_rx, but also useful standalone.
Verilog files
-------------
kcpsm3.v. - The Verilog definition of the KCPSM3 processor. This file is the
primary design flow for implementation and simulation. The use of
this file is described in the documentation.
embedded_kcspm3.v - Verilog file in which the KCPSM3 processor is connected to its
associated program ROM. This can be used as example code and
is described in the documentation.
kcpsm3_int_test.v - Example design Verilog file as used in the documentation.
testbench.v - Example Verilog test bench to use with kcpsm3_int_test.v to
reproduce the wave forms seen in the documentation.
uart_clock.v - VHDL hardware description for the real time clock reference design
uart_tx.v - UART transmitter, 8-bit, no parity, 1 stop bit, with integral 16-byte FIFO
buffer. Occupies 18 slices.
uart_rx.v - UART receiver, 8-bit, no parity, 1 stop bit, with integral 16-byte FIFO buffer.
Occupies 22 slices.
kcuart_tx.v - UART transmitter, 8-bit, no parity, 1 stop bit.
Can be used standalone, but typically used as part of uart_tx.v.
kcuart_rx.v - UART receiver, 8-bit, no parity, 1 stop bit.
Can be used standalone, but typically used as part of uart_rx.v.
bbfifo_16x8.v - A 16 byte synchronous FIFO buffer occupying 8 slices.
Used in uart_tx and uart_rx, but also useful standalone.
Assembler Files
---------------
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