📄 vgarom.fit
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-- MAX+plus II Compiler Fit File
-- Version 10.2 07/10/2002
-- Compiled: 09/11/2004 06:15:43
-- Copyright (C) 1988-2002 Altera Corporation
-- Any megafunction design, and related net list (encrypted or decrypted),
-- support information, device programming or simulation file, and any other
-- associated documentation or information provided by Altera or a partner
-- under Altera's Megafunction Partnership Program may be used only to
-- program PLD devices (but not masked PLD devices) from Altera. Any other
-- use of such megafunction design, net list, support information, device
-- programming or simulation file, or any other related documentation or
-- information is prohibited for any other purpose, including, but not
-- limited to modification, reverse engineering, de-compiling, or use with
-- any other silicon devices, unless such use is explicitly licensed under
-- a separate agreement with Altera or a megafunction partner. Title to
-- the intellectual property, including patents, copyrights, trademarks,
-- trade secrets, or maskworks, embodied in any such megafunction design,
-- net list, support information, device programming or simulation file, or
-- any other related documentation or information provided by Altera or a
-- megafunction partner, remains with Altera, the megafunction partner, or
-- their respective licensors. No other licenses, including any licenses
-- needed under any third party's intellectual property, are provided herein.
CHIP "vgarom"
BEGIN
DEVICE = "EP1K30TC144-3";
"clk" : INPUT_PIN = 126 ;
"CLK1" : INPUT_PIN = 54 ;
"data80" : INPUT_PIN = 41 ;
"data81" : INPUT_PIN = 42 ;
"data82" : INPUT_PIN = 65 ;
"data83" : INPUT_PIN = 67 ;
"data84" : INPUT_PIN = 68 ;
"data85" : INPUT_PIN = 69 ;
"data86" : INPUT_PIN = 70 ;
"data87" : INPUT_PIN = 72 ;
"modf" : INPUT_PIN = 8 ;
"addr0" : OUTPUT_PIN = 73 ;
"addr1" : OUTPUT_PIN = 78 ;
"addr2" : OUTPUT_PIN = 79 ;
"addr3" : OUTPUT_PIN = 80 ;
"addr4" : OUTPUT_PIN = 81 ;
"addr5" : OUTPUT_PIN = 82 ;
"addr6" : OUTPUT_PIN = 83 ;
"addr7" : OUTPUT_PIN = 86 ;
"addr8" : OUTPUT_PIN = 23 ;
"addr9" : OUTPUT_PIN = 26 ;
"addr10" : OUTPUT_PIN = 29 ;
"addr11" : OUTPUT_PIN = 27 ;
"addr12" : OUTPUT_PIN = 28 ;
"addr13" : OUTPUT_PIN = 92 ;
"addr14" : OUTPUT_PIN = 95 ;
"addr15" : OUTPUT_PIN = 96 ;
"addr16" : OUTPUT_PIN = 22 ;
"addr17" : OUTPUT_PIN = 98 ;
"A18" : OUTPUT_PIN = 21 ;
"b" : OUTPUT_PIN = 141 ;
"g" : OUTPUT_PIN = 138 ;
"hs" : OUTPUT_PIN = 142 ;
"oe" : OUTPUT_PIN = 140 ;
"OE1" : OUTPUT_PIN = 20 ;
"r" : OUTPUT_PIN = 137 ;
"vs" : OUTPUT_PIN = 143 ;
"|LPM_ADD_SUB:245|addcore:adder|:83" : LOCATION = LC5_F1 ;
"|LPM_ADD_SUB:245|addcore:adder|:95" : LOCATION = LC3_F7 ;
"|LPM_ADD_SUB:245|addcore:adder|:103" : LOCATION = LC5_F4 ;
"|LPM_ADD_SUB:655|addcore:adder|:75" : LOCATION = LC1_E34;
"|LPM_ADD_SUB:655|addcore:adder|:83" : LOCATION = LC2_E34;
"|LPM_ADD_SUB:655|addcore:adder|:91" : LOCATION = LC5_E35;
"|LPM_ADD_SUB:655|addcore:adder|:95" : LOCATION = LC6_E35;
"|LPM_ADD_SUB:1186|addcore:adder|pcarry7" : LOCATION = LC3_E25;
"|LPM_ADD_SUB:1186|addcore:adder|:143" : LOCATION = LC1_E27;
"|LPM_ADD_SUB:1186|addcore:adder|:151" : LOCATION = LC8_E27;
"|LPM_ADD_SUB:1186|addcore:adder|:155" : LOCATION = LC1_E19;
"|LPM_ADD_SUB:1186|addcore:adder|:167" : LOCATION = LC1_C23;
"|LPM_ADD_SUB:1186|addcore:adder|:187" : LOCATION = LC1_E22;
"|LPM_ADD_SUB:1186|addcore:adder|:188" : LOCATION = LC7_E27;
"|LPM_ADD_SUB:1186|addcore:adder|:189" : LOCATION = LC3_E27;
"|LPM_ADD_SUB:1186|addcore:adder|:190" : LOCATION = LC5_E19;
"|LPM_ADD_SUB:1186|addcore:adder|:191" : LOCATION = LC1_D14;
"|LPM_ADD_SUB:1186|addcore:adder|:192" : LOCATION = LC7_C12;
"|LPM_ADD_SUB:1186|addcore:adder|:193" : LOCATION = LC3_C12;
"|LPM_ADD_SUB:1186|addcore:adder|:194" : LOCATION = LC5_D36;
"|LPM_ADD_SUB:1186|addcore:adder|:195" : LOCATION = LC5_B36;
"|LPM_ADD_SUB:1186|addcore:adder|:201" : LOCATION = LC8_E13;
"|LPM_ADD_SUB:1186|addcore:adder|:202" : LOCATION = LC4_E13;
"|LPM_ADD_SUB:1186|addcore:adder|:203" : LOCATION = LC6_D32;
"|LPM_MULT:1176|multcore:mult_core|csa_add:padder|csa_cell:adder0|:144" : LOCATION = LC6_E19;
"|LPM_MULT:1176|multcore:mult_core|csa_add:padder|csa_cell:adder0|:184" : LOCATION = LC2_E27;
"|LPM_MULT:1176|multcore:mult_core|csa_add:padder|lpm_add_sub:cpa_adder|addcore:adder|pcarry12" : LOCATION = LC7_E19;
"|LPM_MULT:1176|multcore:mult_core|csa_add:padder|lpm_add_sub:cpa_adder|addcore:adder|pcarry13" : LOCATION = LC3_E19;
"|LPM_MULT:1176|multcore:mult_core|csa_add:padder|lpm_add_sub:cpa_adder|addcore:adder|pcarry15" : LOCATION = LC1_C21;
"|LPM_MULT:1176|multcore:mult_core|csa_add:padder|lpm_add_sub:cpa_adder|addcore:adder|:224" : LOCATION = LC2_C21;
"|LPM_MULT:1176|multcore:mult_core|csa_add:padder|lpm_add_sub:cpa_adder|addcore:adder|:242" : LOCATION = LC5_E27;
"|LPM_MULT:1176|multcore:mult_core|csa_add:padder|lpm_add_sub:cpa_adder|addcore:adder|~243~1" : LOCATION = LC4_E19;
"|LPM_MULT:1176|multcore:mult_core|csa_add:padder|lpm_add_sub:cpa_adder|addcore:adder|:244" : LOCATION = LC2_E19;
"|LPM_MULT:1176|multcore:mult_core|csa_add:padder|lpm_add_sub:cpa_adder|addcore:adder|:246" : LOCATION = LC3_C21;
"|LPM_MULT:1176|multcore:mult_core|romout0_6" : LOCATION = LC5_E32;
"|LPM_MULT:1176|multcore:mult_core|romout0_7" : LOCATION = LC3_E32;
"|LPM_MULT:1176|multcore:mult_core|romout0_9" : LOCATION = LC3_E23;
"|LPM_MULT:1176|multcore:mult_core|romout0_12" : LOCATION = LC2_E20;
"|LPM_MULT:1176|multcore:mult_core|romout1_6" : LOCATION = LC4_E27;
"|LPM_MULT:1176|multcore:mult_core|romout1_7" : LOCATION = LC4_E36;
"|LPM_MULT:1176|multcore:mult_core|romout1_9" : LOCATION = LC7_E29;
"|LPM_MULT:1176|multcore:mult_core|romout1_12" : LOCATION = LC2_E24;
"|LPM_MULT:1176|multcore:mult_core|:2614" : LOCATION = LC2_E32;
"|LPM_MULT:1176|multcore:mult_core|:2617" : LOCATION = LC2_E36;
"|LPM_MULT:1176|multcore:mult_core|:2698" : LOCATION = LC1_E26;
"|LPM_MULT:1176|multcore:mult_core|:3305" : LOCATION = LC1_E30;
"|LPM_MULT:1176|multcore:mult_core|:3308" : LOCATION = LC2_E22;
"|LPM_MULT:1176|multcore:mult_core|:3389" : LOCATION = LC8_E19;
":38" : LOCATION = LC3_D20; -- DV1
":39" : LOCATION = LC1_A10; -- ck
":40" : LOCATION = LC1_F4 ; -- hcnt9
":41" : LOCATION = LC2_F4 ; -- hcnt8
":42" : LOCATION = LC1_F7 ; -- hcnt7
":43" : LOCATION = LC1_F15; -- hcnt6
":44" : LOCATION = LC2_F7 ; -- hcnt5
":45" : LOCATION = LC4_F1 ; -- hcnt4
":46" : LOCATION = LC6_F1 ; -- hcnt3
":47" : LOCATION = LC8_F1 ; -- hcnt2
":48" : LOCATION = LC1_F1 ; -- hcnt1
":49" : LOCATION = LC3_F1 ; -- hcnt0
":50" : LOCATION = LC1_F33; -- hs1
":51" : LOCATION = LC2_E35; -- vcnt8
":52" : LOCATION = LC4_E35; -- vcnt7
":53" : LOCATION = LC3_E35; -- vcnt6
":54" : LOCATION = LC1_E20; -- vcnt5
":55" : LOCATION = LC1_E28; -- vcnt4
":56" : LOCATION = LC5_E34; -- vcnt3
":57" : LOCATION = LC3_E34; -- vcnt2
":58" : LOCATION = LC2_E33; -- vcnt1
":59" : LOCATION = LC3_E21; -- vcnt0
":60" : LOCATION = LC1_E35; -- vs1
":61" : LOCATION = LC2_A29; -- tr
":62" : LOCATION = LC2_A31; -- tg
":63" : LOCATION = LC2_A33; -- tb
":147" : LOCATION = LC3_F4 ;
"~154~1" : LOCATION = LC4_F4 ;
":172" : LOCATION = LC2_F1 ;
":567" : LOCATION = LC3_E31;
"~584~1" : LOCATION = LC1_E31;
":842" : LOCATION = LC2_E31;
":1193" : LOCATION = LC1_A29;
":1200" : LOCATION = LC1_A31;
":1207" : LOCATION = LC1_A33;
END;
INTERNAL_INFO "vgarom"
BEGIN
DEVICE = EP1K30TC144-3;
OD0P126 : LORAX = "1:FB0->LC1_A10|";
OD2P54 : LORAX = "1:FB2->LC3_D20|";
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