freqtest.fit.eqn

基于fpga和sopc的用VHDL语言编写的EDA频率测试与FPGA单片机通讯

--A1L83 is DLOW[0]$latch~64 at LC_X27_Y15_N5
--operation mode is normal

A1L83 = SEL[2] & A1L67 # !SEL[2] & A1L47;


--A1L04 is DLOW[0]$latch~66 at LC_X27_Y15_N2
--operation mode is normal

A1L04 = LCELL(A1L04 & (A1L83 # SEL[3]) # !A1L04 & A1L83 & !SEL[3]);


--CLOCK3 is CLOCK3 at LC_X12_Y14_N2
--operation mode is normal

CLOCK3 = P37 & A1L85;


--CLOCK2 is CLOCK2 at LC_X12_Y14_N9
--operation mode is normal

CLOCK2 = P37 & A1L65;


--CLOCK1 is CLOCK1 at LC_X12_Y14_N4
--operation mode is normal

CLOCK1 = P37 & A1L45;


--F6_safe_q[3] is CNT10:U8|lpm_counter:CQI_rtl_2|cntr_ed8:auto_generated|safe_q[3] at LC_X26_Y19_N3
--operation mode is normal

F6_safe_q[3]_lut_out = F6L61 $ F6_safe_q[3];
F6_safe_q[3]_reg_input = !D6L1 & F6_safe_q[3]_lut_out;
F6_safe_q[3] = DFFEA(F6_safe_q[3]_reg_input, D5L2, !B1_CLR_CNT, , B1_Div2CLK, , );


--B1_Div2CLK is TESTCTL:U1|Div2CLK at LC_X27_Y12_N0
--operation mode is normal

B1_Div2CLK_lut_out = !B1_Div2CLK;
B1_Div2CLK = DFFEA(B1_Div2CLK_lut_out, CLK, VCC, , , , );


--F7_safe_q[3] is CNT10:U9|lpm_counter:CQI_rtl_1|cntr_ed8:auto_generated|safe_q[3] at LC_X27_Y12_N8
--operation mode is normal

F7_safe_q[3]_lut_out = F7_safe_q[3] $ F7L61;
F7_safe_q[3]_reg_input = !D7L1 & F7_safe_q[3]_lut_out;
F7_safe_q[3] = DFFEA(F7_safe_q[3]_reg_input, D6L2, !B1_CLR_CNT, , B1_Div2CLK, , );


--F5_safe_q[3] is CNT10:U7|lpm_counter:CQI_rtl_3|cntr_ed8:auto_generated|safe_q[3] at LC_X27_Y19_N9
--operation mode is normal

F5_safe_q[3]_lut_out = F5_safe_q[3] $ F5L61;
F5_safe_q[3]_reg_input = !D5L1 & F5_safe_q[3]_lut_out;
F5_safe_q[3] = DFFEA(F5_safe_q[3]_reg_input, D4L2, !B1_CLR_CNT, , B1_Div2CLK, , );


--F8_safe_q[3] is CNT10:U10|lpm_counter:CQI_rtl_0|cntr_ed8:auto_generated|safe_q[3] at LC_X26_Y15_N8
--operation mode is normal

F8_safe_q[3]_lut_out = F8_safe_q[3] $ F8L61;
F8_safe_q[3]_reg_input = !D8L1 & F8_safe_q[3]_lut_out;
F8_safe_q[3] = DFFEA(F8_safe_q[3]_reg_input, D7L2, !B1_CLR_CNT, , B1_Div2CLK, , );


--F3_safe_q[3] is CNT10:U5|lpm_counter:CQI_rtl_5|cntr_ed8:auto_generated|safe_q[3] at LC_X27_Y14_N8
--operation mode is normal

F3_safe_q[3]_lut_out = F3_safe_q[3] $ F3L61;
F3_safe_q[3]_reg_input = !D3L1 & F3_safe_q[3]_lut_out;
F3_safe_q[3] = DFFEA(F3_safe_q[3]_reg_input, GLOBAL(D2L2), !B1_CLR_CNT, , B1_Div2CLK, , );


--F2_safe_q[3] is CNT10:U4|lpm_counter:CQI_rtl_6|cntr_ed8:auto_generated|safe_q[3] at LC_X28_Y14_N3
--operation mode is normal

F2_safe_q[3]_lut_out = F2L61 $ F2_safe_q[3];
F2_safe_q[3]_reg_input = !D2L1 & F2_safe_q[3]_lut_out;
F2_safe_q[3] = DFFEA(F2_safe_q[3]_reg_input, GLOBAL(D1L2), !B1_CLR_CNT, , B1_Div2CLK, , );


--F1_safe_q[3] is CNT10:U3|lpm_counter:CQI_rtl_7|cntr_ed8:auto_generated|safe_q[3] at LC_X27_Y13_N8
--operation mode is normal

F1_safe_q[3]_lut_out = F1_safe_q[3] $ F1L61;
F1_safe_q[3]_reg_input = !D1L1 & F1_safe_q[3]_lut_out;
F1_safe_q[3] = DFFEA(F1_safe_q[3]_reg_input, GLOBAL(FSIN), !B1_CLR_CNT, , B1_Div2CLK, , );


--F4_safe_q[3] is CNT10:U6|lpm_counter:CQI_rtl_4|cntr_ed8:auto_generated|safe_q[3] at LC_X27_Y16_N3
--operation mode is normal

F4_safe_q[3]_lut_out = F4L61 $ F4_safe_q[3];
F4_safe_q[3]_reg_input = !D4L1 & F4_safe_q[3]_lut_out;
F4_safe_q[3] = DFFEA(F4_safe_q[3]_reg_input, GLOBAL(D3L2), !B1_CLR_CNT, , B1_Div2CLK, , );


--F6_safe_q[2] is CNT10:U8|lpm_counter:CQI_rtl_2|cntr_ed8:auto_generated|safe_q[2] at LC_X26_Y19_N2
--operation mode is arithmetic

F6_safe_q[2]_lut_out = F6_safe_q[2] $ !F6L31;
F6_safe_q[2]_reg_input = !D6L1 & F6_safe_q[2]_lut_out;
F6_safe_q[2] = DFFEA(F6_safe_q[2]_reg_input, D5L2, !B1_CLR_CNT, , B1_Div2CLK, , );

--F6L61 is CNT10:U8|lpm_counter:CQI_rtl_2|cntr_ed8:auto_generated|safe_q[2]~COUT0 at LC_X26_Y19_N2
--operation mode is arithmetic

F6L61_cout_0 = F6_safe_q[2] & !F6L31;
F6L61 = CARRY(F6L61_cout_0);

--F6L71 is CNT10:U8|lpm_counter:CQI_rtl_2|cntr_ed8:auto_generated|safe_q[2]~COUT1 at LC_X26_Y19_N2
--operation mode is arithmetic

F6L71_cout_1 = F6_safe_q[2] & !F6L41;
F6L71 = CARRY(F6L71_cout_1);


--F7_safe_q[2] is CNT10:U9|lpm_counter:CQI_rtl_1|cntr_ed8:auto_generated|safe_q[2] at LC_X27_Y12_N7
--operation mode is arithmetic

F7_safe_q[2]_lut_out = F7_safe_q[2] $ !F7L31;
F7_safe_q[2]_reg_input = !D7L1 & F7_safe_q[2]_lut_out;
F7_safe_q[2] = DFFEA(F7_safe_q[2]_reg_input, D6L2, !B1_CLR_CNT, , B1_Div2CLK, , );

--F7L61 is CNT10:U9|lpm_counter:CQI_rtl_1|cntr_ed8:auto_generated|safe_q[2]~COUT0 at LC_X27_Y12_N7
--operation mode is arithmetic

F7L61_cout_0 = F7_safe_q[2] & !F7L31;
F7L61 = CARRY(F7L61_cout_0);

--F7L71 is CNT10:U9|lpm_counter:CQI_rtl_1|cntr_ed8:auto_generated|safe_q[2]~COUT1 at LC_X27_Y12_N7
--operation mode is arithmetic

F7L71_cout_1 = F7_safe_q[2] & !F7L41;
F7L71 = CARRY(F7L71_cout_1);


--F5_safe_q[2] is CNT10:U7|lpm_counter:CQI_rtl_3|cntr_ed8:auto_generated|safe_q[2] at LC_X27_Y19_N8
--operation mode is arithmetic

F5_safe_q[2]_lut_out = F5_safe_q[2] $ !F5L31;
F5_safe_q[2]_reg_input = !D5L1 & F5_safe_q[2]_lut_out;
F5_safe_q[2] = DFFEA(F5_safe_q[2]_reg_input, D4L2, !B1_CLR_CNT, , B1_Div2CLK, , );

--F5L61 is CNT10:U7|lpm_counter:CQI_rtl_3|cntr_ed8:auto_generated|safe_q[2]~COUT0 at LC_X27_Y19_N8
--operation mode is arithmetic

F5L61_cout_0 = F5_safe_q[2] & !F5L31;
F5L61 = CARRY(F5L61_cout_0);

--F5L71 is CNT10:U7|lpm_counter:CQI_rtl_3|cntr_ed8:auto_generated|safe_q[2]~COUT1 at LC_X27_Y19_N8
--operation mode is arithmetic

F5L71_cout_1 = F5_safe_q[2] & !F5L41;
F5L71 = CARRY(F5L71_cout_1);


--F8_safe_q[2] is CNT10:U10|lpm_counter:CQI_rtl_0|cntr_ed8:auto_generated|safe_q[2] at LC_X26_Y15_N7
--operation mode is arithmetic

F8_safe_q[2]_lut_out = F8_safe_q[2] $ !F8L31;
F8_safe_q[2]_reg_input = !D8L1 & F8_safe_q[2]_lut_out;
F8_safe_q[2] = DFFEA(F8_safe_q[2]_reg_input, D7L2, !B1_CLR_CNT, , B1_Div2CLK, , );

--F8L61 is CNT10:U10|lpm_counter:CQI_rtl_0|cntr_ed8:auto_generated|safe_q[2]~COUT0 at LC_X26_Y15_N7
--operation mode is arithmetic

F8L61_cout_0 = F8_safe_q[2] & !F8L31;
F8L61 = CARRY(F8L61_cout_0);

--F8L71 is CNT10:U10|lpm_counter:CQI_rtl_0|cntr_ed8:auto_generated|safe_q[2]~COUT1 at LC_X26_Y15_N7
--operation mode is arithmetic

F8L71_cout_1 = F8_safe_q[2] & !F8L41;
F8L71 = CARRY(F8L71_cout_1);


--F3_safe_q[2] is CNT10:U5|lpm_counter:CQI_rtl_5|cntr_ed8:auto_generated|safe_q[2] at LC_X27_Y14_N7
--operation mode is arithmetic

F3_safe_q[2]_lut_out = F3_safe_q[2] $ !F3L31;
F3_safe_q[2]_reg_input = !D3L1 & F3_safe_q[2]_lut_out;
F3_safe_q[2] = DFFEA(F3_safe_q[2]_reg_input, GLOBAL(D2L2), !B1_CLR_CNT, , B1_Div2CLK, , );

--F3L61 is CNT10:U5|lpm_counter:CQI_rtl_5|cntr_ed8:auto_generated|safe_q[2]~COUT0 at LC_X27_Y14_N7
--operation mode is arithmetic

F3L61_cout_0 = F3_safe_q[2] & !F3L31;
F3L61 = CARRY(F3L61_cout_0);

--F3L71 is CNT10:U5|lpm_counter:CQI_rtl_5|cntr_ed8:auto_generated|safe_q[2]~COUT1 at LC_X27_Y14_N7
--operation mode is arithmetic

F3L71_cout_1 = F3_safe_q[2] & !F3L41;
F3L71 = CARRY(F3L71_cout_1);


--F2_safe_q[2] is CNT10:U4|lpm_counter:CQI_rtl_6|cntr_ed8:auto_generated|safe_q[2] at LC_X28_Y14_N2
--operation mode is arithmetic

F2_safe_q[2]_lut_out = F2_safe_q[2] $ !F2L31;
F2_safe_q[2]_reg_input = !D2L1 & F2_safe_q[2]_lut_out;
F2_safe_q[2] = DFFEA(F2_safe_q[2]_reg_input, GLOBAL(D1L2), !B1_CLR_CNT, , B1_Div2CLK, , );

--F2L61 is CNT10:U4|lpm_counter:CQI_rtl_6|cntr_ed8:auto_generated|safe_q[2]~COUT0 at LC_X28_Y14_N2
--operation mode is arithmetic

F2L61_cout_0 = F2_safe_q[2] & !F2L31;
F2L61 = CARRY(F2L61_cout_0);

--F2L71 is CNT10:U4|lpm_counter:CQI_rtl_6|cntr_ed8:auto_generated|safe_q[2]~COUT1 at LC_X28_Y14_N2
--operation mode is arithmetic

F2L71_cout_1 = F2_safe_q[2] & !F2L41;
F2L71 = CARRY(F2L71_cout_1);


--F1_safe_q[2] is CNT10:U3|lpm_counter:CQI_rtl_7|cntr_ed8:auto_generated|safe_q[2] at LC_X27_Y13_N7
--operation mode is arithmetic

F1_safe_q[2]_lut_out = F1_safe_q[2] $ !F1L31;
F1_safe_q[2]_reg_input = !D1L1 & F1_safe_q[2]_lut_out;
F1_safe_q[2] = DFFEA(F1_safe_q[2]_reg_input, GLOBAL(FSIN), !B1_CLR_CNT, , B1_Div2CLK, , );

--F1L61 is CNT10:U3|lpm_counter:CQI_rtl_7|cntr_ed8:auto_generated|safe_q[2]~COUT0 at LC_X27_Y13_N7
--operation mode is arithmetic

F1L61_cout_0 = F1_safe_q[2] & !F1L31;
F1L61 = CARRY(F1L61_cout_0);

--F1L71 is CNT10:U3|lpm_counter:CQI_rtl_7|cntr_ed8:auto_generated|safe_q[2]~COUT1 at LC_X27_Y13_N7
--operation mode is arithmetic

F1L71_cout_1 = F1_safe_q[2] & !F1L41;
F1L71 = CARRY(F1L71_cout_1);


--F4_safe_q[2] is CNT10:U6|lpm_counter:CQI_rtl_4|cntr_ed8:auto_generated|safe_q[2] at LC_X27_Y16_N2
--operation mode is arithmetic

F4_safe_q[2]_lut_out = F4_safe_q[2] $ !F4L31;
F4_safe_q[2]_reg_input = !D4L1 & F4_safe_q[2]_lut_out;
F4_safe_q[2] = DFFEA(F4_safe_q[2]_reg_input, GLOBAL(D3L2), !B1_CLR_CNT, , B1_Div2CLK, , );

--F4L61 is CNT10:U6|lpm_counter:CQI_rtl_4|cntr_ed8:auto_generated|safe_q[2]~COUT0 at LC_X27_Y16_N2
--operation mode is arithmetic

F4L61_cout_0 = F4_safe_q[2] & !F4L31;
F4L61 = CARRY(F4L61_cout_0);

--F4L71 is CNT10:U6|lpm_counter:CQI_rtl_4|cntr_ed8:auto_generated|safe_q[2]~COUT1 at LC_X27_Y16_N2
--operation mode is arithmetic

F4L71_cout_1 = F4_safe_q[2] & !F4L41;
F4L71 = CARRY(F4L71_cout_1);


--F6_safe_q[1] is CNT10:U8|lpm_counter:CQI_rtl_2|cntr_ed8:auto_generated|safe_q[1] at LC_X26_Y19_N1
--operation mode is arithmetic

F6_safe_q[1]_lut_out = F6_safe_q[1] $ F6L01;
F6_safe_q[1]_reg_input = !D6L1 & F6_safe_q[1]_lut_out;
F6_safe_q[1] = DFFEA(F6_safe_q[1]_reg_input, D5L2, !B1_CLR_CNT, , B1_Div2CLK, , );

--F6L31 is CNT10:U8|lpm_counter:CQI_rtl_2|cntr_ed8:auto_generated|safe_q[1]~COUT0 at LC_X26_Y19_N1
--operation mode is arithmetic

F6L31_cout_0 = !F6L01 # !F6_safe_q[1];
F6L31 = CARRY(F6L31_cout_0);

--F6L41 is CNT10:U8|lpm_counter:CQI_rtl_2|cntr_ed8:auto_generated|safe_q[1]~COUT1 at LC_X26_Y19_N1
--operation mode is arithmetic

F6L41_cout_1 = !F6L11 # !F6_safe_q[1];
F6L41 = CARRY(F6L41_cout_1);


--F7_safe_q[1] is CNT10:U9|lpm_counter:CQI_rtl_1|cntr_ed8:auto_generated|safe_q[1] at LC_X27_Y12_N6
--operation mode is arithmetic

F7_safe_q[1]_lut_out = F7_safe_q[1] $ F7L01;
F7_safe_q[1]_reg_input = !D7L1 & F7_safe_q[1]_lut_out;
F7_safe_q[1] = DFFEA(F7_safe_q[1]_reg_input, D6L2, !B1_CLR_CNT, , B1_Div2CLK, , );

--F7L31 is CNT10:U9|lpm_counter:CQI_rtl_1|cntr_ed8:auto_generated|safe_q[1]~COUT0 at LC_X27_Y12_N6
--operation mode is arithmetic

F7L31_cout_0 = !F7L01 # !F7_safe_q[1];
F7L31 = CARRY(F7L31_cout_0);

--F7L41 is CNT10:U9|lpm_counter:CQI_rtl_1|cntr_ed8:auto_generated|safe_q[1]~COUT1 at LC_X27_Y12_N6
--operation mode is arithmetic

F7L41_cout_1 = !F7L11 # !F7_safe_q[1];
F7L41 = CARRY(F7L41_cout_1);


--F5_safe_q[1] is CNT10:U7|lpm_counter:CQI_rtl_3|cntr_ed8:auto_generated|safe_q[1] at LC_X27_Y19_N7
--operation mode is arithmetic

F5_safe_q[1]_lut_out = F5_safe_q[1] $ F5L01;
F5_safe_q[1]_reg_input = !D5L1 & F5_safe_q[1]_lut_out;
F5_safe_q[1] = DFFEA(F5_safe_q[1]_reg_input, D4L2, !B1_CLR_CNT, , B1_Div2CLK, , );

--F5L31 is CNT10:U7|lpm_counter:CQI_rtl_3|cntr_ed8:auto_generated|safe_q[1]~COUT0 at LC_X27_Y19_N7
--operation mode is arithmetic

F5L31_cout_0 = !F5L01 # !F5_safe_q[1];
F5L31 = CARRY(F5L31_cout_0);

--F5L41 is CNT10:U7|lpm_counter:CQI_rtl_3|cntr_ed8:auto_generated|safe_q[1]~COUT1 at LC_X27_Y19_N7
--operation mode is arithmetic

F5L41_cout_1 = !F5L11 # !F5_safe_q[1];
F5L41 = CARRY(F5L41_cout_1);


--F8_safe_q[1] is CNT10:U10|lpm_counter:CQI_rtl_0|cntr_ed8:auto_generated|safe_q[1] at LC_X26_Y15_N6
--operation mode is arithmetic

F8_safe_q[1]_lut_out = F8_safe_q[1] $ F8L01;
F8_safe_q[1]_reg_input = !D8L1 & F8_safe_q[1]_lut_out;
F8_safe_q[1] = DFFEA(F8_safe_q[1]_reg_input, D7L2, !B1_CLR_CNT, , B1_Div2CLK, , );

--F8L31 is CNT10:U10|lpm_counter:CQI_rtl_0|cntr_ed8:auto_generated|safe_q[1]~COUT0 at LC_X26_Y15_N6
--operation mode is arithmetic

F8L31_cout_0 = !F8L01 # !F8_safe_q[1];
F8L31 = CARRY(F8L31_cout_0);

--F8L41 is CNT10:U10|lpm_counter:CQI_rtl_0|cntr_ed8:auto_generated|safe_q[1]~COUT1 at LC_X26_Y15_N6
--operation mode is arithmetic

F8L41_cout_1 = !F8L11 # !F8_safe_q[1];
F8L41 = CARRY(F8L41_cout_1);


--F3_safe_q[1] is CNT10:U5|lpm_counter:CQI_rtl_5|cntr_ed8:auto_generated|safe_q[1] at LC_X27_Y14_N6
--operation mode is arithmetic

F3_safe_q[1]_lut_out = F3_safe_q[1] $ F3L01;
F3_safe_q[1]_reg_input = !D3L1 & F3_safe_q[1]_lut_out;
F3_safe_q[1] = DFFEA(F3_safe_q[1]_reg_input, GLOBAL(D2L2), !B1_CLR_CNT, , B1_Div2CLK, , );

--F3L31 is CNT10:U5|lpm_counter:CQI_rtl_5|cntr_ed8:auto_generated|safe_q[1]~COUT0 at LC_X27_Y14_N6
--operation mode is arithmetic

F3L31_cout_0 = !F3L01 # !F3_safe_q[1];
F3L31 = CARRY(F3L31_cout_0);

--F3L41 is CNT10:U5|lpm_counter:CQI_rtl_5|cntr_ed8:auto_generated|safe_q[1]~COUT1 at LC_X27_Y14_N6
--operation mode is arithmetic

F3L41_cout_1 = !F3L11 # !F3_safe_q[1];
F3L41 = CARRY(F3L41_cout_1);


--F2_safe_q[1] is CNT10:U4|lpm_counter:CQI_rtl_6|cntr_ed8:auto_generated|safe_q[1] at LC_X28_Y14_N1
--operation mode is arithmetic

F2_safe_q[1]_lut_out = F2_safe_q[1] $ F2L01;
F2_safe_q[1]_reg_input = !D2L1 & F2_safe_q[1]_lut_out;
F2_safe_q[1] = DFFEA(F2_safe_q[1]_reg_input, GLOBAL(D1L2), !B1_CLR_CNT, , B1_Div2CLK, , );

--F2L31 is CNT10:U4|lpm_counter:CQI_rtl_6|cntr_ed8:auto_generated|safe_q[1]~COUT0 at LC_X28_Y14_N1
--operation mode is arithmetic

F2L31_cout_0 = !F2L01 # !F2_safe_q[1];
F2L31 = CARRY(F2L31_cout_0);

--F2L41 is CNT10:U4|lpm_counter:CQI_rtl_6|cntr_ed8:auto_generated|safe_q[1]~COUT1 at LC_X28_Y14_N1
--operation mode is arithmetic

F2L41_cout_1 = !F2L11 # !F2_safe_q[1];
F2L41 = CARRY(F2L41_cout_1);


--F1_safe_q[1] is CNT10:U3|lpm_counter:CQI_rtl_7|cntr_ed8:auto_generated|safe_q[1] at LC_X27_Y13_N6
--operation mode is arithmetic

F1_safe_q[1]_lut_out = F1_safe_q[1] $ F1L01;
F1_safe_q[1]_reg_input = !D1L1 & F1_safe_q[1]_lut_out;
F1_safe_q[1] = DFFEA(F1_safe_q[1]_reg_input, GLOBAL(FSIN), !B1_CLR_CNT, , B1_Div2CLK, , );

--F1L31 is CNT10:U3|lpm_counter:CQI_rtl_7|cntr_ed8:auto_generated|safe_q[1]~COUT0 at LC_X27_Y13_N6
--operation mode is arithmetic

F1L31_cout_0 = !F1L01 # !F1_safe_q[1];
F1L31 = CARRY(F1L31_cout_0);

--F1L41 is CNT10:U3|lpm_counter:CQI_rtl_7|cntr_ed8:auto_generated|safe_q[1]~COUT1 at LC_X27_Y13_N6
--operation mode is arithmetic

F1L41_cout_1 = !F1L11 # !F1_safe_q[1];
F1L41 = CARRY(F1L41_cout_1);


--F4_safe_q[1] is CNT10:U6|lpm_counter:CQI_rtl_4|cntr_ed8:auto_generated|safe_q[1] at LC_X27_Y16_N1
--operation mode is arithmetic

F4_safe_q[1]_lut_out = F4_safe_q[1] $ F4L01;
F4_safe_q[1]_reg_input = !D4L1 & F4_safe_q[1]_lut_out;
F4_safe_q[1] = DFFEA(F4_safe_q[1]_reg_input, GLOBAL(D3L2), !B1_CLR_CNT, , B1_Div2CLK, , );

--F4L31 is CNT10:U6|lpm_counter:CQI_rtl_4|cntr_ed8:auto_generated|safe_q[1]~COUT0 at LC_X27_Y16_N1
--operation mode is arithmetic

F4L31_cout_0 = !F4L01 # !F4_safe_q[1];
F4L31 = CARRY(F4L31_cout_0);

--F4L41 is CNT10:U6|lpm_counter:CQI_rtl_4|cntr_ed8:auto_generated|safe_q[1]~COUT1 at LC_X27_Y16_N1
--operation mode is arithmetic

F4L41_cout_1 = !F4L11 # !F4_safe_q[1];
F4L41 = CARRY(F4L41_cout_1);


--F6_safe_q[0] is CNT10:U8|lpm_counter:CQI_rtl_2|cntr_ed8:auto_generated|safe_q[0] at LC_X26_Y19_N0
--operation mode is arithmetic

F6_safe_q[0]_lut_out = !F6_safe_q[0];
F6_safe_q[0]_reg_input = !D6L1 & F6_safe_q[0]_lut_out;
F6_safe_q[0] = DFFEA(F6_safe_q[0]_reg_input, D5L2, !B1_CLR_CNT, , B1_Div2CLK, , );

--F6L01 is CNT10:U8|lpm_counter:CQI_rtl_2|cntr_ed8:auto_generated|safe_q[0]~COUT0 at LC_X26_Y19_N0
--operation mode is arithmetic

F6L01_cout_0 = F6_safe_q[0];
F6L01 = CARRY(F6L01_cout_0);

--F6L11 is CNT10:U8|lpm_counter:CQI_rtl_2|cntr_ed8:auto_generated|safe_q[0]~COUT1 at LC_X26_Y19_N0
--operation mode is arithmetic