testctl.ndb

基于fpga和sopc的用VHDL语言编写的EDA频率测试与FPGA单片机通讯

NDB006
The number of symbol table entries is: 1
The length of the symbol table is: 13

Index Hierarchy Path
----- --------------
!	&null_hpath&

The number of name info structs is : 25

InsOrder BitField SymTableIndex NextSyn SynParent Loc ChainType NextChain ChainParent FanOut DirExp ParExp ShareExp NodeName
-------- -------- ------------- ------- --------- --- --------- --------- ----------- ------ ------ ------ -------- --------
"	IeEA	!	19	5	:20	""
#	IeEA	!	19	5	:22	"$
$	L8f/	!	19	5	1	5	:23	"%
%	IGdW	!	:28	"*
&	IGdW	!	:29	"+
'	IGdW	!	:30	",
(	IGdW	!	:31	"-
)	IGdW	!	:32	".
*	IGdW	!	:33	"/
+	IGdW	!	:34	"0
,	IGdW	!	:35	"1
-	IGdW	!	:36	"2
.	IGdW	!	:37	"3
/	IGdW	!	:38	"4
0	IGdW	!	:39	"5
1	IeEA	!	27	5	:42	"8
2	LGPw	!	6	11	5	3	8	$	2	:5	q
3	IeEA	!	13	5	:9	u
4	(@\6H	!	5	11	3	$	:	2	CLK	m
5	IeE[	!	7	7	CLR_CNT	o
6	INvO	!	2	Div2CLK	q
7	IM}A	!	:	Div2CLK~1	"[
8	IeE[	!	8	10	Load	p
9	IeE[	!	6	9	TSTEN	n
:	LFWi	!	7	11	5	2	9	:	~5~1	"[