📄 freqtest.rpt
字号:
- 6 - A 15 DFFE 0 2 0 1 |REG32B:U2|:42
- 1 - A 05 DFFE 0 2 0 1 |REG32B:U2|:44
- 5 - A 13 DFFE 0 2 0 1 |REG32B:U2|:46
- 5 - A 15 DFFE 0 2 0 1 |REG32B:U2|:48
- 1 - A 21 DFFE 0 2 0 1 |REG32B:U2|:50
- 5 - A 10 DFFE 0 2 0 1 |REG32B:U2|:52
- 7 - A 10 DFFE 0 2 0 1 |REG32B:U2|:54
- 6 - C 15 DFFE 0 2 0 1 |REG32B:U2|:56
- 7 - B 11 DFFE 0 2 0 1 |REG32B:U2|:58
- 4 - B 07 DFFE 0 2 0 1 |REG32B:U2|:60
- 6 - B 09 DFFE 0 2 0 1 |REG32B:U2|:62
- 7 - C 02 DFFE 0 2 0 1 |REG32B:U2|:64
- 4 - C 07 DFFE 0 2 0 1 |REG32B:U2|:66
- 2 - B 14 DFFE 0 2 0 1 |REG32B:U2|:68
- 7 - B 09 DFFE 0 2 0 1 |REG32B:U2|:70
- 8 - C 02 DFFE 0 2 0 1 |REG32B:U2|:72
- 1 - B 16 DFFE 0 2 0 1 |REG32B:U2|:74
- 3 - B 16 DFFE 0 2 0 1 |REG32B:U2|:76
- 8 - B 09 DFFE 0 2 0 1 |REG32B:U2|:78
- 5 - C 13 DFFE 0 2 0 1 |REG32B:U2|:80
- 5 - C 07 DFFE 0 2 0 1 |REG32B:U2|:82
- 6 - B 17 DFFE 0 2 0 1 |REG32B:U2|:84
- 7 - B 17 DFFE 0 2 0 1 |REG32B:U2|:86
- 4 - C 13 DFFE 0 2 0 1 |REG32B:U2|:88
- 6 - A 08 DFFE 0 2 0 1 |REG32B:U2|:90
- 7 - A 08 DFFE 0 2 0 1 |REG32B:U2|:92
- 2 - A 06 DFFE 0 2 0 1 |REG32B:U2|:94
- 5 - A 09 DFFE 0 2 0 1 |REG32B:U2|:96
- 2 - B 20 DFFE + 0 0 0 65 |TESTCTL:U1|Div2CLK (|TESTCTL:U1|:5)
- 1 - B 15 OR2 ! 1 1 0 32 |TESTCTL:U1|:36
- 4 - C 01 DFFE 1 1 1 0 DATA11 (:462)
- 8 - C 01 DFFE 1 1 1 0 DATA10 (:463)
- 1 - D 03 DFFE 1 1 1 0 DATA9 (:464)
- 2 - D 18 DFFE 1 1 1 0 DATA8 (:465)
- 8 - D 18 DFFE 1 1 1 0 DATA7 (:466)
- 5 - D 18 DFFE 1 1 1 0 DATA6 (:467)
- 7 - D 04 DFFE 1 1 1 0 DATA5 (:468)
- 1 - E 01 DFFE 1 1 1 0 DATA4 (:469)
- 4 - E 15 DFFE 1 1 1 0 DATA3 (:470)
- 8 - E 15 DFFE 1 1 1 0 DATA2 (:471)
- 1 - F 02 DFFE 1 1 1 0 DATA1 (:472)
- 2 - F 02 DFFE 1 1 1 0 DATA0 (:473)
- 5 - C 06 AND2 4 0 0 3 :1291
- 8 - C 06 OR2 ! 4 0 0 3 :1303
- 2 - C 14 AND2 4 0 0 3 :1315
- 1 - E 10 AND2 0 1 0 1 :1318
- 2 - C 12 OR2 ! 4 0 0 7 :1327
- 7 - A 18 OR2 0 3 0 1 :1330
- 1 - C 12 OR2 ! 4 0 0 7 :1339
- 5 - A 18 OR2 0 3 0 1 :1342
- 1 - C 19 OR2 ! 4 0 0 7 :1351
- 7 - A 21 OR2 0 3 0 1 :1354
- 4 - C 19 OR2 ! 4 0 0 7 :1363
- 1 - B 11 OR2 0 3 0 1 :1366
- 3 - C 12 OR2 ! 4 0 0 7 :1375
- 8 - C 07 OR2 0 3 0 1 :1378
- 2 - C 04 OR2 ! 4 0 0 7 :1387
- 7 - C 07 OR2 0 3 0 1 :1390
- 2 - C 18 OR2 ! 4 0 0 7 :1399
- 6 - C 07 OR2 0 3 0 1 :1402
- 2 - C 09 OR2 ! 4 0 0 7 :1411
- 1 - C 07 OR2 0 3 1 1 :1414
- 6 - A 05 AND2 0 1 0 1 :1426
- 4 - A 05 OR2 0 3 0 1 :1429
- 3 - A 05 OR2 0 3 0 1 :1432
- 5 - A 05 OR2 0 3 0 1 :1435
- 6 - B 07 OR2 0 3 0 1 :1438
- 5 - B 07 OR2 0 3 0 1 :1441
- 3 - B 07 OR2 0 3 0 1 :1444
- 2 - B 07 OR2 0 3 0 1 :1447
- 1 - B 07 OR2 0 3 1 1 :1450
- 3 - A 13 AND2 0 1 0 1 :1462
- 4 - A 13 OR2 0 3 0 1 :1465
- 2 - A 13 OR2 0 3 0 1 :1468
- 1 - A 13 OR2 0 3 0 1 :1471
- 3 - B 09 OR2 0 3 0 1 :1474
- 2 - B 09 OR2 0 3 0 1 :1477
- 4 - B 09 OR2 0 3 0 1 :1480
- 5 - B 09 OR2 0 3 0 1 :1483
- 1 - B 09 OR2 0 3 1 1 :1486
- 3 - C 15 AND2 0 1 0 1 :1498
- 4 - C 15 OR2 0 3 0 1 :1501
- 2 - C 15 OR2 0 3 0 1 :1504
- 1 - C 15 OR2 0 3 0 1 :1507
- 5 - C 02 OR2 0 3 0 1 :1510
- 4 - C 02 OR2 0 3 0 1 :1513
- 3 - C 13 OR2 0 3 0 1 :1516
- 2 - C 13 OR2 0 3 0 1 :1519
- 1 - C 13 OR2 0 3 1 1 :1522
- 3 - C 06 OR2 0 3 0 1 :1531
- 4 - C 06 OR2 0 4 0 1 :1542
- 2 - C 07 AND2 0 4 0 1 :1551
- 3 - C 07 AND2 0 4 0 2 :1558
- 1 - C 06 OR2 0 4 0 1 :1570
- 6 - C 06 AND2 0 3 0 1 :1578
- 1 - C 02 AND2 0 4 0 1 :1587
- 6 - C 02 AND2 0 4 0 2 :1594
- 2 - C 06 OR2 0 4 0 1 :1606
- 7 - C 06 AND2 0 3 0 1 :1614
- 3 - C 02 AND2 0 4 0 1 :1623
- 2 - C 02 AND2 0 4 0 2 :1630
- 3 - F 02 AND2 1 1 0 4 :2981
- 3 - C 03 AND2 1 1 0 4 :2982
- 1 - C 01 AND2 1 1 0 4 :2983
- 2 - A 08 CARRY 0 3 0 1 |CNT10:U3|LPM_ADD_SUB:77|addcore:adder|pcarry0_0
- 3 - A 08 CARRY 0 4 0 1 |CNT10:U3|LPM_ADD_SUB:77|addcore:adder|pcarry0_1
- 4 - A 08 CARRY 0 4 0 1 |CNT10:U3|LPM_ADD_SUB:77|addcore:adder|pcarry0_2
- 2 - B 17 CARRY 0 3 0 1 |CNT10:U4|LPM_ADD_SUB:77|addcore:adder|pcarry0_0
- 3 - B 17 CARRY 0 4 0 1 |CNT10:U4|LPM_ADD_SUB:77|addcore:adder|pcarry0_1
- 4 - B 17 CARRY 0 4 0 1 |CNT10:U4|LPM_ADD_SUB:77|addcore:adder|pcarry0_2
- 5 - B 16 CARRY 0 3 0 1 |CNT10:U5|LPM_ADD_SUB:77|addcore:adder|pcarry0_0
- 6 - B 16 CARRY 0 4 0 1 |CNT10:U5|LPM_ADD_SUB:77|addcore:adder|pcarry0_1
- 7 - B 16 CARRY 0 4 0 1 |CNT10:U5|LPM_ADD_SUB:77|addcore:adder|pcarry0_2
- 3 - B 14 CARRY 0 3 0 1 |CNT10:U6|LPM_ADD_SUB:77|addcore:adder|pcarry0_0
- 4 - B 14 CARRY 0 4 0 1 |CNT10:U6|LPM_ADD_SUB:77|addcore:adder|pcarry0_1
- 5 - B 14 CARRY 0 4 0 1 |CNT10:U6|LPM_ADD_SUB:77|addcore:adder|pcarry0_2
- 2 - B 11 CARRY 0 3 0 1 |CNT10:U7|LPM_ADD_SUB:77|addcore:adder|pcarry0_0
- 3 - B 11 CARRY 0 4 0 1 |CNT10:U7|LPM_ADD_SUB:77|addcore:adder|pcarry0_1
- 4 - B 11 CARRY 0 4 0 1 |CNT10:U7|LPM_ADD_SUB:77|addcore:adder|pcarry0_2
- 1 - A 10 CARRY 0 3 0 1 |CNT10:U8|LPM_ADD_SUB:77|addcore:adder|pcarry0_0
- 2 - A 10 CARRY 0 4 0 1 |CNT10:U8|LPM_ADD_SUB:77|addcore:adder|pcarry0_1
- 3 - A 10 CARRY 0 4 0 1 |CNT10:U8|LPM_ADD_SUB:77|addcore:adder|pcarry0_2
- 1 - A 15 CARRY 0 3 0 1 |CNT10:U9|LPM_ADD_SUB:77|addcore:adder|pcarry0_0
- 2 - A 15 CARRY 0 4 0 1 |CNT10:U9|LPM_ADD_SUB:77|addcore:adder|pcarry0_1
- 3 - A 15 CARRY 0 4 0 1 |CNT10:U9|LPM_ADD_SUB:77|addcore:adder|pcarry0_2
- 1 - A 18 CARRY 0 3 0 1 |CNT10:U10|LPM_ADD_SUB:77|addcore:adder|pcarry0_0
- 2 - A 18 CARRY 0 4 0 1 |CNT10:U10|LPM_ADD_SUB:77|addcore:adder|pcarry0_1
- 3 - A 18 CARRY 0 4 0 1 |CNT10:U10|LPM_ADD_SUB:77|addcore:adder|pcarry0_2
Code:
s = Synthesized pin or logic cell
+ = Synchronous flipflop
/ = Slow slew-rate output
! = NOT gate push-back
r = Fitter-inserted logic cell
^ = Increased input delay
* = PCI I/O is enabled
p = Packed register
Device-Specific Information: f:\xd_dsp\disk5\pk-1k30\sendfreok\freqtest.rpt
freqtest
** FASTTRACK INTERCONNECT UTILIZATION **
Row FastTrack Interconnect:
Global Left Half- Right Half-
FastTrack FastTrack FastTrack
Row Interconnect Interconnect Interconnect Input Pins Output Pins Bidir Pins
A: 4/144( 2%) 18/ 72( 25%) 0/ 72( 0%) 0/16( 0%) 0/16( 0%) 0/16( 0%)
B: 3/144( 2%) 21/ 72( 29%) 0/ 72( 0%) 0/16( 0%) 0/16( 0%) 0/16( 0%)
C: 8/144( 5%) 33/ 72( 45%) 0/ 72( 0%) 2/16( 12%) 2/16( 12%) 0/16( 0%)
D: 0/144( 0%) 11/ 72( 15%) 0/ 72( 0%) 0/16( 0%) 5/16( 31%) 0/16( 0%)
E: 0/144( 0%) 9/ 72( 12%) 0/ 72( 0%) 0/16( 0%) 3/16( 18%) 0/16( 0%)
F: 1/144( 0%) 5/ 72( 6%) 0/ 72( 0%) 0/16( 0%) 2/16( 12%) 0/16( 0%)
Column FastTrack Interconnect:
FastTrack
Column Interconnect Input Pins Output Pins Bidir Pins
01: 2/24( 8%) 1/4( 25%) 0/4( 0%) 0/4( 0%)
02: 2/24( 8%) 1/4( 25%) 0/4( 0%) 0/4( 0%)
03: 2/24( 8%) 1/4( 25%) 0/4( 0%) 0/4( 0%)
04: 2/24( 8%) 1/4( 25%) 0/4( 0%) 0/4( 0%)
05: 3/24( 12%) 1/4( 25%) 0/4( 0%) 0/4( 0%)
06: 1/24( 4%) 1/4( 25%) 0/4( 0%) 0/4( 0%)
07: 3/24( 12%) 0/4( 0%) 1/4( 25%) 0/4( 0%)
08: 3/24( 12%) 0/4( 0%) 1/4( 25%) 0/4( 0%)
09: 4/24( 16%) 0/4( 0%) 1/4( 25%) 0/4( 0%)
10: 1/24( 4%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
11: 3/24( 12%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
12: 3/24( 12%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
13: 2/24( 8%) 0/4( 0%) 1/4( 25%) 0/4( 0%)
14: 2/24( 8%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
15: 3/24( 12%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
16: 1/24( 4%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
17: 2/24( 8%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
18: 2/24( 8%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
19: 2/24( 8%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
20: 1/24( 4%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
21: 1/24( 4%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
22: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
23: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
24: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
25: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
26: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
27: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
28: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
29: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
30: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
31: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
32: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
33: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
34: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
35: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
36: 1/24( 4%) 1/4( 25%) 0/4( 0%) 0/4( 0%)
EA: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
Device-Specific Information: f:\xd_dsp\disk5\pk-1k30\sendfreok\freqtest.rpt
freqtest
** CLOCK SIGNALS **
Type Fan-out Name
DFF 66 |TESTCTL:U1|Div2CLK
LCELL 4 :2983
LCELL 4 :2982
LCELL 4 :2981
INPUT 4 FSIN
LCELL 4 |CNT10:U9|:185
LCELL 4 |CNT10:U8|:185
LCELL 4 |CNT10:U7|:185
LCELL 4 |CNT10:U6|:185
LCELL 4 |CNT10:U5|:185
LCELL 4 |CNT10:U4|:185
LCELL 4 |CNT10:U3|:185
INPUT 2 CLK
Device-Specific Information: f:\xd_dsp\disk5\pk-1k30\sendfreok\freqtest.rpt
freqtest
** CLEAR SIGNALS **
Type Fan-out Name
LCELL 32 |TESTCTL:U1|:36
Device-Specific Information: f:\xd_dsp\disk5\pk-1k30\sendfreok\freqtest.rpt
freqtest
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