decl7s.fit.eqn

基于fpga和sopc的用VHDL语言编写的EDA7段数码显示译码器

--A1L41 is Mux~7 at LC_X34_Y16_N5
--operation mode is normal

A1L41 = A[0] & (A[3] # A[2] $ A[1]) # !A[0] & (A[1] # A[3] $ A[2]);


--A1L51 is Mux~9 at LC_X34_Y16_N9
--operation mode is normal

A1L51 = A[2] & A[0] & (A[3] $ A[1]) # !A[2] & !A[3] & (A[1] # A[0]);


--A1L61 is Mux~11 at LC_X34_Y16_N8
--operation mode is normal

A1L61 = A[1] & !A[3] & A[0] # !A[1] & (A[2] & !A[3] # !A[2] & A[0]);


--A1L71 is Mux~13 at LC_X34_Y16_N2
--operation mode is normal

A1L71 = A[1] & (A[2] & A[0] # !A[2] & A[3] & !A[0]) # !A[1] & !A[3] & (A[2] $ A[0]);


--A1L81 is Mux~15 at LC_X34_Y16_N6
--operation mode is normal

A1L81 = A[3] & A[2] & (A[1] # !A[0]) # !A[3] & !A[2] & A[1] & !A[0];


--A1L91 is Mux~17 at LC_X34_Y16_N7
--operation mode is normal

A1L91 = A[3] & (A[0] & A[1] # !A[0] & A[2]) # !A[3] & A[2] & (A[1] $ A[0]);


--A1L02 is Mux~19 at LC_X34_Y16_N4
--operation mode is normal

A1L02 = A[3] & A[0] & (A[2] $ A[1]) # !A[3] & !A[1] & (A[2] $ A[0]);


--A[0] is A[0] at PIN_3
--operation mode is input

A[0] = INPUT();


--A[1] is A[1] at PIN_4
--operation mode is input

A[1] = INPUT();


--A[2] is A[2] at PIN_6
--operation mode is input

A[2] = INPUT();


--A[3] is A[3] at PIN_7
--operation mode is input

A[3] = INPUT();


--LED7S[6] is LED7S[6] at PIN_167
--operation mode is output

LED7S[6] = OUTPUT(A1L41);


--LED7S[5] is LED7S[5] at PIN_166
--operation mode is output

LED7S[5] = OUTPUT(!A1L51);


--LED7S[4] is LED7S[4] at PIN_165
--operation mode is output

LED7S[4] = OUTPUT(!A1L61);


--LED7S[3] is LED7S[3] at PIN_164
--operation mode is output

LED7S[3] = OUTPUT(!A1L71);


--LED7S[2] is LED7S[2] at PIN_163
--operation mode is output

LED7S[2] = OUTPUT(!A1L81);


--LED7S[1] is LED7S[1] at PIN_162
--operation mode is output

LED7S[1] = OUTPUT(!A1L91);


--LED7S[0] is LED7S[0] at PIN_161
--operation mode is output

LED7S[0] = OUTPUT(!A1L02);