videogenerator.mrp

用lattice XP3 demo板设计的VGA信号发生器

--------------------
Block un2_countforhorizontal_1_0_axb_10 was optimized away.
Block un2_countforhorizontal_1_0_axb_9 was optimized away.
Block un2_countforhorizontal_1_0_axb_8 was optimized away.
Block un2_countforhorizontal_1_0_axb_7 was optimized away.
Block un2_countforhorizontal_1_0_axb_6 was optimized away.
Block un2_countforhorizontal_1_0_axb_5 was optimized away.
Block un2_countforhorizontal_1_0_axb_4 was optimized away.
Block un2_countforhorizontal_1_0_axb_3 was optimized away.
Block un2_countforhorizontal_1_0_axb_2 was optimized away.
Block un2_countforhorizontal_1_0_axb_1 was optimized away.
Block un2_countforhorizontal_1_0_axb_0 was optimized away.
Block un1_countforvertical_0_axb_12 was optimized away.
Block un1_countforvertical_0_axb_11 was optimized away.
Block un1_countforvertical_0_axb_10 was optimized away.
Block un1_countforvertical_0_axb_9 was optimized away.
Block un1_countforvertical_0_axb_8 was optimized away.
Block un1_countforvertical_0_axb_7 was optimized away.
Block un1_countforvertical_0_axb_6 was optimized away.
Block un1_countforvertical_0_axb_5 was optimized away.
Block un1_countforvertical_0_axb_4 was optimized away.
Block un1_countforvertical_0_axb_3 was optimized away.
Block un1_countforvertical_0_axb_2 was optimized away.
Block un1_countforvertical_0_axb_1 was optimized away.
Block un1_countforvertical_0_axb_0 was optimized away.
Block GND_0 was optimized away.
Block VCC_0 was optimized away.

Symbol Cross Reference
----------------------

SLICE_0 (PFU) covers blocks: un2_countforhorizontal_1_0_cry_0_0
SLICE_1 (PFU) covers blocks: un1_countforvertical_0_s_12_0
SLICE_2 (PFU) covers blocks: un1_countforvertical_0_cry_10_0
SLICE_3 (PFU) covers blocks: un1_countforvertical_0_cry_8_0
SLICE_4 (PFU) covers blocks: un1_countforvertical_0_cry_6_0
SLICE_5 (PFU) covers blocks: un1_countforvertical_0_cry_4_0
SLICE_6 (PFU) covers blocks: un1_countforvertical_0_cry_2_0
SLICE_7 (PFU) covers blocks: un1_countforvertical_0_cry_0_0
SLICE_8 (PFU) covers blocks: un2_countforhorizontal_1_0_s_12_0
SLICE_9 (PFU) covers blocks: un2_countforhorizontal_1_0_cry_10_0
SLICE_10 (PFU) covers blocks: un2_countforhorizontal_1_0_cry_8_0
SLICE_11 (PFU) covers blocks: un2_countforhorizontal_1_0_cry_6_0
SLICE_12 (PFU) covers blocks: un2_countforhorizontal_1_0_cry_4_0
SLICE_13 (PFU) covers blocks: un2_countforhorizontal_1_0_cry_2_0
SLICE_14 (PFU) covers blocks: un65_pixelclock_5, VGAdena_0_sqmuxa, VGAdenaZ0
SLICE_15 (PFU) covers blocks: VGAh_cs_3_iv, VGAh_cs_i_m, VGAh_csZ0
SLICE_16 (PFU) covers blocks: VGAv_2_f0, VGAvZ0
SLICE_17 (PFU) covers blocks: countforcolor_2_axbxc0, countforcolor_2_axbxc1,
     countforcolor_0, countforcolor_1
SLICE_18 (PFU) covers blocks: countforcolor_2_axbxc2, countforcolor_2_axbxc3,
     countforcolor_2, countforcolor_3
SLICE_19 (PFU) covers blocks: countforcolor_2_axbxc4, countforcolor_2_axbxc5,
     countforcolor_4, countforcolor_5
SLICE_20 (PFU) covers blocks: countforhorizontal_3_0, countforhorizontal_3_1,
     countforhorizontal_0, countforhorizontal_1
SLICE_21 (PFU) covers blocks: countforhorizontal_2

                                    Page 5




Design:  VideoGenerator                                Date:  06/16/07  17:34:42

Symbol Cross Reference (cont)
-----------------------------
SLICE_22 (PFU) covers blocks: countforhorizontal_3_3, countforhorizontal_3_4,
     countforhorizontal_3, countforhorizontal_4
SLICE_23 (PFU) covers blocks: countforhorizontal_3_5, countforhorizontal_3_6,
     countforhorizontal_5, countforhorizontal_6
SLICE_24 (PFU) covers blocks: countforhorizontal_7, countforhorizontal_8
SLICE_25 (PFU) covers blocks: countforhorizontal_9
SLICE_26 (PFU) covers blocks: countforhorizontal_3_10, un7_pixelclock_4,
     countforhorizontal_10, countforhorizontal_11
SLICE_27 (PFU) covers blocks: countforhorizontal_12
SLICE_28 (PFU) covers blocks: countforhorizontal_3_fast_0,
     un11_pixelclocklto12_2, countforhorizontal_fast_0
SLICE_29 (PFU) covers blocks: countforph_0__fb, countforph_1__fb, countforph_0,
     countforph_1
SLICE_30 (PFU) covers blocks: countforph_4_2, countforph_4_3, countforph_2,
     countforph_3
SLICE_31 (PFU) covers blocks: countforph_4_4, countforph_4_5,
     un1_countforph_axbxc5, countforph_4, countforph_5
SLICE_32 (PFU) covers blocks: countforph_4_6, countforph_6
SLICE_33 (PFU) covers blocks: countforvertical_0__fb, countforvertical_0
SLICE_35 (PFU) covers blocks: g0_3, g0_4, countforvertical_2, countforvertical_3
SLICE_37 (PFU) covers blocks: countforvertical_3_xx_mm_5,
     countforvertical_3_xx_mm_6, countforvertical_5, countforvertical_6
SLICE_39 (PFU) covers blocks: countforvertical_3_8, un63_pixelclocklto12_4,
     countforvertical_8
SLICE_40 (PFU) covers blocks: countforvertical_9, countforvertical_10
SLICE_41 (PFU) covers blocks: countforvertical_11, countforvertical_12
SLICE_42 (PFU) covers blocks: pixelClock_i, pixelClock
SLICE_43 (PFU) covers blocks: un51_pixelclocklto12_1_0, g0_7
SLICE_44 (PFU) covers blocks: un65_pixelclock_5_1,
     VGAdena_0_sqmuxa_1_0_m2_i_a3_1_0
SLICE_45 (PFU) covers blocks: un25_pixelclock_3_1, un25_pixelclock_L1_sx
SLICE_46 (PFU) covers blocks: g0_i_0, g0_i_0_L1, countforvertical_1
SLICE_47 (PFU) covers blocks: countforvertical_3_sn_m1_0,
     countforvertical_3_sn_m1_0_L1
SLICE_48 (PFU) covers blocks: un25_pixelclock_7_m2_0_a2_a0_x_1,
     un25_pixelclock_7_m2_0_a2_a0_x
SLICE_49 (PFU) covers blocks: un1_countforph_p4, un1_countforph_axbxc6
SLICE_50 (PFU) covers blocks: countforcolor_2_p4, un77_pixelclock
SLICE_51 (PFU) covers blocks: un51_pixelclocklto12_1, un65_pixelclock_1
SLICE_52 (PFU) covers blocks: un57_pixelclocklto9_1, un57_pixelclocklto10
SLICE_53 (PFU) covers blocks: un1_countforph_axbxc4, un77_pixelclock_2
SLICE_54 (PFU) covers blocks: un7_pixelclock_4_1_0,
     un25_pixelclock_7_m2_0_a2_a0_sx_0
SLICE_55 (PFU) covers blocks: un7_pixelclock_3_0, un25_pixelclock_1
SLICE_56 (PFU) covers blocks: un33_pixelclocklto12_3_0, un33_pixelclocklto12
SLICE_57 (PFU) covers blocks: un51_pixelclocklto6_2_0_0, un51_pixelclocklto6_2_1
SLICE_58 (PFU) covers blocks: countforverticalce_1, un25_pixelclock
SLICE_59 (PFU) covers blocks: countforvertical_3_0_0_4, un65_pixelclock_5_1_1
SLICE_60 (PFU) covers blocks: un63_pixelclocklto12_5, un63_pixelclocklto12_0
SLICE_61 (PFU) covers blocks: un25_pixelclock_3, g0_13
SLICE_62 (PFU) covers blocks: un63_pixelclocklto12_2, un63_pixelclocklto12_2_L1
SLICE_63 (PFU) covers blocks: un63_pixelclocklto12_1, un63_pixelclocklto12_1_L1
SLICE_64 (PFU) covers blocks: g0_6_0, g0_12
SLICE_65 (PFU) covers blocks: g0_4_8, g0_6
SLICE_66 (PFU) covers blocks: g0_8, g0_11
SLICE_67 (PFU) covers blocks: un11_pixelclocklto6_1, un11_pixelclocklto6

                                    Page 6




Design:  VideoGenerator                                Date:  06/16/07  17:34:42

Symbol Cross Reference (cont)
-----------------------------
SLICE_68 (PFU) covers blocks: g0_13_1, un25_pixelclock_7_m2_0_a2_a0
SLICE_69 (PFU) covers blocks: g0_13_L10, g0_13_L10_L3
SLICE_70 (PFU) covers blocks: VGAg_4_1, VGAr_5_0
SLICE_71 (PFU) covers blocks: VGAb_4_0, VGAb_4_1
SLICE_72 (PFU) covers blocks: un33_pixelclocklto12_1, g0_13_L10_L8
SLICE_73 (PFU) covers blocks: un25_pixelclock_7_m2_0_a2_a0_sx_1,
     un7_pixelclock_3_0_x
SLICE_74 (PFU) covers blocks: un1_countforph_axbxc5, un1_countforph_axbxc3
SLICE_75 (PFU) covers blocks: g0_14, un65_pixelclock_d_0, countforvertical_7
SLICE_76 (PFU) covers blocks: un63_pixelclocklto12_0_1, g0_1, countforvertical_4
SLICE_77 (PFU) covers blocks: un25_pixelclock_7_m2_0_a2_a0_sx_2,
     un11_pixelclocklto12_0
SLICE_78 (PFU) covers blocks: g0_6_1, g0_4_9
SLICE_79 (PFU) covers blocks: un57_pixelclocklto10_1, un7_pixelclock_4_x
SLICE_80 (PFU) covers blocks: VGAdena_fb
SLICE_81 (PFU) covers blocks: VGAr_5_1
SLICE_82 (PFU) covers blocks: countforph_1_sqmuxa
SLICE_83 (PFU) covers blocks: countforph_4_1
SLICE_84 (PFU) covers blocks: VGAg_4_0
SLICE_85 (PFU) covers blocks: g0_13_L10_L5
UARTtx (PIC/PIO) covers blocks: UARTtx_pad
clk (PIC/PIO) covers blocks: clk_pad
NUMdata_7 (PIC/PIO) covers blocks: NUMdata_pad_7
NUMdata_6 (PIC/PIO) covers blocks: NUMdata_pad_6
NUMdata_5 (PIC/PIO) covers blocks: NUMdata_pad_5
NUMdata_4 (PIC/PIO) covers blocks: NUMdata_pad_4
NUMdata_3 (PIC/PIO) covers blocks: NUMdata_pad_3
NUMdata_2 (PIC/PIO) covers blocks: NUMdata_pad_2
NUMdata_1 (PIC/PIO) covers blocks: NUMdata_pad_1
NUMdata_0 (PIC/PIO) covers blocks: NUMdata_pad_0
NUMlocation_3 (PIC/PIO) covers blocks: NUMlocation_pad_3
NUMlocation_2 (PIC/PIO) covers blocks: NUMlocation_pad_2
NUMlocation_1 (PIC/PIO) covers blocks: NUMlocation_pad_1
NUMlocation_0 (PIC/PIO) covers blocks: NUMlocation_pad_0
VGAdena (PIC/PIO) covers blocks: VGAdena_pad
VGAv (PIC/PIO) covers blocks: VGAv_pad
VGAh_cs (PIC/PIO) covers blocks: VGAh_cs_pad
VGAb_1 (PIC/PIO) covers blocks: VGAb_pad_1, VGAb_0io_1
VGAb_0 (PIC/PIO) covers blocks: VGAb_pad_0, VGAb_0io_0
VGAg_1 (PIC/PIO) covers blocks: VGAg_pad_1, VGAg_0io_1
VGAg_0 (PIC/PIO) covers blocks: VGAg_pad_0, VGAg_0io_0
VGAr_1 (PIC/PIO) covers blocks: VGAr_pad_1, VGAr_0io_1
VGAr_0 (PIC/PIO) covers blocks: VGAr_pad_0, VGAr_0io_0

Signal Cross Reference
----------------------

Signal un2_countforhorizontal_1_0_cry_1 - Driver Comp: SLICE_0:O6
   Load Comps: SLICE_13:I17
Signal un2_countforhorizontal_1_n_1 - Driver Comp:
   Load Comps: SLICE_0:O4, SLICE_20:I7, SLICE_48:I2, SLICE_54:I1, SLICE_57:I7,
        SLICE_64:I1, SLICE_67:I1, SLICE_79:I8
Signal clk_c - Driver Comp: clk:O0
   Load Comps: SLICE_14:I15, SLICE_15:I15, SLICE_16:I15, SLICE_17:I15,
        SLICE_18:I15, SLICE_19:I15, SLICE_20:I15, SLICE_21:I15, SLICE_22:I15,
        SLICE_23:I15, SLICE_24:I15, SLICE_25:I15, SLICE_26:I15, SLICE_27:I15,

                                    Page 7




Design:  VideoGenerator                                Date:  06/16/07  17:34:42

Signal Cross Reference (cont)
-----------------------------
        SLICE_28:I15, SLICE_29:I15, SLICE_30:I15, SLICE_31:I15, SLICE_32:I15,
        SLICE_33:I15, SLICE_35:I15, SLICE_37:I15, SLICE_39:I15, SLICE_40:I15,
        SLICE_41:I15, SLICE_42:I15, SLICE_46:I15, SLICE_75:I15, SLICE_76:I15,
        VGAb_1_MGIOL:I2, VGAb_0_MGIOL:I2, VGAg_1_MGIOL:I2, VGAg_0_MGIOL:I2,
        VGAr_1_MGIOL:I2, VGAr_0_MGIOL:I2
Signal VGAdena_0_sqmuxa_1 - Driver Comp: SLICE_14:O0
   Load Comps: SLICE_14:I12
Signal VGAdena_fbZ0 - Driver Comp: SLICE_80:O0
   Load Comps: SLICE_14:I16
Signal VGAdena_c - Driver Comp: SLICE_14:O3
   Load Comps: SLICE_29:I3, SLICE_30:I7, SLICE_31:I1, SLICE_31:I9, SLICE_32:I0,
        SLICE_70:I0, SLICE_70:I6, SLICE_71:I0, SLICE_71:I6, SLICE_80:I0,
        SLICE_81:I0, SLICE_82:I0, SLICE_83:I0, SLICE_84:I0, VGAdena:I0
Signal countforph_1__fbZ0 - Driver Comp: SLICE_29:O1
   Load Comps: SLICE_29:I13
Signal countforphZ0Z_1 - Driver Comp: SLICE_29:O4
   Load Comps: SLICE_29:I6, SLICE_30:I1, SLICE_49:I1, SLICE_53:I8, SLICE_74:I7,
        SLICE_83:I2
Signal VGAb_4Z0Z_1 - Driver Comp: SLICE_71:O1
   Load Comps: VGAb_1_MGIOL:I8
Signal pixelClockZ0 - Driver Comp: SLICE_42:O3
   Load Comps: SLICE_14:I8, SLICE_15:I14, SLICE_16:I14, SLICE_17:I14,
        SLICE_18:I14, SLICE_19:I14, SLICE_20:I14, SLICE_21:I14, SLICE_22:I14,
        SLICE_23:I14, SLICE_24:I14, SLICE_25:I14, SLICE_26:I14, SLICE_27:I14,
        SLICE_28:I14, SLICE_29:I0, SLICE_29:I8, SLICE_30:I14, SLICE_31:I14,
        SLICE_32:I14, SLICE_33:I0, SLICE_35:I14, SLICE_37:I14, SLICE_39:I14,
        SLICE_42:I0, SLICE_58:I0, SLICE_80:I1, VGAb_1_MGIOL:I3, VGAb_0_MGIOL:I3,
        VGAg_1_MGIOL:I3, VGAg_0_MGIOL:I3, VGAr_1_MGIOL:I3, VGAr_0_MGIOL:I3
Signal VGAb_c_1 - Driver Comp: VGAb_1_MGIOL:O0
   Load Comps: VGAb_1:I1
Signal VGAh_cs_3 - Driver Comp: SLICE_15:O0
   Load Comps: SLICE_15:I12
Signal VGAh_cs_c - Driver Comp: SLICE_15:O3
   Load Comps: SLICE_14:I6, SLICE_15:I7, SLICE_80:I3, VGAh_cs:I0
Signal countforvertical_3_sn_m1_0_LZ0Z1 - Driver Comp: SLICE_47:O1
   Load Comps: SLICE_47:I0
Signal un2_countforhorizontal_1_n_11 - Driver Comp:
   Load Comps: SLICE_9:O4, SLICE_26:I5, SLICE_28:I8, SLICE_47:I1, SLICE_51:I0,
        SLICE_77:I3
Signal un2_countforhorizontal_1_n_12 - Driver Comp:
   Load Comps: SLICE_8:O3, SLICE_27:I4, SLICE_28:I9, SLICE_47:I2, SLICE_48:I7,
        SLICE_51:I1, SLICE_68:I6
Signal un25_pixelclock_0 - Driver Comp: SLICE_47:O0
   Load Comps: SLICE_55:I9, SLICE_68:I3
Signal un2_countforhorizontal_1_n_6 - Driver Comp:
   Load Comps: SLICE_11:O3, SLICE_23:I7, SLICE_26:I7, SLICE_45:I1, SLICE_48:I0,
        SLICE_54:I7, SLICE_57:I3, SLICE_64:I9, SLICE_67:I8, SLICE_79:I3,
        SLICE_79:I6
Signal un2_countforhorizontal_1_n_5 - Driver Comp:
   Load Comps: SLICE_12:O4, SLICE_23:I1, SLICE_26:I6, SLICE_45:I0, SLICE_48:I1,
        SLICE_54:I6, SLICE_57:I2, SLICE_67:I7, SLICE_79:I2, SLICE_79:I7
Signal countforhorizontalZ0Z_0 - Driver Comp: SLICE_20:O3
   Load Comps: SLICE_20:I1, SLICE_48:I3, SLICE_54:I0, SLICE_57:I6, SLICE_64:I0,
        SLICE_67:I0, SLICE_79:I9
Signal un25_pixelclock_7_m2_0_a2_a0_xZ0Z_1 - Driver Comp: SLICE_48:O0
   Load Comps: SLICE_48:I8

                                    Page 8




Design:  VideoGenerator                                Date:  06/16/07  17:34:42

Signal Cross Reference (cont)
-----------------------------
Signal un7_pixelclock_4_xZ0 - Driver Comp: SLICE_79:O1
   Load Comps: SLICE_43:I6