videogenerator.mrp

用lattice XP3 demo板设计的VGA信号发生器

           Lattice Mapping Report File for Design 'VideoGenerator'

Design Information
------------------

Command line:   C:\ispTOOLS6_1\ispfpga\bin\nt\map.exe -a mg5g00 -p LFXP3C -t
     PQFP208 -s 3 videogenerator.ngd -o videogenerator_map.ncd -mp
     videogenerator.mrp videogenerator.lpf
Target Vendor:  LATTICE
Target Device:  LFXP3CPQFP208
Target Speed:   3
Mapper:  mg5g00,  version:  ispLever_v61_PROD_Build (37)
Mapped on:  06/16/07  17:34:42

Design Summary
--------------

   Number of registers:    50
      PFU registers:    44
      PIO registers:    6
   Number of SLICEs:            83 out of  1536 (5%)
      SLICEs(logic/ROM):        83 out of  1152 (7%)
      SLICEs(logic/ROM/RAM):     0 out of   384 (0%)
          As RAM:            0
          As Logic/ROM:      0
   Number of logic LUT4s:     116
   Number of distributed RAM:   0 (0 LUT4s)
   Number of ripple logic:     14 (28 LUT4s)
   Number of shift registers:   0
   Total number of LUT4s:     144
   Number of external PIOs: 23 out of 136 (17%)
   Number of PIO IDDR/ODDR:     0
   Number of PIO FIXEDDELAY:    0
   Number of 3-state buffers:   0
   Number of PLLs:  0 out of 2 (0%)
   Number of block RAMs:  0 out of 6 (0%)
   Number of GSRs:  0 out of 1 (0%)
   JTAG used :      No
   Readback used :  No
   Oscillator used :  No
   Startup used :   No
   Notes:-
      1. Total number of LUT4s = (Number of logic LUT4s) + 2*(Number of
     distributed RAMs) + 2*(Number of ripple logic)
      2. Number of logic LUT4s does not include count of distributed RAM and
     ripple logic.
   Number of clocks:  1
     Net clk_c: 35 loads, 6 rising, 29 falling (Driver: PIO clk )
   Number of Clock Enables:  2
     Net pixelClockZ0: 26 loads, 20 LSLICEs
     Net countforverticalceZ0Z_1: 5 loads, 5 LSLICEs
   Number of LSRs:  1
     Net VGAdena_fbZ0: 1 loads, 1 LSLICEs
   Number of nets driven by tri-state buffers:  0
   Top 10 highest fanout non-clock nets:
     Net pixelClockZ0: 33 loads
     Net un25_pixelclockZ0: 15 loads
     Net VGAdena_c: 15 loads
     Net N_182_2: 13 loads
     Net un7_pixelclock_3Z0Z_0: 12 loads

                                    Page 1




Design:  VideoGenerator                                Date:  06/16/07  17:34:42

Design Summary (cont)
---------------------
     Net un2_countforhorizontal_1_n_10: 11 loads
     Net un2_countforhorizontal_1_n_6: 11 loads
     Net un77_pixelclock_0: 11 loads
     Net un2_countforhorizontal_1_n_3: 10 loads
     Net un2_countforhorizontal_1_n_5: 10 loads

Design Errors/Warnings
----------------------

WARNING:  IO buffer missing for top level port UARTrx...logic will be discarded.
WARNING:  IO buffer missing for top level port key...logic will be discarded.

IO (PIO) Attributes
-------------------

+---------------------+-----------+-----------+------------+------------+
| IO Name             | Direction | Levelmode | IO         | FIXEDDELAY |
|                     |           |  IO_TYPE  | Register   |            |
+---------------------+-----------+-----------+------------+------------+
| UARTtx              | OUTPUT    | LVCMOS33  |            |            |
+---------------------+-----------+-----------+------------+------------+
| clk                 | INPUT     | LVCMOS33  |            |            |
+---------------------+-----------+-----------+------------+------------+
| NUMdata_7           | OUTPUT    | LVCMOS33  |            |            |
+---------------------+-----------+-----------+------------+------------+
| NUMdata_6           | OUTPUT    | LVCMOS33  |            |            |
+---------------------+-----------+-----------+------------+------------+
| NUMdata_5           | OUTPUT    | LVCMOS33  |            |            |
+---------------------+-----------+-----------+------------+------------+
| NUMdata_4           | OUTPUT    | LVCMOS33  |            |            |
+---------------------+-----------+-----------+------------+------------+
| NUMdata_3           | OUTPUT    | LVCMOS33  |            |            |
+---------------------+-----------+-----------+------------+------------+
| NUMdata_2           | OUTPUT    | LVCMOS33  |            |            |
+---------------------+-----------+-----------+------------+------------+
| NUMdata_1           | OUTPUT    | LVCMOS33  |            |            |
+---------------------+-----------+-----------+------------+------------+
| NUMdata_0           | OUTPUT    | LVCMOS33  |            |            |
+---------------------+-----------+-----------+------------+------------+
| NUMlocation_3       | OUTPUT    | LVCMOS33  |            |            |
+---------------------+-----------+-----------+------------+------------+
| NUMlocation_2       | OUTPUT    | LVCMOS33  |            |            |
+---------------------+-----------+-----------+------------+------------+
| NUMlocation_1       | OUTPUT    | LVCMOS33  |            |            |
+---------------------+-----------+-----------+------------+------------+
| NUMlocation_0       | OUTPUT    | LVCMOS33  |            |            |
+---------------------+-----------+-----------+------------+------------+
| VGAdena             | OUTPUT    | LVCMOS33  |            |            |
+---------------------+-----------+-----------+------------+------------+
| VGAv                | OUTPUT    | LVCMOS33  |            |            |
+---------------------+-----------+-----------+------------+------------+
| VGAh_cs             | OUTPUT    | LVCMOS33  |            |            |
+---------------------+-----------+-----------+------------+------------+
| VGAb_1              | OUTPUT    | LVCMOS33  | OUT        |            |
+---------------------+-----------+-----------+------------+------------+
| VGAb_0              | OUTPUT    | LVCMOS33  | OUT        |            |

                                    Page 2




Design:  VideoGenerator                                Date:  06/16/07  17:34:42

IO (PIO) Attributes (cont)
--------------------------
+---------------------+-----------+-----------+------------+------------+
| VGAg_1              | OUTPUT    | LVCMOS33  | OUT        |            |
+---------------------+-----------+-----------+------------+------------+
| VGAg_0              | OUTPUT    | LVCMOS33  | OUT        |            |
+---------------------+-----------+-----------+------------+------------+
| VGAr_1              | OUTPUT    | LVCMOS33  | OUT        |            |
+---------------------+-----------+-----------+------------+------------+
| VGAr_0              | OUTPUT    | LVCMOS33  | OUT        |            |
+---------------------+-----------+-----------+------------+------------+

Removed logic
-------------

Block GSR_INST undriven or does not drive anything - clipped.
Signal clk_c_iZ0 was merged into signal clk_c
Signal un2_countforhorizontal_1_0_axbZ0Z_12 was merged into signal
     countforhorizontalZ0Z_12
Signal un2_countforhorizontal_1_0_axbZ0Z_11 was merged into signal
     countforhorizontalZ0Z_11
Signal un2_countforhorizontal_1_0_axbZ0Z_10 was merged into signal
     countforhorizontalZ0Z_10
Signal un2_countforhorizontal_1_0_axbZ0Z_9 was merged into signal
     countforhorizontalZ0Z_9
Signal un2_countforhorizontal_1_0_axbZ0Z_8 was merged into signal
     countforhorizontalZ0Z_8
Signal un2_countforhorizontal_1_0_axbZ0Z_7 was merged into signal
     countforhorizontalZ0Z_7
Signal un2_countforhorizontal_1_0_axbZ0Z_6 was merged into signal
     countforhorizontalZ0Z_6
Signal un2_countforhorizontal_1_0_axbZ0Z_5 was merged into signal
     countforhorizontalZ0Z_5
Signal un2_countforhorizontal_1_0_axbZ0Z_4 was merged into signal
     countforhorizontalZ0Z_4
Signal un2_countforhorizontal_1_0_axbZ0Z_3 was merged into signal
     countforhorizontalZ0Z_3
Signal un2_countforhorizontal_1_0_axbZ0Z_2 was merged into signal
     countforhorizontalZ0Z_2
Signal un2_countforhorizontal_1_0_axbZ0Z_1 was merged into signal
     countforhorizontalZ0Z_1
Signal un2_countforhorizontal_1_0_axbZ0Z_0 was merged into signal
     countforhorizontal_fastZ0Z_0
Signal un1_countforvertical_0_axbZ0Z_12 was merged into signal
     countforverticalZ0Z_12
Signal un1_countforvertical_0_axbZ0Z_11 was merged into signal
     countforverticalZ0Z_11
Signal un1_countforvertical_0_axbZ0Z_10 was merged into signal
     countforverticalZ0Z_10
Signal un1_countforvertical_0_axbZ0Z_9 was merged into signal
     countforverticalZ0Z_9
Signal un1_countforvertical_0_axbZ0Z_8 was merged into signal
     countforverticalZ0Z_8
Signal un1_countforvertical_0_axbZ0Z_7 was merged into signal
     countforverticalZ0Z_7
Signal un1_countforvertical_0_axbZ0Z_6 was merged into signal
     countforverticalZ0Z_6
Signal un1_countforvertical_0_axbZ0Z_5 was merged into signal

                                    Page 3




Design:  VideoGenerator                                Date:  06/16/07  17:34:42

Removed logic (cont)
--------------------
     countforverticalZ0Z_5
Signal un1_countforvertical_0_axbZ0Z_4 was merged into signal
     countforverticalZ0Z_4
Signal un1_countforvertical_0_axbZ0Z_3 was merged into signal
     countforverticalZ0Z_3
Signal un1_countforvertical_0_axbZ0Z_2 was merged into signal
     countforverticalZ0Z_2
Signal un1_countforvertical_0_axbZ0Z_1 was merged into signal
     countforverticalZ0Z_1
Signal un1_countforvertical_0_axbZ0Z_0 was merged into signal
     countforverticalZ0Z_0
Signal GNDZ0 undriven or does not drive anything - clipped.
Signal VCCZ0 undriven or does not drive anything - clipped.
Signal un2_countforhorizontal_1_0_cry_2 undriven or does not drive anything -
     clipped.
Signal un2_countforhorizontal_1_0_cry_4 undriven or does not drive anything -
     clipped.
Signal un2_countforhorizontal_1_0_cry_6 undriven or does not drive anything -
     clipped.
Signal un2_countforhorizontal_1_0_cry_8 undriven or does not drive anything -
     clipped.
Signal un2_countforhorizontal_1_0_cry_10 undriven or does not drive anything -
     clipped.
Signal un2_countforhorizontal_1_0_s_12_0_S1 undriven or does not drive anything
     - clipped.
Signal un2_countforhorizontal_1_0_s_12_0_COUT1 undriven or does not drive
     anything - clipped.
Signal un2_countforhorizontal_1_0_s_12_0_COUT0 undriven or does not drive
     anything - clipped.
Signal un1_countforvertical_0_cry_0_0_S0 undriven or does not drive anything -
     clipped.
Signal un1_countforvertical_0_cry_0 undriven or does not drive anything -
     clipped.
Signal un1_countforvertical_0_cry_2 undriven or does not drive anything -
     clipped.
Signal un1_countforvertical_0_cry_4 undriven or does not drive anything -
     clipped.
Signal un1_countforvertical_0_cry_6 undriven or does not drive anything -
     clipped.
Signal un1_countforvertical_0_cry_8 undriven or does not drive anything -
     clipped.
Signal un1_countforvertical_0_cry_10 undriven or does not drive anything -
     clipped.
Signal un1_countforvertical_0_s_12_0_S1 undriven or does not drive anything -
     clipped.
Signal un1_countforvertical_0_s_12_0_COUT1 undriven or does not drive anything -
     clipped.
Signal un1_countforvertical_0_s_12_0_COUT0 undriven or does not drive anything -
     clipped.
Signal un2_countforhorizontal_1_0_cry_0_0_S0 undriven or does not drive anything
     - clipped.
Signal un2_countforhorizontal_1_0_cry_0 undriven or does not drive anything -
     clipped.
Block clk_c_i was optimized away.
Block un2_countforhorizontal_1_0_axb_12 was optimized away.
Block un2_countforhorizontal_1_0_axb_11 was optimized away.

                                    Page 4




Design:  VideoGenerator                                Date:  06/16/07  17:34:42

Removed logic (cont)