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📄 videogenerator.vhd

📁 用lattice XP3 demo板设计的VGA信号发生器
💻 VHD
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library ieee;
use ieee.std_logic_1164.all;
use ieee.numeric_std.all;

entity VideoGenerator is

port( 
	clk: in std_logic ;
	UARTrx: in std_logic ;
	UARTtx: out std_logic ;
	VGAr: out std_logic_vector ( 1 downto 0 );
	VGAg: out std_logic_vector ( 1 downto 0 );
	VGAb: out std_logic_vector ( 1 downto 0 );
	VGAh_cs: buffer std_logic ;
	VGAv: buffer std_logic ;
	VGAdena: buffer std_logic ;
	NUMlocation: out std_logic_vector ( 3 downto 0 );
	NUMdata: out std_logic_vector ( 7 downto 0 );
	key: in std_logic  );

end;

architecture VideoGeneratorArchitecture of VideoGenerator is
--------------------------------------------------------
--------------------------------------------------------
function ToBin(x:unsigned(7 downto 0)) return std_logic_vector is 
variable tmp:std_logic_vector(x'range);
begin
	if    x = 0 then tmp := "11000000";  --0
	elsif x = 1 then tmp := "11111001";  --1
	elsif x = 2 then tmp := "10100100";  --2
	elsif x = 3 then tmp := "10110000";  --3
	elsif x = 4 then tmp := "10011001";  --4
	elsif x = 5 then tmp := "10010010";  --5
	elsif x = 6 then tmp := "10000010";  --6
	elsif x = 7 then tmp := "11111000";  --7
	elsif x = 8 then tmp := "10000000";  --8
	elsif x = 9 then tmp := "10010000";  --9
	end if;
	return tmp;
end ToBin;
--------------------------------------------------------
--------------------------------------------------------
procedure SetRGB(x:in unsigned(5 downto 0)) is 
begin
	VGAr(1) <= std_logic(x(5));
	VGAr(0) <= std_logic(x(4));
	VGAg(1) <= std_logic(x(3));
	VGAg(0) <= std_logic(x(2));
	VGAb(1) <= std_logic(x(1));
	VGAb(0) <= std_logic(x(0));
end SetRGB;
--------------------------------------------------------
--------------------------------------------------------
-- define for clock
signal number1:std_logic_vector(7 downto 0);
signal number2:std_logic_vector(7 downto 0);
signal number3:std_logic_vector(7 downto 0);
signal number4:std_logic_vector(7 downto 0);
signal clock  :std_logic;
-- define for VGA
signal pixelClock:std_logic;

begin
	
--		process(clk)  --数码管驱动
--	variable countFor400Hz: unsigned(17 downto 0);
--	variable countForScan : unsigned(1 downto 0);
--	variable countFor1S   : unsigned(7 downto 0);
--	variable countForMin1 : unsigned(7 downto 0);
--	variable countForSec1 : unsigned(7 downto 0);
--	variable countForMin2 : unsigned(7 downto 0);
--	variable countForSec2 : unsigned(7 downto 0);
--
--	begin 
--		if (rising_edge(clk)) then 
--			countFor400Hz := countFor400Hz + 1;
--			if countFor400Hz = 125000 then
--				countFor400Hz := (others => '0');
--				countForScan := countForScan + 1;   --输出 显示 
--				if countForScan = 0 then
--					NUMlocation <= "1000";
--					NUMdata     <= number1;
--				elsif countForScan = 1 then
--					NUMlocation <= "0100";
--					NUMdata     <= number2;
--				elsif countForScan = 2 then
--					NUMlocation <= "0010";
--					NUMdata     <= number3;
--				elsif countForScan = 3 then
--					NUMlocation <= "0001";
--					NUMdata     <= number4;
--				end if;
--
--				countFor1S := countFor1S + 1;
--				if countFor1S = 200 then
--					countFor1S := (others => '0');
--					clock <= not clock;
--				
--					if clock = '1' then
--						countForSec1 := countForSec1 + 1; 
--						if countForSec1 = 10 then 
--							countForSec1 := (others => '0');
--							countForSec2 := countForSec2 + 1;
--							if countForSec2 = 6 then
--								countForSec2 := (others => '0');
--								countForMin1 := countForMin1 + 1;
--								if countForMin1 = 10 then 
--									countForMin1 :=  (others => '0');
--									countForMin2 := countForMin2 + 1;
--									if countForMin2 = 10 then 
--										countForMin2 :=  (others => '0');
--									end if;
--								end if;
--							end if;
--						end if;
--						number1 <= ToBin(countForSec1);
--						number2 <= ToBin(countForSec2);
--						number3 <= ToBin(countForMin1);
--						number4 <= ToBin(countForMin2);
--					else
--						number3 <= number3 and "01111111";
--					end if;
--				end if;
--			end if;
--		end if;
--	end process;
--	process(clk)  --VGA 驱动  pixelClock = 25MHz 640*480 60Hz  HS  31.5kHz
--	variable countForHorizontal: unsigned(12 downto 0);
--	variable countForVertical  : unsigned(12 downto 0);
--	variable countForPH        : unsigned(6 downto 0);
--	variable countForColor     : unsigned(5 downto 0);
--	begin 
--		if (falling_edge(clk)) then
--		pixelClock <= not pixelClock;
--		if pixelClock = '1' then
--		
--			countForHorizontal := countForHorizontal + 1;
--			if countForHorizontal = 795 then      --h_total
--				countForHorizontal := (others => '0');
--			elsif countForHorizontal <= 96 then     --hs_st
--				VGAh_cs <= '0';
--			elsif countForHorizontal > 96 then   --hs_sp
--				VGAh_cs <= '1';
--			end if;
--
--			if countForHorizontal = 0 then      --V
--				countForVertical := countForVertical+1;
--				if countForVertical = 525 then         --v_total
--					countForVertical :=  (others => '0');
--				--	countForColor := countForColor + 1;
--				elsif countForVertical <= 5 then         --vs_st
--					VGAv <= '0';
--				elsif countForVertical > 5 then         --vs_sp
--					VGAv <= '1';
--				end if;
--			end if;
--
--			if VGAh_cs = '1' and VGAv = '1' then
--				if countForHorizontal <= 120  or countForHorizontal >= 760 or countForVertical <= 25 or countForVertical >= 505 then      --dena
--					VGAdena <= '1';
--				else
--					VGAdena <= '0';
--				end if;
--			end if;
--			if VGAdena = '0' then   --图像输出
--				countForPH := countForPH+1;
--				if countForPH = 8 then 
--					countForPH := (others => '0');
--					countForColor := countForColor + 1;
--				end if;
--				SetRGB(countForColor);
--			else
--				countForPH := (others => '0');
--				countForColor := number2(5 downto 0);
--				SetRGB("000000");
--			end if;
--		end if;
--		end if;
--	end process;
	process(clk)  --VGA 驱动  pixelClock = 25MHz 960*720 60Hz  HS 21.8kHz 隔行
	variable countForHorizontal: unsigned(12 downto 0);
	variable countForVertical  : unsigned(12 downto 0);
	variable countForPH        : unsigned(6 downto 0);
	variable countForColor     : unsigned(5 downto 0);
	begin 
		if (falling_edge(clk)) then
		pixelClock <= not pixelClock;
		if pixelClock = '1' then
		
			countForHorizontal := countForHorizontal + 1;
			if countForHorizontal = 1147 then      --h_total
				countForHorizontal := (others => '0');
			elsif countForHorizontal <= 96 then     --hs_st
				VGAh_cs <= '0';
			elsif countForHorizontal > 96 then   --hs_sp
				VGAh_cs <= '1';
			end if;

			if countForHorizontal = 0 then      --V
				countForVertical := countForVertical+1;
				if countForVertical = 364 then         --v_total
					countForVertical :=  (others => '0');
				--	countForColor := countForColor + 1;
				elsif countForVertical <= 2 then         --vs_st
					VGAv <= '0';
				elsif countForVertical > 2 then         --vs_sp
					VGAv <= '1';
				end if;
			end if;

			if VGAh_cs = '1' and VGAv = '1' then
				if countForHorizontal <= 120  or countForHorizontal >= 1080 or countForVertical <= 3 or countForVertical >= 363 then      --dena
					VGAdena <= '1';
				else
					VGAdena <= '0';
				end if;
			end if;
			if VGAdena = '0' then   --图像输出
				countForPH := countForPH+1;
				if countForPH = 8 then 
					countForPH := (others => '0');
					countForColor := countForColor + 1;
				end if;
				SetRGB(countForColor);
			else
				countForPH := (others => '0');
				countForColor := number2(5 downto 0);
				SetRGB("000000");
			end if;
		end if;
		end if;
	end process;

end VideoGeneratorArchitecture;

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