7064.qsf

CPLD的例子程序2,EPM7064芯片,PC104扩展卡上应用

# Copyright (C) 1991-2004 Altera Corporation
# Any  megafunction  design,  and related netlist (encrypted  or  decrypted),
# support information,  device programming or simulation file,  and any other
# associated  documentation or information  provided by  Altera  or a partner
# under  Altera's   Megafunction   Partnership   Program  may  be  used  only
# to program  PLD  devices (but not masked  PLD  devices) from  Altera.   Any
# other  use  of such  megafunction  design,  netlist,  support  information,
# device programming or simulation file,  or any other  related documentation
# or information  is prohibited  for  any  other purpose,  including, but not
# limited to  modification,  reverse engineering,  de-compiling, or use  with
# any other  silicon devices,  unless such use is  explicitly  licensed under
# a separate agreement with  Altera  or a megafunction partner.  Title to the
# intellectual property,  including patents,  copyrights,  trademarks,  trade
# secrets,  or maskworks,  embodied in any such megafunction design, netlist,
# support  information,  device programming or simulation file,  or any other
# related documentation or information provided by  Altera  or a megafunction
# partner, remains with Altera, the megafunction partner, or their respective
# licensors. No other licenses, including any licenses needed under any third
# party's intellectual property, are provided herein.


# The default values for assignments are stored in the file
#		7064_assignment_defaults.qdf
# If this file doesn't exist, and for assignments not listed, see file
#		assignment_defaults.qdf

# Altera recommends that you do not modify this file. This
# file is updated automatically by the Quartus II software
# and any changes you make may be lost or overwritten.


# Project-Wide Assignments
# ========================
set_global_assignment -name ORIGINAL_QUARTUS_VERSION 4.2
set_global_assignment -name PROJECT_CREATION_TIME_DATE "16:39:42  JANUARY 12, 2007"
set_global_assignment -name LAST_QUARTUS_VERSION 4.2
set_global_assignment -name VHDL_FILE cpld_7064.vhd

# Pin & Location Assignments
# ==========================
set_location_assignment PIN_32 -to A[1]
set_location_assignment PIN_33 -to A[2]
set_location_assignment PIN_35 -to A[3]
set_location_assignment PIN_36 -to A[4]
set_location_assignment PIN_37 -to A[5]
set_location_assignment PIN_13 -to CARL[0]
set_location_assignment PIN_12 -to CARL[1]
set_location_assignment PIN_9 -to CARL[2]
set_location_assignment PIN_10 -to CARL[3]
set_location_assignment PIN_98 -to CLK4291
set_location_assignment PIN_97 -to CLK4292
set_location_assignment PIN_87 -to CLK_IN
set_location_assignment PIN_46 -to CRST
set_location_assignment PIN_2 -to CS
set_location_assignment PIN_31 -to CS429
set_location_assignment PIN_28 -to D[0]
set_location_assignment PIN_27 -to D[1]
set_location_assignment PIN_25 -to D[2]
set_location_assignment PIN_24 -to D[3]
set_location_assignment PIN_23 -to D[4]
set_location_assignment PIN_22 -to D[5]
set_location_assignment PIN_21 -to D[6]
set_location_assignment PIN_20 -to D[7]
set_location_assignment PIN_19 -to D[8]
set_location_assignment PIN_17 -to D[9]
set_location_assignment PIN_16 -to D[10]
set_location_assignment PIN_14 -to IRQ
set_location_assignment PIN_1 -to LCLK
set_location_assignment PIN_85 -to LD429[0]
set_location_assignment PIN_84 -to LD429[1]
set_location_assignment PIN_83 -to LD429[2]
set_location_assignment PIN_94 -to LD429[3]
set_location_assignment PIN_93 -to LD429[4]
set_location_assignment PIN_92 -to LD429[5]
set_location_assignment PIN_81 -to LD429[6]
set_location_assignment PIN_80 -to LD429[7]
set_location_assignment PIN_79 -to LD429[8]
set_location_assignment PIN_67 -to LD429[9]
set_location_assignment PIN_68 -to LD429[10]
set_location_assignment PIN_65 -to LD429[11]
set_location_assignment PIN_50 -to LRST
set_location_assignment PIN_30 -to OE
set_location_assignment PIN_70 -to OE429[0]
set_location_assignment PIN_69 -to OE429[1]
set_location_assignment PIN_78 -to OE429[2]
set_location_assignment PIN_77 -to OE429[3]
set_location_assignment PIN_6 -to OE429[4]
set_location_assignment PIN_5 -to OE429[5]
set_location_assignment PIN_58 -to OE429[6]
set_location_assignment PIN_60 -to OE429[7]
set_location_assignment PIN_63 -to RDY[0]
set_location_assignment PIN_61 -to RDY[1]
set_location_assignment PIN_7 -to RDY[2]
set_location_assignment PIN_8 -to RDY[3]
set_location_assignment PIN_96 -to RDY[4]
set_location_assignment PIN_76 -to RDY[5]
set_location_assignment PIN_100 -to RDY[6]
set_location_assignment PIN_99 -to RDY[7]
set_location_assignment PIN_75 -to SEL
set_location_assignment PIN_29 -to WR

# Analysis & Synthesis Assignments
# ================================
set_global_assignment -name FAMILY MAX7000S
set_global_assignment -name TOP_LEVEL_ENTITY cpld_7064

# Fitter Assignments
# ==================
set_global_assignment -name DEVICE "EPM7128STC100-10"
set_global_assignment -name FITTER_EFFORT "STANDARD FIT"

# Simulator Assignments
# =====================
set_global_assignment -name GLITCH_INTERVAL 1

# LogicLock Region Assignments
# ============================
set_global_assignment -name LOGICLOCK_INCREMENTAL_COMPILE_ASSIGNMENT off

# ------------------
# start CLOCK(CARL0)

	# Timing Assignments
	# ==================
	set_global_assignment -name FMAX_REQUIREMENT "1.0 MHz" -section_id CARL0

# end CLOCK(CARL0)
# ----------------

# ------------------
# start CLOCK(CARL1)

	# Timing Assignments
	# ==================
	set_global_assignment -name FMAX_REQUIREMENT "1.0 MHz" -section_id CARL1

# end CLOCK(CARL1)
# ----------------

# ----------------
# start CLOCK(clk)

	# Timing Assignments
	# ==================
	set_global_assignment -name FMAX_REQUIREMENT "40.0 MHz" -section_id clk
	set_global_assignment -name DUTY_CYCLE 50 -section_id clk

# end CLOCK(clk)
# --------------

# -----------------------
# start ENTITY(cpld_7064)

	# Timing Assignments
	# ==================
	set_instance_assignment -name CLOCK_SETTINGS clk -to CLK_IN
	set_instance_assignment -name CLOCK_SETTINGS CARL0 -to CARL[0]
	set_instance_assignment -name CLOCK_SETTINGS CARL1 -to CARL[1]

# end ENTITY(cpld_7064)
# ---------------------