7064.tan.summary

CPLD的例子程序2,EPM7064芯片,PC104扩展卡上应用

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Timing Analyzer Summary
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Type           : Worst-case tsu
Slack          : N/A
Required Time  : None
Actual Time    : 7.000 ns
From           : A[2]
To             : IMREG[0]
From Clock     : 
To Clock       : CLK_IN
Failed Paths   : 0

Type           : Worst-case tco
Slack          : N/A
Required Time  : None
Actual Time    : 21.000 ns
From           : IMREG[0]
To             : IRQ
From Clock     : CLK_IN
To Clock       : 
Failed Paths   : 0

Type           : Worst-case tpd
Slack          : N/A
Required Time  : None
Actual Time    : 24.500 ns
From           : CS
To             : D[5]
From Clock     : 
To Clock       : 
Failed Paths   : 0

Type           : Worst-case th
Slack          : N/A
Required Time  : None
Actual Time    : -2.000 ns
From           : A[2]
To             : IMREG[0]
From Clock     : 
To Clock       : CLK_IN
Failed Paths   : 0

Type           : Clock Setup: 'CLK_IN'
Slack          : 6.200 ns
Required Time  : 40.00 MHz ( period = 25.000 ns )
Actual Time    : 53.19 MHz ( period = 18.800 ns )
From           : div1[4]
To             : lpm_counter:clkcounter1_rtl_0|dffs[3]
From Clock     : CLK_IN
To Clock       : CLK_IN
Failed Paths   : 0

Type           : Clock Hold: 'CLK_IN'
Slack          : 5.000 ns
Required Time  : 40.00 MHz ( period = 25.000 ns )
Actual Time    : N/A
From           : div1[4]
To             : lpm_counter:clkcounter1_rtl_0|dffs[0]
From Clock     : CLK_IN
To Clock       : CLK_IN
Failed Paths   : 0

Type           : Total number of failed paths
Slack          : 
Required Time  : 
Actual Time    : 
From           : 
To             : 
From Clock     : 
To Clock       : 
Failed Paths   : 0

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