7064.fit.eqn

CPLD的例子程序2,EPM7064芯片,PC104扩展卡上应用

--B1L1 is lpm_counter:clkcounter1_rtl_0|_~109 at LC57
B1L1_p1_out = B1_dffs[2] & B1_dffs[0] & B1_dffs[1];
B1L1_or_out = B1_dffs[3];
B1L1 = B1L1_p1_out $ B1L1_or_out;


--B1_dffs[3] is lpm_counter:clkcounter1_rtl_0|dffs[3] at LC53
B1_dffs[3]_p1_out = A1L241 & B1L1;
B1_dffs[3]_p2_out = B1L1 & !div1[0] & B1_dffs[0];
B1_dffs[3]_p3_out = B1L1 & div1[0] & !B1_dffs[0];
B1_dffs[3]_or_out = B1_dffs[3]_p1_out # B1_dffs[3]_p2_out # B1_dffs[3]_p3_out;
B1_dffs[3]_reg_input = B1_dffs[3]_or_out;
B1_dffs[3] = DFFE(B1_dffs[3]_reg_input, GLOBAL(CLK_IN), , , );


--A1L341 is reduce_nor~59 at LC78
A1L341_p0_out = div2[1] & !B2_dffs[1];
A1L341_p1_out = div2[3] & !B2_dffs[3];
A1L341_p2_out = div2[2] & B2_dffs[2];
A1L341_p3_out = !div2[2] & !B2_dffs[2];
A1L341_p4_out = !div2[1] & B2_dffs[1];
A1L341_or_out = A1L541 # A1L341_p0_out # A1L341_p1_out # A1L341_p2_out # A1L341_p3_out # A1L341_p4_out;
A1L341 = A1L341_or_out;


--B2L1 is lpm_counter:clkcounter2_rtl_1|_~109 at LC65
B2L1_p1_out = B2_dffs[2] & B2_dffs[0] & B2_dffs[1];
B2L1_or_out = B2_dffs[3];
B2L1 = B2L1_p1_out $ B2L1_or_out;


--B2_dffs[3] is lpm_counter:clkcounter2_rtl_1|dffs[3] at LC79
B2_dffs[3]_p1_out = A1L341 & B2L1;
B2_dffs[3]_p2_out = B2L1 & !div2[0] & B2_dffs[0];
B2_dffs[3]_p3_out = B2L1 & div2[0] & !B2_dffs[0];
B2_dffs[3]_or_out = B2_dffs[3]_p1_out # B2_dffs[3]_p2_out # B2_dffs[3]_p3_out;
B2_dffs[3]_reg_input = B2_dffs[3]_or_out;
B2_dffs[3] = DFFE(B2_dffs[3]_reg_input, GLOBAL(CLK_IN), , , );


--B1L02 is lpm_counter:clkcounter1_rtl_0|dffs[4]~160 at SEXP58
B1L02 = EXP(div1[0] & div1[1] & !div1[2] & div1[3] & div1[4]);


--B1L12 is lpm_counter:clkcounter1_rtl_0|dffs[4]~161 at SEXP64
B1L12 = EXP(B1_dffs[3] & B1_dffs[2] & B1_dffs[0] & B1_dffs[1]);


--B1L22 is lpm_counter:clkcounter1_rtl_0|dffs[4]~162 at SEXP62
B1L22 = EXP(B1_dffs[3] & B1_dffs[2] & B1_dffs[1]);


--B1L32 is lpm_counter:clkcounter1_rtl_0|dffs[4]~163 at SEXP59
B1L32 = EXP(B1_dffs[3] & B1_dffs[2] & B1_dffs[0]);


--B1L42 is lpm_counter:clkcounter1_rtl_0|dffs[4]~164 at SEXP57
B1L42 = EXP(B1_dffs[3] & B1_dffs[0] & B1_dffs[1]);


--B1L52 is lpm_counter:clkcounter1_rtl_0|dffs[4]~165 at SEXP54
B1L52 = EXP(B1_dffs[2] & B1_dffs[0] & B1_dffs[1]);


--B1_dffs[4] is lpm_counter:clkcounter1_rtl_0|dffs[4] at LC56
B1_dffs[4]_p0_out = div1[3] & B1_dffs[4] & !B1_dffs[3];
B1_dffs[4]_p1_out = B1L52 & !div1[3] & B1_dffs[4] & B1_dffs[3];
B1_dffs[4]_p2_out = B1_dffs[4] & !B1_dffs[0] & div1[0];
B1_dffs[4]_p3_out = B1_dffs[4] & !B1_dffs[1] & div1[1];
B1_dffs[4]_p4_out = B1_dffs[4] & !B1_dffs[2] & !div1[2];
B1_dffs[4]_or_out = B1L72 # B1_dffs[4]_p0_out # B1_dffs[4]_p1_out # B1_dffs[4]_p2_out # B1_dffs[4]_p3_out # B1_dffs[4]_p4_out;
B1_dffs[4]_reg_input = B1_dffs[4]_or_out;
B1_dffs[4] = DFFE(B1_dffs[4]_reg_input, GLOBAL(CLK_IN), , , );


--B2L02 is lpm_counter:clkcounter2_rtl_1|dffs[4]~160 at SEXP96
B2L02 = EXP(div2[0] & div2[1] & !div2[2] & div2[3] & div2[4]);


--B2L12 is lpm_counter:clkcounter2_rtl_1|dffs[4]~161 at SEXP95
B2L12 = EXP(B2_dffs[3] & B2_dffs[2] & B2_dffs[0] & B2_dffs[1]);


--B2L22 is lpm_counter:clkcounter2_rtl_1|dffs[4]~162 at SEXP94
B2L22 = EXP(B2_dffs[3] & B2_dffs[2] & B2_dffs[1]);


--B2L32 is lpm_counter:clkcounter2_rtl_1|dffs[4]~163 at SEXP93
B2L32 = EXP(B2_dffs[3] & B2_dffs[2] & B2_dffs[0]);


--B2L42 is lpm_counter:clkcounter2_rtl_1|dffs[4]~164 at SEXP92
B2L42 = EXP(B2_dffs[3] & B2_dffs[0] & B2_dffs[1]);


--B2L52 is lpm_counter:clkcounter2_rtl_1|dffs[4]~165 at SEXP91
B2L52 = EXP(B2_dffs[2] & B2_dffs[0] & B2_dffs[1]);


--B2_dffs[4] is lpm_counter:clkcounter2_rtl_1|dffs[4] at LC88
B2_dffs[4]_p0_out = div2[3] & B2_dffs[4] & !B2_dffs[3];
B2_dffs[4]_p1_out = B2L52 & !div2[3] & B2_dffs[4] & B2_dffs[3];
B2_dffs[4]_p2_out = B2_dffs[4] & !B2_dffs[0] & div2[0];
B2_dffs[4]_p3_out = B2_dffs[4] & !B2_dffs[1] & div2[1];
B2_dffs[4]_p4_out = B2_dffs[4] & !B2_dffs[2] & !div2[2];
B2_dffs[4]_or_out = B2L72 # B2_dffs[4]_p0_out # B2_dffs[4]_p1_out # B2_dffs[4]_p2_out # B2_dffs[4]_p3_out # B2_dffs[4]_p4_out;
B2_dffs[4]_reg_input = B2_dffs[4]_or_out;
B2_dffs[4] = DFFE(B2_dffs[4]_reg_input, GLOBAL(CLK_IN), , , );


--B1L03 is lpm_counter:clkcounter1_rtl_0|dffs[5]~176 at SEXP13
B1L03 = EXP(div1[0] & div1[1] & !div1[2] & div1[3] & !div1[4] & !div1[5]);


--B1L13 is lpm_counter:clkcounter1_rtl_0|dffs[5]~177 at SEXP10
B1L13 = EXP(B1_dffs[4] & B1_dffs[3] & B1_dffs[2] & B1_dffs[0] & B1_dffs[1]);


--B1L23 is lpm_counter:clkcounter1_rtl_0|dffs[5]~178 at SEXP6
B1L23 = EXP(B1_dffs[4] & B1_dffs[3] & B1_dffs[2] & B1_dffs[1]);


--B1L33 is lpm_counter:clkcounter1_rtl_0|dffs[5]~179 at SEXP5
B1L33 = EXP(B1_dffs[4] & B1_dffs[3] & B1_dffs[2] & B1_dffs[0]);


--B1L43 is lpm_counter:clkcounter1_rtl_0|dffs[5]~180 at SEXP4
B1L43 = EXP(B1_dffs[4] & B1_dffs[3] & B1_dffs[0] & B1_dffs[1]);


--B1L53 is lpm_counter:clkcounter1_rtl_0|dffs[5]~181 at SEXP3
B1L53 = EXP(B1_dffs[4] & B1_dffs[2] & B1_dffs[0] & B1_dffs[1]);


--B1_dffs[5] is lpm_counter:clkcounter1_rtl_0|dffs[5] at LC12
B1_dffs[5]_p0_out = B1_dffs[5] & !B1_dffs[4] & !div1[4];
B1_dffs[5]_p1_out = !B1_dffs[0] & B1_dffs[5] & div1[0];
B1_dffs[5]_p2_out = B1_dffs[5] & !B1_dffs[1] & div1[1];
B1_dffs[5]_p3_out = B1_dffs[5] & !B1_dffs[2] & !div1[2];
B1_dffs[5]_p4_out = B1_dffs[5] & !B1_dffs[3] & div1[3];
B1_dffs[5]_or_out = B1L73 # B1_dffs[5]_p0_out # B1_dffs[5]_p1_out # B1_dffs[5]_p2_out # B1_dffs[5]_p3_out # B1_dffs[5]_p4_out;
B1_dffs[5]_reg_input = B1_dffs[5]_or_out;
B1_dffs[5] = DFFE(B1_dffs[5]_reg_input, GLOBAL(CLK_IN), , , );


--B2L92 is lpm_counter:clkcounter2_rtl_1|dffs[5]~176 at SEXP90
B2L92 = EXP(div2[0] & div2[1] & !div2[2] & div2[3] & !div2[4] & !div2[5]);


--B2L03 is lpm_counter:clkcounter2_rtl_1|dffs[5]~177 at SEXP89
B2L03 = EXP(B2_dffs[4] & B2_dffs[3] & B2_dffs[2] & B2_dffs[0] & B2_dffs[1]);


--B2L13 is lpm_counter:clkcounter2_rtl_1|dffs[5]~178 at SEXP86
B2L13 = EXP(B2_dffs[4] & B2_dffs[3] & B2_dffs[2] & B2_dffs[1]);


--B2L23 is lpm_counter:clkcounter2_rtl_1|dffs[5]~179 at SEXP85
B2L23 = EXP(B2_dffs[4] & B2_dffs[3] & B2_dffs[2] & B2_dffs[0]);


--B2L33 is lpm_counter:clkcounter2_rtl_1|dffs[5]~180 at SEXP84
B2L33 = EXP(B2_dffs[4] & B2_dffs[3] & B2_dffs[0] & B2_dffs[1]);


--B2L43 is lpm_counter:clkcounter2_rtl_1|dffs[5]~181 at SEXP81
B2L43 = EXP(B2_dffs[4] & B2_dffs[2] & B2_dffs[0] & B2_dffs[1]);


--B2_dffs[5] is lpm_counter:clkcounter2_rtl_1|dffs[5] at LC83
B2_dffs[5]_p0_out = B2_dffs[5] & !B2_dffs[4] & !div2[4];
B2_dffs[5]_p1_out = !B2_dffs[0] & B2_dffs[5] & div2[0];
B2_dffs[5]_p2_out = B2_dffs[5] & !B2_dffs[1] & div2[1];
B2_dffs[5]_p3_out = B2_dffs[5] & !B2_dffs[2] & !div2[2];
B2_dffs[5]_p4_out = B2_dffs[5] & !B2_dffs[3] & div2[3];
B2_dffs[5]_or_out = B2L63 # B2_dffs[5]_p0_out # B2_dffs[5]_p1_out # B2_dffs[5]_p2_out # B2_dffs[5]_p3_out # B2_dffs[5]_p4_out;
B2_dffs[5]_reg_input = B2_dffs[5]_or_out;
B2_dffs[5] = DFFE(B2_dffs[5]_reg_input, GLOBAL(CLK_IN), , , );


--A1L22 is clko2~8 at LC19
A1L22_p0_out = !div2[2] & !B2_dffs[2];
A1L22_p1_out = div2[0] & !B2_dffs[0];
A1L22_p2_out = !div2[0] & B2_dffs[0];
A1L22_p3_out = div2[1] & !B2_dffs[1];
A1L22_p4_out = !div2[1] & B2_dffs[1];
A1L22_or_out = A1L22_p0_out # A1L22_p1_out # A1L22_p2_out # A1L22_p3_out # A1L22_p4_out;
A1L22 = A1L22_or_out;


--A1L32 is clko2~14 at LC80
A1L32_p0_out = div2[4] & B2_dffs[4];
A1L32_p1_out = div2[2] & B2_dffs[2];
A1L32_p2_out = div2[3] & !B2_dffs[3];
A1L32_p3_out = !div2[3] & B2_dffs[3];
A1L32_p4_out = !div2[4] & !B2_dffs[4];
A1L32_or_out = A1L32_p0_out # A1L32_p1_out # A1L32_p2_out # A1L32_p3_out # A1L32_p4_out;
A1L32 = A1L32_or_out;


--clko2 is clko2 at LC9
clko2_p2_out = div2[5] & !B2_dffs[5];
clko2_p3_out = !div2[5] & B2_dffs[5];
clko2_or_out = A1L32 # clko2_p2_out # clko2_p3_out # A1L22;
clko2_reg_input = !clko2 $ clko2_or_out;
clko2 = DFFE(clko2_reg_input, GLOBAL(CLK_IN), , , );


--clko1 is clko1 at LC8
clko1_p0_out = !div1[5] & B1_dffs[5];
clko1_p1_out = !div1[3] & B1_dffs[3];
clko1_p2_out = !div1[4] & !B1_dffs[4];
clko1_p3_out = div1[4] & B1_dffs[4];
clko1_p4_out = div1[5] & !B1_dffs[5];
clko1_or_out = A1L02 # clko1_p0_out # clko1_p1_out # clko1_p2_out # clko1_p3_out # clko1_p4_out;
clko1_reg_input = !clko1_or_out;
clko1 = TFFE(clko1_reg_input, GLOBAL(CLK_IN), , , );


--B1L4 is lpm_counter:clkcounter1_rtl_0|dffs[0]~194 at LC108
B1L4_p1_out = div1[0] & !B1_dffs[0];
B1L4 = B1L4_p1_out;


--B1L5 is lpm_counter:clkcounter1_rtl_0|dffs[0]~196 at LC109
B1L5_p0_out = !B1_dffs[0] & div1[3] & !B1_dffs[3];
B1L5_p1_out = div1[1] & !B1_dffs[1] & !B1_dffs[0];
B1L5_p2_out = !div1[1] & B1_dffs[1] & !B1_dffs[0];
B1L5_p3_out = !B1_dffs[0] & !div1[2] & !B1_dffs[2];
B1L5_p4_out = !B1_dffs[0] & div1[2] & B1_dffs[2];
B1L5 = B1L4 # B1L5_p0_out # B1L5_p1_out # B1L5_p2_out # B1L5_p3_out # B1L5_p4_out;


--B2L4 is lpm_counter:clkcounter2_rtl_1|dffs[0]~194 at LC74
B2L4_p1_out = div2[0] & !B2_dffs[0];
B2L4 = B2L4_p1_out;


--B2L5 is lpm_counter:clkcounter2_rtl_1|dffs[0]~196 at LC75
B2L5_p0_out = !B2_dffs[0] & div2[3] & !B2_dffs[3];
B2L5_p1_out = div2[1] & !B2_dffs[1] & !B2_dffs[0];
B2L5_p2_out = !div2[1] & B2_dffs[1] & !B2_dffs[0];
B2L5_p3_out = !B2_dffs[0] & !div2[2] & !B2_dffs[2];
B2L5_p4_out = !B2_dffs[0] & div2[2] & B2_dffs[2];
B2L5 = B2L4 # B2L5_p0_out # B2L5_p1_out # B2L5_p2_out # B2L5_p3_out # B2L5_p4_out;


--B1L7 is lpm_counter:clkcounter1_rtl_0|dffs[1]~202 at LC97
B1L7_p0_out = B1_dffs[0] & !B1_dffs[1] & !div1[2] & !B1_dffs[2];
B1L7_p1_out = div1[0] & !B1_dffs[0] & B1_dffs[1];
B1L7_p2_out = !div1[0] & B1_dffs[0] & !B1_dffs[1];
B1L7_p3_out = B1_dffs[0] & !B1_dffs[1] & div1[1];
B1L7_p4_out = !B1_dffs[0] & B1_dffs[1] & !div1[1];
B1L7 = B1L7_p0_out # B1L7_p1_out # B1L7_p2_out # B1L7_p3_out # B1L7_p4_out;


--B1L8 is lpm_counter:clkcounter1_rtl_0|dffs[1]~208 at LC98
B1L8_p0_out = !B1_dffs[0] & B1_dffs[1] & div1[3] & !B1_dffs[3];
B1L8_p1_out = !div1[2] & !B1_dffs[2] & !B1_dffs[0] & B1_dffs[1];
B1L8_p2_out = div1[2] & B1_dffs[2] & B1_dffs[0] & !B1_dffs[1];
B1L8_p3_out = div1[2] & B1_dffs[2] & !B1_dffs[0] & B1_dffs[1];
B1L8_p4_out = B1_dffs[0] & !B1_dffs[1] & div1[3] & !B1_dffs[3];
B1L8 = B1L7 # B1L8_p0_out # B1L8_p1_out # B1L8_p2_out # B1L8_p3_out # B1L8_p4_out;


--B1L9 is lpm_counter:clkcounter1_rtl_0|dffs[1]~214 at LC99
B1L9_p0_out = B1_dffs[0] & !B1_dffs[1] & div1[4] & B1_dffs[4];
B1L9_p1_out = !div1[3] & B1_dffs[3] & B1_dffs[0] & !B1_dffs[1];
B1L9_p2_out = !div1[3] & B1_dffs[3] & !B1_dffs[0] & B1_dffs[1];
B1L9_p3_out = B1_dffs[0] & !B1_dffs[1] & !div1[4] & !B1_dffs[4];
B1L9_p4_out = !B1_dffs[0] & B1_dffs[1] & !div1[4] & !B1_dffs[4];
B1L9 = B1L8 # B1L9_p0_out # B1L9_p1_out # B1L9_p2_out # B1L9_p3_out # B1L9_p4_out;


--B2L7 is lpm_counter:clkcounter2_rtl_1|dffs[1]~202 at LC66
B2L7_p0_out = B2_dffs[0] & !B2_dffs[1] & !div2[2] & !B2_dffs[2];
B2L7_p1_out = div2[0] & !B2_dffs[0] & B2_dffs[1];
B2L7_p2_out = !div2[0] & B2_dffs[0] & !B2_dffs[1];
B2L7_p3_out = B2_dffs[0] & !B2_dffs[1] & div2[1];
B2L7_p4_out = !B2_dffs[0] & B2_dffs[1] & !div2[1];
B2L7 = B2L7_p0_out # B2L7_p1_out # B2L7_p2_out # B2L7_p3_out # B2L7_p4_out;


--B2L8 is lpm_counter:clkcounter2_rtl_1|dffs[1]~208 at LC67
B2L8_p0_out = !B2_dffs[0] & B2_dffs[1] & div2[3] & !B2_dffs[3];
B2L8_p1_out = !div2[2] & !B2_dffs[2] & !B2_dffs[0] & B2_dffs[1];
B2L8_p2_out = div2[2] & B2_dffs[2] & B2_dffs[0] & !B2_dffs[1];
B2L8_p3_out = div2[2] & B2_dffs[2] & !B2_dffs[0] & B2_dffs[1];
B2L8_p4_out = B2_dffs[0] & !B2_dffs[1] & div2[3] & !B2_dffs[3];
B2L8 = B2L7 # B2L8_p0_out # B2L8_p1_out # B2L8_p2_out # B2L8_p3_out # B2L8_p4_out;


--B2L9 is lpm_counter:clkcounter2_rtl_1|dffs[1]~214 at LC68
B2L9_p0_out = B2_dffs[0] & !B2_dffs[1] & div2[4] & B2_dffs[4];
B2L9_p1_out = !div2[3] & B2_dffs[3] & B2_dffs[0] & !B2_dffs[1];
B2L9_p2_out = !div2[3] & B2_dffs[3] & !B2_dffs[0] & B2_dffs[1];
B2L9_p3_out = B2_dffs[0] & !B2_dffs[1] & !div2[4] & !B2_dffs[4];
B2L9_p4_out = !B2_dffs[0] & B2_dffs[1] & !div2[4] & !B2_dffs[4];
B2L9 = B2L8 # B2L9_p0_out # B2L9_p1_out # B2L9_p2_out # B2L9_p3_out # B2L9_p4_out;


--B1L51 is lpm_counter:clkcounter1_rtl_0|dffs[2]~220 at LC49
B1L51_p1_out = !div1[0] & B1_dffs[2] & B1_dffs[0] & !B1_dffs[1];
B1L51_p2_out = B1_dffs[2] & !B1_dffs[0] & B1_dffs[1] & !div1[1];
B1L51 = B1L51_p1_out # B1L51_p2_out;


--B1L61 is lpm_counter:clkcounter1_rtl_0|dffs[2]~223 at LC50
B1L61_p0_out = !B1_dffs[2] & B1_dffs[0] & B1_dffs[1] & div1[5] & !B1_dffs[5];
B1L61_p1_out = div1[3] & !B1_dffs[3] & !B1_dffs[2] & B1_dffs[0] & B1_dffs[1];
B1L61_p2_out = !div1[3] & B1_dffs[3] & !B1_dffs[2] & B1_dffs[0] & B1_dffs[1];
B1L61_p3_out = !B1_dffs[2] & B1_dffs[0] & B1_dffs[1] & !div1[4] & !B1_dffs[4];
B1L61_p4_out = !B1_dffs[2] & B1_dffs[0] & B1_dffs[1] & div1[4] & B1_dffs[4];
B1L61 = B1L51 # B1L61_p0_out # B1L61_p1_out # B1L61_p2_out # B1L61_p3_out # B1L61_p4_out;


--B1L71 is lpm_counter:clkcounter1_rtl_0|dffs[2]~229 at LC51
B1L71_p0_out = B1_dffs[2] & B1L41 & div1[3] & !B1_dffs[3];
B1L71_p1_out = !div1[5] & B1_dffs[5] & !B1_dffs[2] & B1_dffs[0] & B1_dffs[1];
B1L71_p2_out = !B1_dffs[2] & B1_dffs[0] & B1_dffs[1] & B1L11;
B1L71_p3_out = B1_dffs[2] & !B1_dffs[0] & B1L21;
B1L71_p4_out = B1_dffs[2] & !B1_dffs[1] & B1L31;
B1L71 = B1L61 # B1L71_p0_out # B1L71_p1_out # B1L71_p2_out # B1L71_p3_out # B1L71_p4_out;


--B2L51 is lpm_counter:clkcounter2_rtl_1|dffs[2]~220 at LC70
B2L51_p1_out = !div2[0] & B2_dffs[2] & B2_dffs[0] & !B2_dffs[1];
B2L51_p2_out = B2_dffs[2] & !B2_dffs[0] & B2_dffs[1] & !div2[1];
B2L51 = B2L51_p1_out # B2L51_p2_out;


--B2L61 is lpm_counter:clkcounter2_rtl_1|dffs[2]~223 at LC71
B2L61_p0_out = !B2_dffs[2] & B2_dffs[0] & B2_dffs[1] & div2[5] & !B2_dffs[5];
B2L61_p1_out = div2[3] & !B2_dffs[3] & !B2_dffs[2] & B2_dffs[0] & B2_dffs[1];
B2L61_p2_out = !div2[3] & B2_dffs[3] & !B2_dffs[2] & B2_dffs[0] & B2_dffs[1];
B2L61_p3_out = !B2_dffs[2] & B2_dffs[0] & B2_dffs[1] & !div2[4] & !B2_dffs[4];
B2L61_p4_out = !B2_dffs[2] & B2_dffs[0] & B2_dffs[1] & div2[4] & B2_dffs[4];
B2L61 = B2L51 # B2L61_p0_out # B2L61_p1_out # B2L61_p2_out # B2L61_p3_out # B2L61_p4_out;


--B2L71 is lpm_counter:clkcounter2_rtl_1|dffs[2]~229 at LC72
B2L71_p0_out = B2_dffs[2] & B2L41 & div2[3] & !B2_dffs[3];
B2L71_p1_out = !div2[5] & B2_dffs[5] & !B2_dffs[2] & B2_dffs[0] & B2_dffs[1];
B2L71_p2_out = !B2_dffs[2] & B2_dffs[0] & B2_dffs[1] & B2L11;
B2L71_p3_out = B2_dffs[2] & !B2_dffs[0] & B2L21;
B2L71_p4_out = B2_dffs[2] & !B2_dffs[1] & B2L31;
B2L71 = B2L61 # B2L71_p0_out # B2L71_p1_out # B2L71_p2_out # B2L71_p3_out # B2L71_p4_out;


--A1L441 is reduce_nor~63 at LC111
A1L441_p0_out = !div1[3] & B1_dffs[3];
A1L441_p1_out = !div1[5] & B1_dffs[5];
A1L441_p2_out = div1[5] & !B1_dffs[5];
A1L441_p3_out = div1[4] & B1_dffs[4];
A1L441_p4_out = !div1[4] & !B1_dffs[4];
A1L441 = A1L441_p0_out # A1L441_p1_out # A1L441_p2_out # A1L441_p3_out # A1L441_p4_out;


--A1L541 is reduce_nor~72 at LC77
A1L541_p0_out = !div2[3] & B2_dffs[3];
A1L541_p1_out = !div2[5] & B2_dffs[5];
A1L541_p2_out = div2[5] & !B2_dffs[5];
A1L541_p3_out = div2[4] & B2_dffs[4];
A1L541_p4_out = !div2[4] & !B2_dffs[4];
A1L541 = A1L541_p0_out # A1L541_p1_out # A1L541_p2_out # A1L541_p3_out # A1L541_p4_out;


--B1L62 is lpm_counter:clkcounter1_rtl_0|dffs[4]~235 at LC54
B1L62_p1_out = div1[5] & !B1_dffs[5] & !B1_dffs[4] & B1_dffs[3] & B1_dffs[2] & B1_dffs[0] & B1_dffs[1];
B1L62_p2_out = !div1[5] & B1_dffs[5] & !B1_dffs[4] & B1_dffs[3] & B1_dffs[2] & B1_dffs[0] & B1_dffs[1];
B1L62_p3_out = !B1_dffs[4] & B1_dffs[3] & B1_dffs[2] & B1_dffs[0] & B1_dffs[1] & B1L02;
B1L62_p4_out = B1_dffs[4] & B1L12 & div1[4];
B1L62 = B1L62_p1_out # B1L62_p2_out # B1L62_p3_out # B1L62_p4_out;


--B1L72 is lpm_counter:clkcounter1_rtl_0|dffs[4]~240 at LC55
B1L72_p0_out = B1_dffs[4] & B1L42 & div1[2] & B1_dffs[2];
B1L72_p1_out = B1L12 & div1[5] & !B1_dffs[5] & B1_dffs[4];
B1L72_p2_out = B1L12 & !div1[5] & B1_dffs[5] & B1_dffs[4];
B1L72_p3_out = B1_dffs[4] & B1L22 & !div1[0] & B1_dffs[0];
B1L72_p4_out = B1_dffs[4] & B1L32 & !div1[1] & B1_dffs[1];
B1L72 = B1L62 # B1L72_p0_out # B1L72_p1_out # B1L72_p2_out # B1L72_p3_out # B1L72_p4_out;


--B2L62 is lpm_counter:clkcounter2_rtl_1|dffs[4]~235 at LC86
B2L62_p1_out = div2[5] & !B2_dffs[5] & !B2_dffs[4] & B2_dffs[3] & B2_dffs[2] & B2_dffs[0] & B2_dffs[1];
B2L62_p2_out = !div2[5] & B2_dffs[5] & !B2_dffs[4] & B2_dffs[3] & B2_dffs[2] & B2_dffs[0] & B2_dffs[1];
B2L62_p3_out = !B2_dffs[4] & B2_dffs[3] & B2_dffs[2] & B2_dffs[0] & B2_dffs[1] & B2L02;
B2L62_p4_out = B2_dffs[4] & B2L12 & div2[4];
B2L62 = B2L62_p1_out # B2L62_p2_out # B2L62_p3_out # B2L62_p4_out;


--B2L72 is lpm_counter:clkcounter2_rtl_1|dffs[4]~240 at LC87
B2L72_p0_out = B2_dffs[4] & B2L42 & div2[2] & B2_dffs[2];
B2L72_p1_out = B2L12 & div2[5] & !B2_dffs[5] & B2_dffs[4];
B2L72_p2_out = B2L12 & !div2[5] & B2_dffs[5] & B2_dffs[4];
B2L72_p3_out = B2_dffs[4] & B2L22 & !div2[0] & B2_dffs[0];
B2L72_p4_out = B2_dffs[4] & B2L32 & !div2[1] & B2_dffs[1];
B2L72 = B2L62 # B2L72_p0_out # B2L72_p1_out # B2L72_p2_out # B2L72_p3_out # B2L72_p4_out;


--B1L63 is lpm_counter:clkcounter1_rtl_0|dffs[5]~246 at LC10
B1L63_p1_out = B1L03 & B1_dffs[4] & B1_dffs[3] & B1_dffs[2] & B1_dffs[0] & !B1_dffs[5] & B1_dffs[1];
B1L63_p2_out = B1_dffs[5] & B1L13 & !div1[5];
B1L63 = B1L63_p1_out # B1L63_p2_out;


--B1L73 is lpm_counter:clkcounter1_rtl_0|dffs[5]~249 at LC11
B1L73_p0_out = B1_dffs[5] & B1L82 & div1[4] & B1_dffs[4];
B1L73_p1_out = B1L23 & !div1[0] & B1_dffs[0] & B1_dffs[5];
B1L73_p2_out = B1_dffs[5] & B1L33 & !div1[1] & B1_dffs[1];
B1L73_p3_out = B1_dffs[5] & B1L43 & div1[2] & B1_dffs[2];
B1L73_p4_out = B1_dffs[5] & B1L53 & !div1[3] & B1_dffs[3];
B1L73 = B1L63 # B1L73_p0_out # B1L73_p1_out # B1L73_p2_out # B1L73_p3_out # B1L73_p4_out;


--B2L53 is lpm_counter:clkcounter2_rtl_1|dffs[5]~246 at LC81
B2L53_p1_out = B2L92 & B2_dffs[4] & B2_dffs[3] & B2_dffs[2] & B2_dffs[0] & !B2_dffs[5] & B2_dffs[1];
B2L53_p2_out = B2_dffs[5] & B2L03 & !div2[5];
B2L53 = B2L53_p1_out # B2L53_p2_out;


--B2L63 is lpm_counter:clkcounter2_rtl_1|dffs[5]~249 at LC82
B2L63_p0_out = B2_dffs[5] & B2L12 & div2[4] & B2_dffs[4];
B2L63_p1_out = B2L13 & !div2[0] & B2_dffs[0] & B2_dffs[5];
B2L63_p2_out = B2_dffs[5] & B2L23 & !div2[1] & B2_dffs[1];
B2L63_p3_out = B2_dffs[5] & B2L33 & div2[2] & B2_dffs[2];
B2L63_p4_out = B2_dffs[5] & B2L43 & !div2[3] & B2_dffs[3];
B2L63 = B2L53 # B2L63_p0_out # B2L63_p1_out # B2L63_p2_out # B2L63_p3_out # B2L63_p4_out;


--A1L91 is clko1~10 at LC6
A1L91_p1_out = div1[0] & !B1_dffs[0];
A1L91_p2_out = !div1[0] & B1_dffs[0];
A1L91 = A1L91_p1_out # A1L91_p2_out;


--A1L02 is clko1~13 at LC7
A1L02_p0_out = div1[3] & !B1_dffs[3];
A1L02_p1_out = div1[1] & !B1_dffs[1];
A1L02_p2_out = !div1[1] & B1_dffs[1];
A1L02_p3_out = !div1[2] & !B1_dffs[2];
A1L02_p4_out = div1[2] & B1_dffs[2];
A1L02 = A1L91 # A1L02_p0_out # A1L02_p1_out # A1L02_p2_out # A1L02_p3_out # A1L02_p4_out;


--~VCC~0 is ~VCC~0 at LC3
~VCC~0_or_out = GND;
~VCC~0 = !(~VCC~0_or_out);