cpld_lctl.hif

CPLD的例子程序1,EPM7128芯片,ISA总线

Version 4.2 Build 157 12/07/2004 SJ Full Version
25
1209
OFF
OFF
OFF
OFF
OFF
FV_OFF
VRSM_ON
VHSM_ON
RETIME_OFF
REMAP_OFF
0
-- Start Partition --
|
ADV_NETLIST_OPT_SYNTH_WYSIWYG_REMAP
Off
ADV_NETLIST_OPT_SYNTH_GATE_RETIME
Off
STATE_MACHINE_PROCESSING
Auto
STRATIXII_OPTIMIZATION_TECHNIQUE
Balanced
CYCLONE_OPTIMIZATION_TECHNIQUE
Balanced
CYCLONEII_OPTIMIZATION_TECHNIQUE
Balanced
STRATIX_OPTIMIZATION_TECHNIQUE
Balanced
MAXII_OPTIMIZATION_TECHNIQUE
Balanced
----
-- End Partition --
# entity
CPLD_LCTL
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
CPLD_LCTL.vhd
1189673009
4
# storage
db|CPLD_LCTL.(0).cnf
db|CPLD_LCTL.(0).cnf
# internal_option {
AUTO_RESOURCE_SHARING
OFF
PRESERVE_REGISTER
OFF
DUP_REG_EXTRACTION
ON
DUP_LOGIC_EXTRACTION
ON
}
# end
# entity
lpm_latch
# case_insensitive
# source_file
d:|altera|quartus42|libraries|megafunctions|lpm_latch.tdf
1101745314
6
# storage
db|CPLD_LCTL.(1).cnf
db|CPLD_LCTL.(1).cnf
# user_parameter {
LPM_WIDTH
8
PARAMETER_DEC
USR
LPM_AVALUE
UNUSED
PARAMETER_UNKNOWN
DEF
}
# used_port {
aset
data0
data1
data2
data3
data4
data5
data6
data7
gate
q0
q1
q2
q3
q4
q5
q6
q7
}
# include_file {
d:|altera|quartus42|libraries|megafunctions|lpm_constant.inc
1094870052
}
# end
# complete