cpld_lctl.tan.rpt

CPLD的例子程序1,EPM7128芯片,ISA总线

; N/A                                     ; None                                                ; 10.900 ns       ; DK_IN[3]   ; D[3]      ;
; N/A                                     ; None                                                ; 10.900 ns       ; INT_COM[3] ; D[3]      ;
; N/A                                     ; None                                                ; 10.900 ns       ; DK_IN[4]   ; D[4]      ;
; N/A                                     ; None                                                ; 10.900 ns       ; DK_IN[5]   ; D[5]      ;
; N/A                                     ; None                                                ; 10.900 ns       ; DK_IN[6]   ; D[6]      ;
; N/A                                     ; None                                                ; 10.900 ns       ; DK_IN[7]   ; D[7]      ;
; N/A                                     ; None                                                ; 10.600 ns       ; RST        ; DK_OUT[0] ;
; N/A                                     ; None                                                ; 10.600 ns       ; A[8]       ; DK_OUT[0] ;
; N/A                                     ; None                                                ; 10.600 ns       ; A[5]       ; DK_OUT[0] ;
; N/A                                     ; None                                                ; 10.600 ns       ; A[7]       ; DK_OUT[0] ;
; N/A                                     ; None                                                ; 10.600 ns       ; A[3]       ; DK_OUT[0] ;
; N/A                                     ; None                                                ; 10.600 ns       ; A[2]       ; DK_OUT[0] ;
; N/A                                     ; None                                                ; 10.600 ns       ; A[1]       ; DK_OUT[0] ;
; N/A                                     ; None                                                ; 10.600 ns       ; A[0]       ; DK_OUT[0] ;
; Timing analysis restricted to 200 rows. ; To change the limit use Settings (Assignments menu) ;                 ;            ;           ;
+-----------------------------------------+-----------------------------------------------------+-----------------+------------+-----------+


+--------------------------+
; Timing Analyzer Messages ;
+--------------------------+
Info: *******************************************************************
Info: Running Quartus II Timing Analyzer
    Info: Version 4.2 Build 157 12/07/2004 SJ Full Version
    Info: Processing started: Fri Sep 14 15:09:38 2007
Info: Command: quartus_tan --import_settings_files=off --export_settings_files=off CPLD_LCTL -c CPLD_LCTL
Info: Started post-fitting delay annotation
Info: Delay annotation completed successfully
Info: Found combinational loop of 1 nodes
    Info: Node "lpm_latch:lpm_latch_DKO|q[0]~948"
Info: Found combinational loop of 1 nodes
    Info: Node "lpm_latch:lpm_latch_DKO|q[1]~942"
Info: Found combinational loop of 1 nodes
    Info: Node "lpm_latch:lpm_latch_DKO|q[2]~936"
Info: Found combinational loop of 1 nodes
    Info: Node "lpm_latch:lpm_latch_DKO|q[3]~930"
Info: Found combinational loop of 1 nodes
    Info: Node "lpm_latch:lpm_latch_DKO|q[4]~924"
Info: Found combinational loop of 1 nodes
    Info: Node "lpm_latch:lpm_latch_DKO|q[5]~918"
Info: Found combinational loop of 1 nodes
    Info: Node "lpm_latch:lpm_latch_DKO|q[6]~912"
Info: Found combinational loop of 1 nodes
    Info: Node "lpm_latch:lpm_latch_DKO|q[7]~906"
Info: Found combinational loop of 1 nodes
    Info: Node "lpm_latch:MD3_latch|q[0]~746"
Info: Found combinational loop of 1 nodes
    Info: Node "lpm_latch:MD4_latch|q[0]~746"
Info: Found combinational loop of 1 nodes
    Info: Node "lpm_latch:MD5_latch|q[0]~746"
Info: Found combinational loop of 1 nodes
    Info: Node "lpm_latch:MD1_latch|q[0]~746"
Info: Found combinational loop of 1 nodes
    Info: Node "lpm_latch:MD2_latch|q[0]~746"
Info: Found combinational loop of 1 nodes
    Info: Node "lpm_latch:MD3_latch|q[1]~740"
Info: Found combinational loop of 1 nodes
    Info: Node "lpm_latch:MD4_latch|q[1]~740"
Info: Found combinational loop of 1 nodes
    Info: Node "lpm_latch:MD5_latch|q[1]~740"
Info: Found combinational loop of 1 nodes
    Info: Node "lpm_latch:MD1_latch|q[1]~740"
Info: Found combinational loop of 1 nodes
    Info: Node "lpm_latch:MD2_latch|q[1]~740"
Info: Found combinational loop of 1 nodes
    Info: Node "lpm_latch:MD3_latch|q[2]~734"
Info: Found combinational loop of 1 nodes
    Info: Node "lpm_latch:MD4_latch|q[2]~734"
Info: Found combinational loop of 1 nodes
    Info: Node "lpm_latch:MD5_latch|q[2]~734"
Info: Found combinational loop of 1 nodes
    Info: Node "lpm_latch:MD1_latch|q[2]~734"
Info: Found combinational loop of 1 nodes
    Info: Node "lpm_latch:MD2_latch|q[2]~734"
Info: Found combinational loop of 1 nodes
    Info: Node "lpm_latch:MD3_latch|q[3]~728"
Info: Found combinational loop of 1 nodes
    Info: Node "lpm_latch:MD4_latch|q[3]~728"
Info: Found combinational loop of 1 nodes
    Info: Node "lpm_latch:MD5_latch|q[3]~728"
Info: Found combinational loop of 1 nodes
    Info: Node "lpm_latch:MD1_latch|q[3]~728"
Info: Found combinational loop of 1 nodes
    Info: Node "lpm_latch:MD2_latch|q[3]~728"
Info: Found combinational loop of 1 nodes
    Info: Node "lpm_latch:MD3_latch|q[4]~722"
Info: Found combinational loop of 1 nodes
    Info: Node "lpm_latch:MD4_latch|q[4]~722"
Info: Found combinational loop of 1 nodes
    Info: Node "lpm_latch:MD5_latch|q[4]~722"
Info: Found combinational loop of 1 nodes
    Info: Node "lpm_latch:MD1_latch|q[4]~722"
Info: Found combinational loop of 1 nodes
    Info: Node "lpm_latch:MD2_latch|q[4]~722"
Info: Found combinational loop of 1 nodes
    Info: Node "lpm_latch:MD3_latch|q[5]~716"
Info: Found combinational loop of 1 nodes
    Info: Node "lpm_latch:MD4_latch|q[5]~716"
Info: Found combinational loop of 1 nodes
    Info: Node "lpm_latch:MD5_latch|q[5]~716"
Info: Found combinational loop of 1 nodes
    Info: Node "lpm_latch:MD1_latch|q[5]~716"
Info: Found combinational loop of 1 nodes
    Info: Node "lpm_latch:MD2_latch|q[5]~716"
Info: Found combinational loop of 1 nodes
    Info: Node "lpm_latch:MD3_latch|q[6]~710"
Info: Found combinational loop of 1 nodes
    Info: Node "lpm_latch:MD4_latch|q[6]~710"
Info: Found combinational loop of 1 nodes
    Info: Node "lpm_latch:MD5_latch|q[6]~710"
Info: Found combinational loop of 1 nodes
    Info: Node "lpm_latch:MD1_latch|q[6]~710"
Info: Found combinational loop of 1 nodes
    Info: Node "lpm_latch:MD2_latch|q[6]~710"
Info: Found combinational loop of 1 nodes
    Info: Node "lpm_latch:MD3_latch|q[7]~704"
Info: Found combinational loop of 1 nodes
    Info: Node "lpm_latch:MD4_latch|q[7]~704"
Info: Found combinational loop of 1 nodes
    Info: Node "lpm_latch:MD5_latch|q[7]~704"
Info: Found combinational loop of 1 nodes
    Info: Node "lpm_latch:MD1_latch|q[7]~704"
Info: Found combinational loop of 1 nodes
    Info: Node "lpm_latch:MD2_latch|q[7]~704"
Info: Longest tpd from source pin "RST" to destination pin "D[1]" is 17.700 ns
    Info: 1: + IC(0.000 ns) + CELL(1.400 ns) = 1.400 ns; Loc. = PIN_41; Fanout = 144; PIN Node = 'RST'
    Info: 2: + IC(0.000 ns) + CELL(7.600 ns) = 9.000 ns; Loc. = LC95; Fanout = 5; COMB LOOP Node = 'lpm_latch:MD2_latch|q[1]~740'
        Info: Loc. = LC95; Node "lpm_latch:MD2_latch|q[1]~740"
    Info: 3: + IC(2.700 ns) + CELL(4.400 ns) = 16.100 ns; Loc. = LC69; Fanout = 1; COMB Node = 'D~11315'
    Info: 4: + IC(0.000 ns) + CELL(1.600 ns) = 17.700 ns; Loc. = PIN_63; Fanout = 0; PIN Node = 'D[1]'
    Info: Total cell delay = 15.000 ns ( 84.75 % )
    Info: Total interconnect delay = 2.700 ns ( 15.25 % )
Info: Quartus II Timing Analyzer was successful. 0 errors, 0 warnings
    Info: Processing ended: Fri Sep 14 15:09:38 2007
    Info: Elapsed time: 00:00:01