uart.smp_dump.txt

自己用VHDL写的一个串口程序

State Machine - |UART|TRANSMIT:U1|PRESENT_STATE
Name PRESENT_STATE.x_9 PRESENT_STATE.x_8 PRESENT_STATE.x_7 PRESENT_STATE.x_6 PRESENT_STATE.x_5 PRESENT_STATE.x_4 PRESENT_STATE.x_3 PRESENT_STATE.x_2 PRESENT_STATE.x_1 PRESENT_STATE.x_0 PRESENT_STATE.x PRESENT_STATE.x_stop PRESENT_STATE.x_shift PRESENT_STATE.x_wait PRESENT_STATE.x_start PRESENT_STATE.x_idle 
PRESENT_STATE.x_idle 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 
PRESENT_STATE.x_start 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 
PRESENT_STATE.x_wait 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 1 
PRESENT_STATE.x_shift 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 1 
PRESENT_STATE.x_stop 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 1 
PRESENT_STATE.x 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 1 
PRESENT_STATE.x_0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 1 
PRESENT_STATE.x_1 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 1 
PRESENT_STATE.x_2 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 1 
PRESENT_STATE.x_3 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 1 
PRESENT_STATE.x_4 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 1 
PRESENT_STATE.x_5 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 1 
PRESENT_STATE.x_6 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 1 
PRESENT_STATE.x_7 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 1 
PRESENT_STATE.x_8 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 1 
PRESENT_STATE.x_9 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 

State Machine - |UART|BEGINS:U0|PRESENT_STATE
Name PRESENT_STATE.state3 PRESENT_STATE.state2 PRESENT_STATE.state1 
PRESENT_STATE.state1 0 0 0 
PRESENT_STATE.state2 0 1 1 
PRESENT_STATE.state3 1 0 1