uart.map.rpt

自己用VHDL写的一个串口程序

+------------------------------------------------------------------------------------------------------------------------------------------+
; Multiplexer Restructuring Statistics (Restructuring Performed)                                                                           ;
+--------------------+-----------+---------------+----------------------+------------------------+------------+----------------------------+
; Multiplexer Inputs ; Bus Width ; Baseline Area ; Area if Restructured ; Saving if Restructured ; Registered ; Example Multiplexer Output ;
+--------------------+-----------+---------------+----------------------+------------------------+------------+----------------------------+
; 5:1                ; 4 bits    ; 12 LEs        ; 4 LEs                ; 8 LEs                  ; Yes        ; |UART|TRANSMIT:U1|LEN[2]   ;
; 5:1                ; 4 bits    ; 12 LEs        ; 4 LEs                ; 8 LEs                  ; Yes        ; |UART|BEGINS:U0|TEMP[0]    ;
; 8:1                ; 4 bits    ; 20 LEs        ; 4 LEs                ; 16 LEs                 ; Yes        ; |UART|TRANSMIT:U1|TEMP[3]  ;
+--------------------+-----------+---------------+----------------------+------------------------+------------+----------------------------+


+----------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: Top-level Entity: |UART ;
+----------------+-------+---------------------------------------------+
; Parameter Name ; Value ; Type                                        ;
+----------------+-------+---------------------------------------------+
; n              ; 1042  ; Signed Integer                              ;
+----------------+-------+---------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings Tables in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+--------------------------------------------------------+
; Parameter Settings for User Entity Instance: fenpin:U3 ;
+----------------+-------+-------------------------------+
; Parameter Name ; Value ; Type                          ;
+----------------+-------+-------------------------------+
; n              ; 1042  ; Signed Integer                ;
+----------------+-------+-------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings Tables in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-------------------------------+
; Analysis & Synthesis Messages ;
+-------------------------------+
Info: *******************************************************************
Info: Running Quartus II Analysis & Synthesis
    Info: Version 7.0 Build 33 02/05/2007 SJ Full Version
    Info: Processing started: Mon May 14 10:52:18 2007
Info: Command: quartus_map --read_settings_files=on --write_settings_files=off UART -c UART
Info: Found 2 design units, including 1 entities, in source file fenpin.vhd
    Info: Found design unit 1: fenpin-RTL
    Info: Found entity 1: fenpin
Info: Found 2 design units, including 1 entities, in source file UART.vhd
    Info: Found design unit 1: UART-BEHAV
    Info: Found entity 1: UART
Info: Found 2 design units, including 1 entities, in source file BEGINS.vhd
    Info: Found design unit 1: BEGINS-BEHAV
    Info: Found entity 1: BEGINS
Info: Found 2 design units, including 1 entities, in source file TRANSMIT.vhd
    Info: Found design unit 1: TRANSMIT-BEHAV
    Info: Found entity 1: TRANSMIT
Info: Elaborating entity "UART" for the top level hierarchy
Warning (10540): VHDL Signal Declaration warning at UART.vhd(45): used explicit default value for signal "RESET" because signal was never assigned a value
Warning (10540): VHDL Signal Declaration warning at UART.vhd(46): used explicit default value for signal "DATAIN" because signal was never assigned a value
Info: Elaborating entity "BEGINS" for hierarchy "BEGINS:U0"
Info: Elaborating entity "TRANSMIT" for hierarchy "TRANSMIT:U1"
Info: Elaborating entity "fenpin" for hierarchy "fenpin:U3"
Info: State machine "|UART|TRANSMIT:U1|PRESENT_STATE" contains 16 states
Info: State machine "|UART|BEGINS:U0|PRESENT_STATE" contains 3 states
Info: Selected Auto state machine encoding method for state machine "|UART|TRANSMIT:U1|PRESENT_STATE"
Info: Encoding result for state machine "|UART|TRANSMIT:U1|PRESENT_STATE"
    Info: Completed encoding using 16 state bits
        Info: Encoded state bit "TRANSMIT:U1|PRESENT_STATE.x_9"
        Info: Encoded state bit "TRANSMIT:U1|PRESENT_STATE.x_8"
        Info: Encoded state bit "TRANSMIT:U1|PRESENT_STATE.x_7"
        Info: Encoded state bit "TRANSMIT:U1|PRESENT_STATE.x_6"
        Info: Encoded state bit "TRANSMIT:U1|PRESENT_STATE.x_5"
        Info: Encoded state bit "TRANSMIT:U1|PRESENT_STATE.x_4"
        Info: Encoded state bit "TRANSMIT:U1|PRESENT_STATE.x_3"
        Info: Encoded state bit "TRANSMIT:U1|PRESENT_STATE.x_2"
        Info: Encoded state bit "TRANSMIT:U1|PRESENT_STATE.x_1"
        Info: Encoded state bit "TRANSMIT:U1|PRESENT_STATE.x_0"
        Info: Encoded state bit "TRANSMIT:U1|PRESENT_STATE.x"
        Info: Encoded state bit "TRANSMIT:U1|PRESENT_STATE.x_stop"
        Info: Encoded state bit "TRANSMIT:U1|PRESENT_STATE.x_shift"
        Info: Encoded state bit "TRANSMIT:U1|PRESENT_STATE.x_wait"
        Info: Encoded state bit "TRANSMIT:U1|PRESENT_STATE.x_start"
        Info: Encoded state bit "TRANSMIT:U1|PRESENT_STATE.x_idle"
    Info: State "|UART|TRANSMIT:U1|PRESENT_STATE.x_idle" uses code string "0000000000000000"
    Info: State "|UART|TRANSMIT:U1|PRESENT_STATE.x_start" uses code string "0000000000000011"
    Info: State "|UART|TRANSMIT:U1|PRESENT_STATE.x_wait" uses code string "0000000000000101"
    Info: State "|UART|TRANSMIT:U1|PRESENT_STATE.x_shift" uses code string "0000000000001001"
    Info: State "|UART|TRANSMIT:U1|PRESENT_STATE.x_stop" uses code string "0000000000010001"
    Info: State "|UART|TRANSMIT:U1|PRESENT_STATE.x" uses code string "0000000000100001"
    Info: State "|UART|TRANSMIT:U1|PRESENT_STATE.x_0" uses code string "0000000001000001"
    Info: State "|UART|TRANSMIT:U1|PRESENT_STATE.x_1" uses code string "0000000010000001"
    Info: State "|UART|TRANSMIT:U1|PRESENT_STATE.x_2" uses code string "0000000100000001"
    Info: State "|UART|TRANSMIT:U1|PRESENT_STATE.x_3" uses code string "0000001000000001"
    Info: State "|UART|TRANSMIT:U1|PRESENT_STATE.x_4" uses code string "0000010000000001"
    Info: State "|UART|TRANSMIT:U1|PRESENT_STATE.x_5" uses code string "0000100000000001"
    Info: State "|UART|TRANSMIT:U1|PRESENT_STATE.x_6" uses code string "0001000000000001"
    Info: State "|UART|TRANSMIT:U1|PRESENT_STATE.x_7" uses code string "0010000000000001"
    Info: State "|UART|TRANSMIT:U1|PRESENT_STATE.x_8" uses code string "0100000000000001"
    Info: State "|UART|TRANSMIT:U1|PRESENT_STATE.x_9" uses code string "1000000000000001"
Info: Selected Auto state machine encoding method for state machine "|UART|BEGINS:U0|PRESENT_STATE"
Info: Encoding result for state machine "|UART|BEGINS:U0|PRESENT_STATE"
    Info: Completed encoding using 3 state bits
        Info: Encoded state bit "BEGINS:U0|PRESENT_STATE.state3"
        Info: Encoded state bit "BEGINS:U0|PRESENT_STATE.state2"
        Info: Encoded state bit "BEGINS:U0|PRESENT_STATE.state1"
    Info: State "|UART|BEGINS:U0|PRESENT_STATE.state1" uses code string "000"
    Info: State "|UART|BEGINS:U0|PRESENT_STATE.state2" uses code string "011"
    Info: State "|UART|BEGINS:U0|PRESENT_STATE.state3" uses code string "101"
Info: 8 registers lost all their fanouts during netlist optimizations. The first 8 are displayed below.
    Info: Register "U1/PRESENT_STATE.x_shift" lost all its fanouts during netlist optimizations.
    Info: Register "U1/PRESENT_STATE.x_stop" lost all its fanouts during netlist optimizations.
    Info: Register "U1/PRESENT_STATE.x" lost all its fanouts during netlist optimizations.
    Info: Register "U1/PRESENT_STATE.x_5" lost all its fanouts during netlist optimizations.
    Info: Register "U1/PRESENT_STATE.x_6" lost all its fanouts during netlist optimizations.
    Info: Register "U1/PRESENT_STATE.x_7" lost all its fanouts during netlist optimizations.
    Info: Register "U1/PRESENT_STATE.x_8" lost all its fanouts during netlist optimizations.
    Info: Register "U1/PRESENT_STATE.x_9" lost all its fanouts during netlist optimizations.
Info: Implemented 74 device resources after synthesis - the final resource count might be different
    Info: Implemented 2 input pins
    Info: Implemented 3 output pins
    Info: Implemented 69 logic cells
Info: Quartus II Analysis & Synthesis was successful. 0 errors, 2 warnings
    Info: Allocated 141 megabytes of memory during processing
    Info: Processing ended: Mon May 14 10:52:21 2007
    Info: Elapsed time: 00:00:03