dct_1d.qsf

来自「一维DCT变换的verilog源码」· QSF 代码 · 共 44 行

# Copyright (C) 1991-2006 Altera Corporation
# Your use of Altera Corporation's design tools, logic functions 
# and other software and tools, and its AMPP partner logic 
# functions, and any output files any of the foregoing 
# (including device programming or simulation files), and any 
# associated documentation or information are expressly subject 
# to the terms and conditions of the Altera Program License 
# Subscription Agreement, Altera MegaCore Function License 
# Agreement, or other applicable license agreement, including, 
# without limitation, that your use is for the sole purpose of 
# programming logic devices manufactured by Altera and sold by 
# Altera or its authorized distributors.  Please refer to the 
# applicable agreement for further details.


# The default values for assignments are stored in the file
#		dct_1d_assignment_defaults.qdf
# If this file doesn't exist, and for assignments not listed, see file
#		assignment_defaults.qdf

# Altera recommends that you do not modify this file. This
# file is updated automatically by the Quartus II software
# and any changes you make may be lost or overwritten.


set_global_assignment -name FAMILY "Cyclone II"
set_global_assignment -name DEVICE EP2C35F672C6
set_global_assignment -name TOP_LEVEL_ENTITY dct_1d
set_global_assignment -name ORIGINAL_QUARTUS_VERSION 6.0
set_global_assignment -name PROJECT_CREATION_TIME_DATE "10:59:57  JUNE 22, 2007"
set_global_assignment -name LAST_QUARTUS_VERSION 6.0
set_global_assignment -name VERILOG_FILE csa51.v
set_global_assignment -name VERILOG_FILE csa5.v
set_global_assignment -name VERILOG_FILE csa52.v
set_global_assignment -name VERILOG_FILE csa6.v
set_global_assignment -name VERILOG_FILE add.v
set_global_assignment -name VERILOG_FILE csa4.v
set_global_assignment -name VERILOG_FILE dct_1d.v
set_global_assignment -name VERILOG_FILE scc2.v
set_global_assignment -name VERILOG_FILE scc4.v
set_global_assignment -name VERILOG_FILE sub.v
set_global_assignment -name VECTOR_WAVEFORM_FILE simulationofdct1d.vwf
set_global_assignment -name SIMULATION_MODE FUNCTIONAL
set_global_assignment -name VECTOR_INPUT_SOURCE "D:\\SOPC\\JPEG\\DCT_1D\\simulationofdct1d.vwf"