test.hif

两路电机CPLD控制,串口通信

Version 6.0 Build 178 04/27/2006 SJ Full Version
36
1869
OFF
OFF
OFF
OFF
OFF
FV_OFF
Level2
0
0
VRSM_ON
VHSM_ON
0
-- Start Partition --
-- End Partition --
-- Start Library Paths --
-- End Library Paths --
-- Start VHDL Libraries --
-- End VHDL Libraries --
# entity
SEL
# storage
db|test.(2).cnf
db|test.(2).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
SEL.vhd
3331fa2749ae45dbc49bf3e1f037f988
4
# internal_option {
AUTO_RESOURCE_SHARING
OFF
}
# hierarchies {
SEL:inst2
}
# end
# entity
RxUnit
# storage
db|test.(3).cnf
db|test.(3).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
RxUnit.vhd
d471f67584a4aa43114beb4bd8e8c6
4
# internal_option {
AUTO_RESOURCE_SHARING
OFF
}
# include_file {
uart_lib.vhd
8cf118e5fffb90b86bbf25c5e65dfacc
}
# hierarchies {
RxUnit:inst
}
# end
# entity
ClkUnit
# storage
db|test.(4).cnf
db|test.(4).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
clkUnit.vhd
707de0724bdf711b7e61fe80eae5b7b7
4
# internal_option {
AUTO_RESOURCE_SHARING
OFF
}
# include_file {
uart_lib.vhd
8cf118e5fffb90b86bbf25c5e65dfacc
}
# hierarchies {
ClkUnit:inst1
}
# end
# entity
test
# storage
db|test.(0).cnf
db|test.(0).cnf
# case_insensitive
# source_file
test.bdf
74d1392ad76dcaa186722e3461c4eed9
24
# hierarchies {
|
}
# end
# entity
PWM
# storage
db|test.(1).cnf
db|test.(1).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
PWM.vhd
689827c92e31d883a0ba37d78bb1d5
4
# internal_option {
AUTO_RESOURCE_SHARING
OFF
}
# hierarchies {
PWM:inst4
PWM:inst3
}
# end
# complete