smartsopc_standard_1c12.tan.summary

来自「华清远见 高级的培训 实验代码」· SUMMARY 代码 · 共 117 行

--------------------------------------------------------------------------------------
Timing Analyzer Summary
--------------------------------------------------------------------------------------

Type           : Worst-case tsu
Slack          : N/A
Required Time  : None
Actual Time    : 10.222 ns
From           : IR_RX
To             : niso2_1c12:inst|infrared_uart:the_infrared_uart|infrared_uart_rx:the_infrared_uart_rx|d1_source_rxd
From Clock     : 
To Clock       : SYS_CLK2
Failed Paths   : 0

Type           : Worst-case tco
Slack          : N/A
Required Time  : None
Actual Time    : 12.007 ns
From           : lcd_delay:inst2|delay_block:inst17|delay_counter:inst|lpm_counter:lpm_counter_component|cntr_ud8:auto_generated|safe_q[1]
To             : A[0]
From Clock     : SYS_CLK2
To Clock       : 
Failed Paths   : 0

Type           : Worst-case tpd
Slack          : N/A
Required Time  : None
Actual Time    : 2.124 ns
From           : altera_internal_jtag~TDO
To             : altera_reserved_tdo
From Clock     : 
To Clock       : 
Failed Paths   : 0

Type           : Worst-case th
Slack          : N/A
Required Time  : None
Actual Time    : 4.571 ns
From           : altera_internal_jtag
To             : niso2_1c12:inst|cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_jtag_debug_module_wrapper:the_cpu_jtag_debug_module_wrapper|cpu_jtag_debug_module:the_cpu_jtag_debug_module1|sr[37]
From Clock     : 
To Clock       : altera_internal_jtag~TCKUTAP
Failed Paths   : 0

Type           : Clock Setup: 'pll:inst21|altpll:altpll_component|_clk0'
Slack          : 1.683 ns
Required Time  : 48.00 MHz ( period = 20.833 ns )
Actual Time    : 52.22 MHz ( period = 19.150 ns )
From           : niso2_1c12:inst|cpu:the_cpu|W_alu_result[15]
To             : niso2_1c12:inst|ext_bus_avalon_slave_arbitrator:the_ext_bus_avalon_slave|ext_bus_address[9]
From Clock     : pll:inst21|altpll:altpll_component|_clk0
To Clock       : pll:inst21|altpll:altpll_component|_clk0
Failed Paths   : 0

Type           : Clock Setup: 'SYS_CLK2'
Slack          : 15.757 ns
Required Time  : 48.00 MHz ( period = 20.833 ns )
Actual Time    : 197.01 MHz ( period = 5.076 ns )
From           : delay_reset_block:inst20|reset_counter:inst|lpm_counter:lpm_counter_component|cntr_df8:auto_generated|safe_q[2]
To             : delay_reset_block:inst20|reset_counter:inst|lpm_counter:lpm_counter_component|cntr_df8:auto_generated|safe_q[3]
From Clock     : SYS_CLK2
To Clock       : SYS_CLK2
Failed Paths   : 0

Type           : Clock Setup: 'altera_internal_jtag~TCKUTAP'
Slack          : N/A
Required Time  : None
Actual Time    : 88.83 MHz ( period = 11.257 ns )
From           : sld_hub:sld_hub_inst|jtag_debug_mode_usr1
To             : niso2_1c12:inst|cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_jtag_debug_module_wrapper:the_cpu_jtag_debug_module_wrapper|cpu_jtag_debug_module:the_cpu_jtag_debug_module1|sr[16]
From Clock     : altera_internal_jtag~TCKUTAP
To Clock       : altera_internal_jtag~TCKUTAP
Failed Paths   : 0

Type           : Clock Setup: 'FREQ_INPUT'
Slack          : N/A
Required Time  : None
Actual Time    : Restricted to 275.03 MHz ( period = 3.636 ns )
From           : niso2_1c12:inst|cymometer:the_cymometer|cymometer_avalon_interface:the_cymometer_avalon_interface|cymometer_task_logic:U1|pre_freq[2]
To             : niso2_1c12:inst|cymometer:the_cymometer|cymometer_avalon_interface:the_cymometer_avalon_interface|cymometer_task_logic:U1|pre_freq[31]
From Clock     : FREQ_INPUT
To Clock       : FREQ_INPUT
Failed Paths   : 0

Type           : Clock Hold: 'pll:inst21|altpll:altpll_component|_clk0'
Slack          : 0.822 ns
Required Time  : 48.00 MHz ( period = 20.833 ns )
Actual Time    : N/A
From           : niso2_1c12:inst|jtag_uart:the_jtag_uart|av_waitrequest
To             : niso2_1c12:inst|jtag_uart:the_jtag_uart|av_waitrequest
From Clock     : pll:inst21|altpll:altpll_component|_clk0
To Clock       : pll:inst21|altpll:altpll_component|_clk0
Failed Paths   : 0

Type           : Clock Hold: 'SYS_CLK2'
Slack          : 1.312 ns
Required Time  : 48.00 MHz ( period = 20.833 ns )
Actual Time    : N/A
From           : delay_reset_block:inst20|reset_counter:inst|lpm_counter:lpm_counter_component|cntr_df8:auto_generated|safe_q[0]
To             : delay_reset_block:inst20|reset_counter:inst|lpm_counter:lpm_counter_component|cntr_df8:auto_generated|safe_q[0]
From Clock     : SYS_CLK2
To Clock       : SYS_CLK2
Failed Paths   : 0

Type           : Total number of failed paths
Slack          : 
Required Time  : 
Actual Time    : 
From           : 
To             : 
From Clock     : 
To Clock       : 
Failed Paths   : 0

--------------------------------------------------------------------------------------