beep_pwm.v

这个是华清远见 高级班 培训的 实验 代码

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//output files any of the foregoing (including device programming or
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//of programming logic devices manufactured by Altera and sold by Altera
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// synthesis translate_off
`timescale 1ns / 100ps
// synthesis translate_on
module beep_pwm (
                  // inputs:
                   address,
                   chip_select,
                   clock,
                   read,
                   reset_n,
                   write,
                   write_data,

                  // outputs:
                   pwm_out,
                   read_data
                );

  output           pwm_out;
  output  [ 31: 0] read_data;
  input   [  1: 0] address;
  input            chip_select;
  input            clock;
  input            read;
  input            reset_n;
  input            write;
  input   [ 31: 0] write_data;

  wire             pwm_out;
  wire    [ 31: 0] read_data;
  pwm_avalon_interface the_pwm_avalon_interface
    (
      .address     (address),
      .chip_select (chip_select),
      .clock       (clock),
      .pwm_out     (pwm_out),
      .read        (read),
      .read_data   (read_data),
      .reset_n     (reset_n),
      .write       (write),
      .write_data  (write_data)
    );



endmodule