testusb.tan.qmsg

fpga之ep1 c6的usb实验源码,经实验验证好好用,大家可以试试看哦

{ "Info" "ITAN_NO_REG2REG_EXIST" "USB_AS_ " "Info: No valid register-to-register data paths exist for clock \"USB_AS_\"" {  } {  } 0}
{ "Info" "ITDB_TSU_RESULT" "DataReg\[5\] USB_D\[5\] USB_DS_ -0.736 ns register " "Info: tsu for register \"DataReg\[5\]\" (data pin = \"USB_D\[5\]\", clock pin = \"USB_DS_\") is -0.736 ns" { { "Info" "ITDB_FULL_DATA_PATH_RESULT" "7.611 ns + Longest pin register " "Info: + Longest pin to register delay is 7.611 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.000 ns) 0.000 ns USB_D\[5\] 1 PIN PIN_179 1 " "Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = PIN_179; Fanout = 1; PIN Node = 'USB_D\[5\]'" {  } { { "G:/ezNiosC6C/TestUSB/db/TestUSB_cmp.qrpt" "" { Report "G:/ezNiosC6C/TestUSB/db/TestUSB_cmp.qrpt" Compiler "TestUSB" "UNKNOWN" "V1" "G:/ezNiosC6C/TestUSB/db/TestUSB.quartus_db" { Floorplan "G:/ezNiosC6C/TestUSB/" "" "" { USB_D[5] } "NODE_NAME" } "" } } { "testusb.v" "" { Text "G:/ezNiosC6C/TestUSB/testusb.v" 10 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(1.469 ns) 1.469 ns USB_D\[5\]~2 2 COMB IOC_X35_Y20_N1 2 " "Info: 2: + IC(0.000 ns) + CELL(1.469 ns) = 1.469 ns; Loc. = IOC_X35_Y20_N1; Fanout = 2; COMB Node = 'USB_D\[5\]~2'" {  } { { "G:/ezNiosC6C/TestUSB/db/TestUSB_cmp.qrpt" "" { Report "G:/ezNiosC6C/TestUSB/db/TestUSB_cmp.qrpt" Compiler "TestUSB" "UNKNOWN" "V1" "G:/ezNiosC6C/TestUSB/db/TestUSB.quartus_db" { Floorplan "G:/ezNiosC6C/TestUSB/" "" "1.469 ns" { USB_D[5] USB_D[5]~2 } "NODE_NAME" } "" } } { "testusb.v" "" { Text "G:/ezNiosC6C/TestUSB/testusb.v" 10 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(5.833 ns) + CELL(0.309 ns) 7.611 ns DataReg\[5\] 3 REG LC_X33_Y14_N9 1 " "Info: 3: + IC(5.833 ns) + CELL(0.309 ns) = 7.611 ns; Loc. = LC_X33_Y14_N9; Fanout = 1; REG Node = 'DataReg\[5\]'" {  } { { "G:/ezNiosC6C/TestUSB/db/TestUSB_cmp.qrpt" "" { Report "G:/ezNiosC6C/TestUSB/db/TestUSB_cmp.qrpt" Compiler "TestUSB" "UNKNOWN" "V1" "G:/ezNiosC6C/TestUSB/db/TestUSB.quartus_db" { Floorplan "G:/ezNiosC6C/TestUSB/" "" "6.142 ns" { USB_D[5]~2 DataReg[5] } "NODE_NAME" } "" } } { "testusb.v" "" { Text "G:/ezNiosC6C/TestUSB/testusb.v" 45 -1 0 } }  } 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "1.778 ns 23.36 % " "Info: Total cell delay = 1.778 ns ( 23.36 % )" {  } {  } 0} { "Info" "ITDB_TOTAL_IC_DELAY" "5.833 ns 76.64 % " "Info: Total interconnect delay = 5.833 ns ( 76.64 % )" {  } {  } 0}  } { { "G:/ezNiosC6C/TestUSB/db/TestUSB_cmp.qrpt" "" { Report "G:/ezNiosC6C/TestUSB/db/TestUSB_cmp.qrpt" Compiler "TestUSB" "UNKNOWN" "V1" "G:/ezNiosC6C/TestUSB/db/TestUSB.quartus_db" { Floorplan "G:/ezNiosC6C/TestUSB/" "" "7.611 ns" { USB_D[5] USB_D[5]~2 DataReg[5] } "NODE_NAME" } "" } } { "c:/altera/quartus42/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus42/bin/Technology_Viewer.qrui" "7.611 ns" { USB_D[5] USB_D[5]~2 DataReg[5] } { 0.000ns 0.000ns 5.833ns } { 0.000ns 1.469ns 0.309ns } } }  } 0} { "Info" "ITDB_FULL_TSU_DELAY" "0.037 ns + " "Info: + Micro setup delay of destination is 0.037 ns" {  } { { "testusb.v" "" { Text "G:/ezNiosC6C/TestUSB/testusb.v" 45 -1 0 } }  } 0} { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "USB_DS_ destination 8.384 ns - Shortest register " "Info: - Shortest clock path from clock \"USB_DS_\" to destination register is 8.384 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(1.469 ns) 1.469 ns USB_DS_ 1 CLK PIN_163 3 " "Info: 1: + IC(0.000 ns) + CELL(1.469 ns) = 1.469 ns; Loc. = PIN_163; Fanout = 3; CLK Node = 'USB_DS_'" {  } { { "G:/ezNiosC6C/TestUSB/db/TestUSB_cmp.qrpt" "" { Report "G:/ezNiosC6C/TestUSB/db/TestUSB_cmp.qrpt" Compiler "TestUSB" "UNKNOWN" "V1" "G:/ezNiosC6C/TestUSB/db/TestUSB.quartus_db" { Floorplan "G:/ezNiosC6C/TestUSB/" "" "" { USB_DS_ } "NODE_NAME" } "" } } { "testusb.v" "" { Text "G:/ezNiosC6C/TestUSB/testusb.v" 8 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(1.587 ns) + CELL(0.292 ns) 3.348 ns clk_usbwrd 2 COMB LC_X32_Y14_N9 8 " "Info: 2: + IC(1.587 ns) + CELL(0.292 ns) = 3.348 ns; Loc. = LC_X32_Y14_N9; Fanout = 8; COMB Node = 'clk_usbwrd'" {  } { { "G:/ezNiosC6C/TestUSB/db/TestUSB_cmp.qrpt" "" { Report "G:/ezNiosC6C/TestUSB/db/TestUSB_cmp.qrpt" Compiler "TestUSB" "UNKNOWN" "V1" "G:/ezNiosC6C/TestUSB/db/TestUSB.quartus_db" { Floorplan "G:/ezNiosC6C/TestUSB/" "" "1.879 ns" { USB_DS_ clk_usbwrd } "NODE_NAME" } "" } } { "testusb.v" "" { Text "G:/ezNiosC6C/TestUSB/testusb.v" 42 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(4.325 ns) + CELL(0.711 ns) 8.384 ns DataReg\[5\] 3 REG LC_X33_Y14_N9 1 " "Info: 3: + IC(4.325 ns) + CELL(0.711 ns) = 8.384 ns; Loc. = LC_X33_Y14_N9; Fanout = 1; REG Node = 'DataReg\[5\]'" {  } { { "G:/ezNiosC6C/TestUSB/db/TestUSB_cmp.qrpt" "" { Report "G:/ezNiosC6C/TestUSB/db/TestUSB_cmp.qrpt" Compiler "TestUSB" "UNKNOWN" "V1" "G:/ezNiosC6C/TestUSB/db/TestUSB.quartus_db" { Floorplan "G:/ezNiosC6C/TestUSB/" "" "5.036 ns" { clk_usbwrd DataReg[5] } "NODE_NAME" } "" } } { "testusb.v" "" { Text "G:/ezNiosC6C/TestUSB/testusb.v" 45 -1 0 } }  } 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "2.472 ns 29.48 % " "Info: Total cell delay = 2.472 ns ( 29.48 % )" {  } {  } 0} { "Info" "ITDB_TOTAL_IC_DELAY" "5.912 ns 70.52 % " "Info: Total interconnect delay = 5.912 ns ( 70.52 % )" {  } {  } 0}  } { { "G:/ezNiosC6C/TestUSB/db/TestUSB_cmp.qrpt" "" { Report "G:/ezNiosC6C/TestUSB/db/TestUSB_cmp.qrpt" Compiler "TestUSB" "UNKNOWN" "V1" "G:/ezNiosC6C/TestUSB/db/TestUSB.quartus_db" { Floorplan "G:/ezNiosC6C/TestUSB/" "" "8.384 ns" { USB_DS_ clk_usbwrd DataReg[5] } "NODE_NAME" } "" } } { "c:/altera/quartus42/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus42/bin/Technology_Viewer.qrui" "8.384 ns" { USB_DS_ USB_DS_~out0 clk_usbwrd DataReg[5] } { 0.000ns 0.000ns 1.587ns 4.325ns } { 0.000ns 1.469ns 0.292ns 0.711ns } } }  } 0}  } { { "G:/ezNiosC6C/TestUSB/db/TestUSB_cmp.qrpt" "" { Report "G:/ezNiosC6C/TestUSB/db/TestUSB_cmp.qrpt" Compiler "TestUSB" "UNKNOWN" "V1" "G:/ezNiosC6C/TestUSB/db/TestUSB.quartus_db" { Floorplan "G:/ezNiosC6C/TestUSB/" "" "7.611 ns" { USB_D[5] USB_D[5]~2 DataReg[5] } "NODE_NAME" } "" } } { "c:/altera/quartus42/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus42/bin/Technology_Viewer.qrui" "7.611 ns" { USB_D[5] USB_D[5]~2 DataReg[5] } { 0.000ns 0.000ns 5.833ns } { 0.000ns 1.469ns 0.309ns } } } { "G:/ezNiosC6C/TestUSB/db/TestUSB_cmp.qrpt" "" { Report "G:/ezNiosC6C/TestUSB/db/TestUSB_cmp.qrpt" Compiler "TestUSB" "UNKNOWN" "V1" "G:/ezNiosC6C/TestUSB/db/TestUSB.quartus_db" { Floorplan "G:/ezNiosC6C/TestUSB/" "" "8.384 ns" { USB_DS_ clk_usbwrd DataReg[5] } "NODE_NAME" } "" } } { "c:/altera/quartus42/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus42/bin/Technology_Viewer.qrui" "8.384 ns" { USB_DS_ USB_DS_~out0 clk_usbwrd DataReg[5] } { 0.000ns 0.000ns 1.587ns 4.325ns } { 0.000ns 1.469ns 0.292ns 0.711ns } } }  } 0}
{ "Info" "ITDB_FULL_TCO_RESULT" "USB_WR_ LED\[0\] DataReg\[0\] 14.646 ns register " "Info: tco from clock \"USB_WR_\" to destination pin \"LED\[0\]\" through register \"DataReg\[0\]\" is 14.646 ns" { { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "USB_WR_ source 8.632 ns + Longest register " "Info: + Longest clock path from clock \"USB_WR_\" to source register is 8.632 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(1.469 ns) 1.469 ns USB_WR_ 1 CLK PIN_176 5 " "Info: 1: + IC(0.000 ns) + CELL(1.469 ns) = 1.469 ns; Loc. = PIN_176; Fanout = 5; CLK Node = 'USB_WR_'" {  } { { "G:/ezNiosC6C/TestUSB/db/TestUSB_cmp.qrpt" "" { Report "G:/ezNiosC6C/TestUSB/db/TestUSB_cmp.qrpt" Compiler "TestUSB" "UNKNOWN" "V1" "G:/ezNiosC6C/TestUSB/db/TestUSB.quartus_db" { Floorplan "G:/ezNiosC6C/TestUSB/" "" "" { USB_WR_ } "NODE_NAME" } "" } } { "testusb.v" "" { Text "G:/ezNiosC6C/TestUSB/testusb.v" 8 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(2.013 ns) + CELL(0.114 ns) 3.596 ns clk_usbwrd 2 COMB LC_X32_Y14_N9 8 " "Info: 2: + IC(2.013 ns) + CELL(0.114 ns) = 3.596 ns; Loc. = LC_X32_Y14_N9; Fanout = 8; COMB Node = 'clk_usbwrd'" {  } { { "G:/ezNiosC6C/TestUSB/db/TestUSB_cmp.qrpt" "" { Report "G:/ezNiosC6C/TestUSB/db/TestUSB_cmp.qrpt" Compiler "TestUSB" "UNKNOWN" "V1" "G:/ezNiosC6C/TestUSB/db/TestUSB.quartus_db" { Floorplan "G:/ezNiosC6C/TestUSB/" "" "2.127 ns" { USB_WR_ clk_usbwrd } "NODE_NAME" } "" } } { "testusb.v" "" { Text "G:/ezNiosC6C/TestUSB/testusb.v" 42 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(4.325 ns) + CELL(0.711 ns) 8.632 ns DataReg\[0\] 3 REG LC_X34_Y20_N1 2 " "Info: 3: + IC(4.325 ns) + CELL(0.711 ns) = 8.632 ns; Loc. = LC_X34_Y20_N1; Fanout = 2; REG Node = 'DataReg\[0\]'" {  } { { "G:/ezNiosC6C/TestUSB/db/TestUSB_cmp.qrpt" "" { Report "G:/ezNiosC6C/TestUSB/db/TestUSB_cmp.qrpt" Compiler "TestUSB" "UNKNOWN" "V1" "G:/ezNiosC6C/TestUSB/db/TestUSB.quartus_db" { Floorplan "G:/ezNiosC6C/TestUSB/" "" "5.036 ns" { clk_usbwrd DataReg[0] } "NODE_NAME" } "" } } { "testusb.v" "" { Text "G:/ezNiosC6C/TestUSB/testusb.v" 45 -1 0 } }  } 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "2.294 ns 26.58 % " "Info: Total cell delay = 2.294 ns ( 26.58 % )" {  } {  } 0} { "Info" "ITDB_TOTAL_IC_DELAY" "6.338 ns 73.42 % " "Info: Total interconnect delay = 6.338 ns ( 73.42 % )" {  } {  } 0}  } { { "G:/ezNiosC6C/TestUSB/db/TestUSB_cmp.qrpt" "" { Report "G:/ezNiosC6C/TestUSB/db/TestUSB_cmp.qrpt" Compiler "TestUSB" "UNKNOWN" "V1" "G:/ezNiosC6C/TestUSB/db/TestUSB.quartus_db" { Floorplan "G:/ezNiosC6C/TestUSB/" "" "8.632 ns" { USB_WR_ clk_usbwrd DataReg[0] } "NODE_NAME" } "" } } { "c:/altera/quartus42/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus42/bin/Technology_Viewer.qrui" "8.632 ns" { USB_WR_ USB_WR_~out0 clk_usbwrd DataReg[0] } { 0.000ns 0.000ns 2.013ns 4.325ns } { 0.000ns 1.469ns 0.114ns 0.711ns } } }  } 0} { "Info" "ITDB_FULL_TCO_DELAY" "0.224 ns + " "Info: + Micro clock to output delay of source is 0.224 ns" {  } { { "testusb.v" "" { Text "G:/ezNiosC6C/TestUSB/testusb.v" 45 -1 0 } }  } 0} { "Info" "ITDB_FULL_DATA_PATH_RESULT" "5.790 ns + Longest register pin " "Info: + Longest register to pin delay is 5.790 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.000 ns) 0.000 ns DataReg\[0\] 1 REG LC_X34_Y20_N1 2 " "Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = LC_X34_Y20_N1; Fanout = 2; REG Node = 'DataReg\[0\]'" {  } { { "G:/ezNiosC6C/TestUSB/db/TestUSB_cmp.qrpt" "" { Report "G:/ezNiosC6C/TestUSB/db/TestUSB_cmp.qrpt" Compiler "TestUSB" "UNKNOWN" "V1" "G:/ezNiosC6C/TestUSB/db/TestUSB.quartus_db" { Floorplan "G:/ezNiosC6C/TestUSB/" "" "" { DataReg[0] } "NODE_NAME" } "" } } { "testusb.v" "" { Text "G:/ezNiosC6C/TestUSB/testusb.v" 45 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(3.682 ns) + CELL(2.108 ns) 5.790 ns LED\[0\] 2 PIN PIN_117 0 " "Info: 2: + IC(3.682 ns) + CELL(2.108 ns) = 5.790 ns; Loc. = PIN_117; Fanout = 0; PIN Node = 'LED\[0\]'" {  } { { "G:/ezNiosC6C/TestUSB/db/TestUSB_cmp.qrpt" "" { Report "G:/ezNiosC6C/TestUSB/db/TestUSB_cmp.qrpt" Compiler "TestUSB" "UNKNOWN" "V1" "G:/ezNiosC6C/TestUSB/db/TestUSB.quartus_db" { Floorplan "G:/ezNiosC6C/TestUSB/" "" "5.790 ns" { DataReg[0] LED[0] } "NODE_NAME" } "" } } { "testusb.v" "" { Text "G:/ezNiosC6C/TestUSB/testusb.v" 15 -1 0 } }  } 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "2.108 ns 36.41 % " "Info: Total cell delay = 2.108 ns ( 36.41 % )" {  } {  } 0} { "Info" "ITDB_TOTAL_IC_DELAY" "3.682 ns 63.59 % " "Info: Total interconnect delay = 3.682 ns ( 63.59 % )" {  } {  } 0}  } { { "G:/ezNiosC6C/TestUSB/db/TestUSB_cmp.qrpt" "" { Report "G:/ezNiosC6C/TestUSB/db/TestUSB_cmp.qrpt" Compiler "TestUSB" "UNKNOWN" "V1" "G:/ezNiosC6C/TestUSB/db/TestUSB.quartus_db" { Floorplan "G:/ezNiosC6C/TestUSB/" "" "5.790 ns" { DataReg[0] LED[0] } "NODE_NAME" } "" } } { "c:/altera/quartus42/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus42/bin/Technology_Viewer.qrui" "5.790 ns" { DataReg[0] LED[0] } { 0.000ns 3.682ns } { 0.000ns 2.108ns } } }  } 0}  } { { "G:/ezNiosC6C/TestUSB/db/TestUSB_cmp.qrpt" "" { Report "G:/ezNiosC6C/TestUSB/db/TestUSB_cmp.qrpt" Compiler "TestUSB" "UNKNOWN" "V1" "G:/ezNiosC6C/TestUSB/db/TestUSB.quartus_db" { Floorplan "G:/ezNiosC6C/TestUSB/" "" "8.632 ns" { USB_WR_ clk_usbwrd DataReg[0] } "NODE_NAME" } "" } } { "c:/altera/quartus42/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus42/bin/Technology_Viewer.qrui" "8.632 ns" { USB_WR_ USB_WR_~out0 clk_usbwrd DataReg[0] } { 0.000ns 0.000ns 2.013ns 4.325ns } { 0.000ns 1.469ns 0.114ns 0.711ns } } } { "G:/ezNiosC6C/TestUSB/db/TestUSB_cmp.qrpt" "" { Report "G:/ezNiosC6C/TestUSB/db/TestUSB_cmp.qrpt" Compiler "TestUSB" "UNKNOWN" "V1" "G:/ezNiosC6C/TestUSB/db/TestUSB.quartus_db" { Floorplan "G:/ezNiosC6C/TestUSB/" "" "5.790 ns" { DataReg[0] LED[0] } "NODE_NAME" } "" } } { "c:/altera/quartus42/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus42/bin/Technology_Viewer.qrui" "5.790 ns" { DataReg[0] LED[0] } { 0.000ns 3.682ns } { 0.000ns 2.108ns } } }  } 0}
{ "Info" "ITDB_FULL_TPD_RESULT" "USB_WR_ USB_D\[0\] 13.686 ns Longest " "Info: Longest tpd from source pin \"USB_WR_\" to destination pin \"USB_D\[0\]\" is 13.686 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(1.469 ns) 1.469 ns USB_WR_ 1 CLK PIN_176 5 " "Info: 1: + IC(0.000 ns) + CELL(1.469 ns) = 1.469 ns; Loc. = PIN_176; Fanout = 5; CLK Node = 'USB_WR_'" {  } { { "G:/ezNiosC6C/TestUSB/db/TestUSB_cmp.qrpt" "" { Report "G:/ezNiosC6C/TestUSB/db/TestUSB_cmp.qrpt" Compiler "TestUSB" "UNKNOWN" "V1" "G:/ezNiosC6C/TestUSB/db/TestUSB.quartus_db" { Floorplan "G:/ezNiosC6C/TestUSB/" "" "" { USB_WR_ } "NODE_NAME" } "" } } { "testusb.v" "" { Text "G:/ezNiosC6C/TestUSB/testusb.v" 8 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(5.849 ns) + CELL(0.114 ns) 7.432 ns put_addrreg 2 COMB LC_X32_Y14_N4 8 " "Info: 2: + IC(5.849 ns) + CELL(0.114 ns) = 7.432 ns; Loc. = LC_X32_Y14_N4; Fanout = 8; COMB Node = 'put_addrreg'" {  } { { "G:/ezNiosC6C/TestUSB/db/TestUSB_cmp.qrpt" "" { Report "G:/ezNiosC6C/TestUSB/db/TestUSB_cmp.qrpt" Compiler "TestUSB" "UNKNOWN" "V1" "G:/ezNiosC6C/TestUSB/db/TestUSB.quartus_db" { Floorplan "G:/ezNiosC6C/TestUSB/" "" "5.963 ns" { USB_WR_ put_addrreg } "NODE_NAME" } "" } } { "testusb.v" "" { Text "G:/ezNiosC6C/TestUSB/testusb.v" 35 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(1.994 ns) + CELL(0.590 ns) 10.016 ns USB_D\[0\]~502 3 COMB LC_X34_Y20_N6 1 " "Info: 3: + IC(1.994 ns) + CELL(0.590 ns) = 10.016 ns; Loc. = LC_X34_Y20_N6; Fanout = 1; COMB Node = 'USB_D\[0\]~502'" {  } { { "G:/ezNiosC6C/TestUSB/db/TestUSB_cmp.qrpt" "" { Report "G:/ezNiosC6C/TestUSB/db/TestUSB_cmp.qrpt" Compiler "TestUSB" "UNKNOWN" "V1" "G:/ezNiosC6C/TestUSB/db/TestUSB.quartus_db" { Floorplan "G:/ezNiosC6C/TestUSB/" "" "2.584 ns" { put_addrreg USB_D[0]~502 } "NODE_NAME" } "" } } { "testusb.v" "" { Text "G:/ezNiosC6C/TestUSB/testusb.v" 10 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(1.562 ns) + CELL(2.108 ns) 13.686 ns USB_D\[0\] 4 PIN PIN_184 0 " "Info: 4: + IC(1.562 ns) + CELL(2.108 ns) = 13.686 ns; Loc. = PIN_184; Fanout = 0; PIN Node = 'USB_D\[0\]'" {  } { { "G:/ezNiosC6C/TestUSB/db/TestUSB_cmp.qrpt" "" { Report "G:/ezNiosC6C/TestUSB/db/TestUSB_cmp.qrpt" Compiler "TestUSB" "UNKNOWN" "V1" "G:/ezNiosC6C/TestUSB/db/TestUSB.quartus_db" { Floorplan "G:/ezNiosC6C/TestUSB/" "" "3.670 ns" { USB_D[0]~502 USB_D[0] } "NODE_NAME" } "" } } { "testusb.v" "" { Text "G:/ezNiosC6C/TestUSB/testusb.v" 10 -1 0 } }  } 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "4.281 ns 31.28 % " "Info: Total cell delay = 4.281 ns ( 31.28 % )" {  } {  } 0} { "Info" "ITDB_TOTAL_IC_DELAY" "9.405 ns 68.72 % " "Info: Total interconnect delay = 9.405 ns ( 68.72 % )" {  } {  } 0}  } { { "G:/ezNiosC6C/TestUSB/db/TestUSB_cmp.qrpt" "" { Report "G:/ezNiosC6C/TestUSB/db/TestUSB_cmp.qrpt" Compiler "TestUSB" "UNKNOWN" "V1" "G:/ezNiosC6C/TestUSB/db/TestUSB.quartus_db" { Floorplan "G:/ezNiosC6C/TestUSB/" "" "13.686 ns" { USB_WR_ put_addrreg USB_D[0]~502 USB_D[0] } "NODE_NAME" } "" } } { "c:/altera/quartus42/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus42/bin/Technology_Viewer.qrui" "13.686 ns" { USB_WR_ USB_WR_~out0 put_addrreg USB_D[0]~502 USB_D[0] } { 0.000ns 0.000ns 5.849ns 1.994ns 1.562ns } { 0.000ns 1.469ns 0.114ns 0.590ns 2.108ns } } }  } 0}
{ "Info" "ITDB_TH_RESULT" "DataReg\[4\] USB_D\[4\] USB_WR_ 2.450 ns register " "Info: th for register \"DataReg\[4\]\" (data pin = \"USB_D\[4\]\", clock pin = \"USB_WR_\") is 2.450 ns" { { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "USB_WR_ destination 8.632 ns + Longest register " "Info: + Longest clock path from clock \"USB_WR_\" to destination register is 8.632 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(1.469 ns) 1.469 ns USB_WR_ 1 CLK PIN_176 5 " "Info: 1: + IC(0.000 ns) + CELL(1.469 ns) = 1.469 ns; Loc. = PIN_176; Fanout = 5; CLK Node = 'USB_WR_'" {  } { { "G:/ezNiosC6C/TestUSB/db/TestUSB_cmp.qrpt" "" { Report "G:/ezNiosC6C/TestUSB/db/TestUSB_cmp.qrpt" Compiler "TestUSB" "UNKNOWN" "V1" "G:/ezNiosC6C/TestUSB/db/TestUSB.quartus_db" { Floorplan "G:/ezNiosC6C/TestUSB/" "" "" { USB_WR_ } "NODE_NAME" } "" } } { "testusb.v" "" { Text "G:/ezNiosC6C/TestUSB/testusb.v" 8 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(2.013 ns) + CELL(0.114 ns) 3.596 ns clk_usbwrd 2 COMB LC_X32_Y14_N9 8 " "Info: 2: + IC(2.013 ns) + CELL(0.114 ns) = 3.596 ns; Loc. = LC_X32_Y14_N9; Fanout = 8; COMB Node = 'clk_usbwrd'" {  } { { "G:/ezNiosC6C/TestUSB/db/TestUSB_cmp.qrpt" "" { Report "G:/ezNiosC6C/TestUSB/db/TestUSB_cmp.qrpt" Compiler "TestUSB" "UNKNOWN" "V1" "G:/ezNiosC6C/TestUSB/db/TestUSB.quartus_db" { Floorplan "G:/ezNiosC6C/TestUSB/" "" "2.127 ns" { USB_WR_ clk_usbwrd } "NODE_NAME" } "" } } { "testusb.v" "" { Text "G:/ezNiosC6C/TestUSB/testusb.v" 42 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(4.325 ns) + CELL(0.711 ns) 8.632 ns DataReg\[4\] 3 REG LC_X34_Y20_N4 1 " "Info: 3: + IC(4.325 ns) + CELL(0.711 ns) = 8.632 ns; Loc. = LC_X34_Y20_N4; Fanout = 1; REG Node = 'DataReg\[4\]'" {  } { { "G:/ezNiosC6C/TestUSB/db/TestUSB_cmp.qrpt" "" { Report "G:/ezNiosC6C/TestUSB/db/TestUSB_cmp.qrpt" Compiler "TestUSB" "UNKNOWN" "V1" "G:/ezNiosC6C/TestUSB/db/TestUSB.quartus_db" { Floorplan "G:/ezNiosC6C/TestUSB/" "" "5.036 ns" { clk_usbwrd DataReg[4] } "NODE_NAME" } "" } } { "testusb.v" "" { Text "G:/ezNiosC6C/TestUSB/testusb.v" 45 -1 0 } }  } 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "2.294 ns 26.58 % " "Info: Total cell delay = 2.294 ns ( 26.58 % )" {  } {  } 0} { "Info" "ITDB_TOTAL_IC_DELAY" "6.338 ns 73.42 % " "Info: Total interconnect delay = 6.338 ns ( 73.42 % )" {  } {  } 0}  } { { "G:/ezNiosC6C/TestUSB/db/TestUSB_cmp.qrpt" "" { Report "G:/ezNiosC6C/TestUSB/db/TestUSB_cmp.qrpt" Compiler "TestUSB" "UNKNOWN" "V1" "G:/ezNiosC6C/TestUSB/db/TestUSB.quartus_db" { Floorplan "G:/ezNiosC6C/TestUSB/" "" "8.632 ns" { USB_WR_ clk_usbwrd DataReg[4] } "NODE_NAME" } "" } } { "c:/altera/quartus42/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus42/bin/Technology_Viewer.qrui" "8.632 ns" { USB_WR_ USB_WR_~out0 clk_usbwrd DataReg[4] } { 0.000ns 0.000ns 2.013ns 4.325ns } { 0.000ns 1.469ns 0.114ns 0.711ns } } }  } 0} { "Info" "ITDB_FULL_TH_DELAY" "0.015 ns + " "Info: + Micro hold delay of destination is 0.015 ns" {  } { { "testusb.v" "" { Text "G:/ezNiosC6C/TestUSB/testusb.v" 45 -1 0 } }  } 0} { "Info" "ITDB_FULL_DATA_PATH_RESULT" "6.197 ns - Shortest pin register " "Info: - Shortest pin to register delay is 6.197 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.000 ns) 0.000 ns USB_D\[4\] 1 PIN PIN_180 1 " "Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = PIN_180; Fanout = 1; PIN Node = 'USB_D\[4\]'" {  } { { "G:/ezNiosC6C/TestUSB/db/TestUSB_cmp.qrpt" "" { Report "G:/ezNiosC6C/TestUSB/db/TestUSB_cmp.qrpt" Compiler "TestUSB" "UNKNOWN" "V1" "G:/ezNiosC6C/TestUSB/db/TestUSB.quartus_db" { Floorplan "G:/ezNiosC6C/TestUSB/" "" "" { USB_D[4] } "NODE_NAME" } "" } } { "testusb.v" "" { Text "G:/ezNiosC6C/TestUSB/testusb.v" 10 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(1.469 ns) 1.469 ns USB_D\[4\]~3 2 COMB IOC_X35_Y20_N0 2 " "Info: 2: + IC(0.000 ns) + CELL(1.469 ns) = 1.469 ns; Loc. = IOC_X35_Y20_N0; Fanout = 2; COMB Node = 'USB_D\[4\]~3'" {  } { { "G:/ezNiosC6C/TestUSB/db/TestUSB_cmp.qrpt" "" { Report "G:/ezNiosC6C/TestUSB/db/TestUSB_cmp.qrpt" Compiler "TestUSB" "UNKNOWN" "V1" "G:/ezNiosC6C/TestUSB/db/TestUSB.quartus_db" { Floorplan "G:/ezNiosC6C/TestUSB/" "" "1.469 ns" { USB_D[4] USB_D[4]~3 } "NODE_NAME" } "" } } { "testusb.v" "" { Text "G:/ezNiosC6C/TestUSB/testusb.v" 10 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(4.613 ns) + CELL(0.115 ns) 6.197 ns DataReg\[4\] 3 REG LC_X34_Y20_N4 1 " "Info: 3: + IC(4.613 ns) + CELL(0.115 ns) = 6.197 ns; Loc. = LC_X34_Y20_N4; Fanout = 1; REG Node = 'DataReg\[4\]'" {  } { { "G:/ezNiosC6C/TestUSB/db/TestUSB_cmp.qrpt" "" { Report "G:/ezNiosC6C/TestUSB/db/TestUSB_cmp.qrpt" Compiler "TestUSB" "UNKNOWN" "V1" "G:/ezNiosC6C/TestUSB/db/TestUSB.quartus_db" { Floorplan "G:/ezNiosC6C/TestUSB/" "" "4.728 ns" { USB_D[4]~3 DataReg[4] } "NODE_NAME" } "" } } { "testusb.v" "" { Text "G:/ezNiosC6C/TestUSB/testusb.v" 45 -1 0 } }  } 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "1.584 ns 25.56 % " "Info: Total cell delay = 1.584 ns ( 25.56 % )" {  } {  } 0} { "Info" "ITDB_TOTAL_IC_DELAY" "4.613 ns 74.44 % " "Info: Total interconnect delay = 4.613 ns ( 74.44 % )" {  } {  } 0}  } { { "G:/ezNiosC6C/TestUSB/db/TestUSB_cmp.qrpt" "" { Report "G:/ezNiosC6C/TestUSB/db/TestUSB_cmp.qrpt" Compiler "TestUSB" "UNKNOWN" "V1" "G:/ezNiosC6C/TestUSB/db/TestUSB.quartus_db" { Floorplan "G:/ezNiosC6C/TestUSB/" "" "6.197 ns" { USB_D[4] USB_D[4]~3 DataReg[4] } "NODE_NAME" } "" } } { "c:/altera/quartus42/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus42/bin/Technology_Viewer.qrui" "6.197 ns" { USB_D[4] USB_D[4]~3 DataReg[4] } { 0.000ns 0.000ns 4.613ns } { 0.000ns 1.469ns 0.115ns } } }  } 0}  } { { "G:/ezNiosC6C/TestUSB/db/TestUSB_cmp.qrpt" "" { Report "G:/ezNiosC6C/TestUSB/db/TestUSB_cmp.qrpt" Compiler "TestUSB" "UNKNOWN" "V1" "G:/ezNiosC6C/TestUSB/db/TestUSB.quartus_db" { Floorplan "G:/ezNiosC6C/TestUSB/" "" "8.632 ns" { USB_WR_ clk_usbwrd DataReg[4] } "NODE_NAME" } "" } } { "c:/altera/quartus42/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus42/bin/Technology_Viewer.qrui" "8.632 ns" { USB_WR_ USB_WR_~out0 clk_usbwrd DataReg[4] } { 0.000ns 0.000ns 2.013ns 4.325ns } { 0.000ns 1.469ns 0.114ns 0.711ns } } } { "G:/ezNiosC6C/TestUSB/db/TestUSB_cmp.qrpt" "" { Report "G:/ezNiosC6C/TestUSB/db/TestUSB_cmp.qrpt" Compiler "TestUSB" "UNKNOWN" "V1" "G:/ezNiosC6C/TestUSB/db/TestUSB.quartus_db" { Floorplan "G:/ezNiosC6C/TestUSB/" "" "6.197 ns" { USB_D[4] USB_D[4]~3 DataReg[4] } "NODE_NAME" } "" } } { "c:/altera/quartus42/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus42/bin/Technology_Viewer.qrui" "6.197 ns" { USB_D[4] USB_D[4]~3 DataReg[4] } { 0.000ns 0.000ns 4.613ns } { 0.000ns 1.469ns 0.115ns } } }  } 0}
{ "Info" "IQEXE_ERROR_COUNT" "Timing Analyzer 0 s 2 s " "Info: Quartus II Timing Analyzer was successful. 0 errors, 2 warnings" { { "Info" "IQEXE_END_BANNER_TIME" "Wed Oct 24 19:40:18 2007 " "Info: Processing ended: Wed Oct 24 19:40:18 2007" {  } {  } 0} { "Info" "IQEXE_ELAPSED_TIME" "00:00:01 " "Info: Elapsed time: 00:00:01" {  } {  } 0}  } {  } 0}