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📄 testusb.fit.qmsg

📁 fpga之ep1 c6的usb实验源码,经实验验证好好用,大家可以试试看哦
💻 QMSG
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{ "Info" "IFITAPI_FITAPI_VPR_FITTER_ROUTING_END" "0 " "Info: Fitter routing operations ending: elapsed time = 0 seconds" {  } {  } 0}
{ "Info" "IFITAPI_FITAPI_VPR_AUTO_FIT_ENABLED_AND_USED" "" "Info: Fitter performed an Auto Fit compilation. Optimizations were skipped to reduce compilation time." {  } {  } 0}
{ "Info" "IFYGR_FYGR_OPINFO_COMPLETED_OP" "Fixed Delay Chain Operation " "Info: Completed Fixed Delay Chain Operation" {  } {  } 0}
{ "Info" "IDAT_DAT_STARTED" "" "Info: Started post-fitting delay annotation" {  } {  } 0}
{ "Info" "IDAT_DAT_COMPLETED" "" "Info: Delay annotation completed successfully" {  } {  } 0}
{ "Info" "IFYGR_FYGR_OPINFO_COMPLETED_OP" "Auto Delay Chain Operation " "Info: Completed Auto Delay Chain Operation" {  } {  } 0}
{ "Warning" "WFSAC_FSAC_BIDIR_OR_OUTPUT_WITH_TRIVIAL_DATAIN" "3 " "Warning: Following 3 pins have nothing, GND, or VCC driving datain port -- changes to this connectivity may change fitting results" { { "Info" "IFSAC_FSAC_BIDIR_OR_OUTPUT_WITH_TRIVIAL_DATAIN_SUB" "USB_INT_ VCC " "Info: Pin USB_INT_ has VCC driving its datain port" {  } { { "testusb.v" "" { Text "G:/ezNiosC6C/TestUSB/testusb.v" 7 -1 0 } } { "c:/altera/quartus42/bin/Assignment Editor.qase" "" { Assignment "c:/altera/quartus42/bin/Assignment Editor.qase" 1 { { 0 "USB_INT_" } } } } { "G:/ezNiosC6C/TestUSB/db/TestUSB_cmp.qrpt" "" { Report "G:/ezNiosC6C/TestUSB/db/TestUSB_cmp.qrpt" Compiler "TestUSB" "UNKNOWN" "V1" "G:/ezNiosC6C/TestUSB/db/TestUSB.quartus_db" { Floorplan "G:/ezNiosC6C/TestUSB/" "" "" { USB_INT_ } "NODE_NAME" } "" } } { "G:/ezNiosC6C/TestUSB/TestUSB.fld" "" { Floorplan "G:/ezNiosC6C/TestUSB/TestUSB.fld" "" "" { USB_INT_ } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_BIDIR_OR_OUTPUT_WITH_TRIVIAL_DATAIN_SUB" "SDRAM_CS_ VCC " "Info: Pin SDRAM_CS_ has VCC driving its datain port" {  } { { "testusb.v" "" { Text "G:/ezNiosC6C/TestUSB/testusb.v" 12 -1 0 } } { "c:/altera/quartus42/bin/Assignment Editor.qase" "" { Assignment "c:/altera/quartus42/bin/Assignment Editor.qase" 1 { { 0 "SDRAM_CS_" } } } } { "G:/ezNiosC6C/TestUSB/db/TestUSB_cmp.qrpt" "" { Report "G:/ezNiosC6C/TestUSB/db/TestUSB_cmp.qrpt" Compiler "TestUSB" "UNKNOWN" "V1" "G:/ezNiosC6C/TestUSB/db/TestUSB.quartus_db" { Floorplan "G:/ezNiosC6C/TestUSB/" "" "" { SDRAM_CS_ } "NODE_NAME" } "" } } { "G:/ezNiosC6C/TestUSB/TestUSB.fld" "" { Floorplan "G:/ezNiosC6C/TestUSB/TestUSB.fld" "" "" { SDRAM_CS_ } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_BIDIR_OR_OUTPUT_WITH_TRIVIAL_DATAIN_SUB" "FLASH_CE_ VCC " "Info: Pin FLASH_CE_ has VCC driving its datain port" {  } { { "testusb.v" "" { Text "G:/ezNiosC6C/TestUSB/testusb.v" 13 -1 0 } } { "c:/altera/quartus42/bin/Assignment Editor.qase" "" { Assignment "c:/altera/quartus42/bin/Assignment Editor.qase" 1 { { 0 "FLASH_CE_" } } } } { "G:/ezNiosC6C/TestUSB/db/TestUSB_cmp.qrpt" "" { Report "G:/ezNiosC6C/TestUSB/db/TestUSB_cmp.qrpt" Compiler "TestUSB" "UNKNOWN" "V1" "G:/ezNiosC6C/TestUSB/db/TestUSB.quartus_db" { Floorplan "G:/ezNiosC6C/TestUSB/" "" "" { FLASH_CE_ } "NODE_NAME" } "" } } { "G:/ezNiosC6C/TestUSB/TestUSB.fld" "" { Floorplan "G:/ezNiosC6C/TestUSB/TestUSB.fld" "" "" { FLASH_CE_ } "NODE_NAME" } }  } 0}  } {  } 0}
{ "Info" "IFSAC_FSAC_ALL_OUTPUT_ENABLE_GROUPS" "" "Info: Following groups of pins have the same output enable" { { "Info" "IFSAC_FSAC_SAME_OUTPUT_ENABLE_GROUP" "USB_D\[7\]~495 " "Info: Following pins have the same output enable: USB_D\[7\]~495" { { "Info" "IFSAC_FSAC_SAME_OUTPUT_ENABLE_GROUP_SUB" "bidirectional USB_D\[7\] LVTTL " "Info: Type bidirectional pin USB_D\[7\] uses the LVTTL I/O standard" {  } { { "testusb.v" "" { Text "G:/ezNiosC6C/TestUSB/testusb.v" 10 -1 0 } } { "c:/altera/quartus42/bin/Assignment Editor.qase" "" { Assignment "c:/altera/quartus42/bin/Assignment Editor.qase" 1 { { 0 "USB_D\[7\]" } } } } { "G:/ezNiosC6C/TestUSB/db/TestUSB_cmp.qrpt" "" { Report "G:/ezNiosC6C/TestUSB/db/TestUSB_cmp.qrpt" Compiler "TestUSB" "UNKNOWN" "V1" "G:/ezNiosC6C/TestUSB/db/TestUSB.quartus_db" { Floorplan "G:/ezNiosC6C/TestUSB/" "" "" { USB_D[7] } "NODE_NAME" } "" } } { "G:/ezNiosC6C/TestUSB/TestUSB.fld" "" { Floorplan "G:/ezNiosC6C/TestUSB/TestUSB.fld" "" "" { USB_D[7] } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_SAME_OUTPUT_ENABLE_GROUP_SUB" "bidirectional USB_D\[6\] LVTTL " "Info: Type bidirectional pin USB_D\[6\] uses the LVTTL I/O standard" {  } { { "testusb.v" "" { Text "G:/ezNiosC6C/TestUSB/testusb.v" 10 -1 0 } } { "c:/altera/quartus42/bin/Assignment Editor.qase" "" { Assignment "c:/altera/quartus42/bin/Assignment Editor.qase" 1 { { 0 "USB_D\[6\]" } } } } { "G:/ezNiosC6C/TestUSB/db/TestUSB_cmp.qrpt" "" { Report "G:/ezNiosC6C/TestUSB/db/TestUSB_cmp.qrpt" Compiler "TestUSB" "UNKNOWN" "V1" "G:/ezNiosC6C/TestUSB/db/TestUSB.quartus_db" { Floorplan "G:/ezNiosC6C/TestUSB/" "" "" { USB_D[6] } "NODE_NAME" } "" } } { "G:/ezNiosC6C/TestUSB/TestUSB.fld" "" { Floorplan "G:/ezNiosC6C/TestUSB/TestUSB.fld" "" "" { USB_D[6] } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_SAME_OUTPUT_ENABLE_GROUP_SUB" "bidirectional USB_D\[5\] LVTTL " "Info: Type bidirectional pin USB_D\[5\] uses the LVTTL I/O standard" {  } { { "testusb.v" "" { Text "G:/ezNiosC6C/TestUSB/testusb.v" 10 -1 0 } } { "c:/altera/quartus42/bin/Assignment Editor.qase" "" { Assignment "c:/altera/quartus42/bin/Assignment Editor.qase" 1 { { 0 "USB_D\[5\]" } } } } { "G:/ezNiosC6C/TestUSB/db/TestUSB_cmp.qrpt" "" { Report "G:/ezNiosC6C/TestUSB/db/TestUSB_cmp.qrpt" Compiler "TestUSB" "UNKNOWN" "V1" "G:/ezNiosC6C/TestUSB/db/TestUSB.quartus_db" { Floorplan "G:/ezNiosC6C/TestUSB/" "" "" { USB_D[5] } "NODE_NAME" } "" } } { "G:/ezNiosC6C/TestUSB/TestUSB.fld" "" { Floorplan "G:/ezNiosC6C/TestUSB/TestUSB.fld" "" "" { USB_D[5] } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_SAME_OUTPUT_ENABLE_GROUP_SUB" "bidirectional USB_D\[4\] LVTTL " "Info: Type bidirectional pin USB_D\[4\] uses the LVTTL I/O standard" {  } { { "testusb.v" "" { Text "G:/ezNiosC6C/TestUSB/testusb.v" 10 -1 0 } } { "c:/altera/quartus42/bin/Assignment Editor.qase" "" { Assignment "c:/altera/quartus42/bin/Assignment Editor.qase" 1 { { 0 "USB_D\[4\]" } } } } { "G:/ezNiosC6C/TestUSB/db/TestUSB_cmp.qrpt" "" { Report "G:/ezNiosC6C/TestUSB/db/TestUSB_cmp.qrpt" Compiler "TestUSB" "UNKNOWN" "V1" "G:/ezNiosC6C/TestUSB/db/TestUSB.quartus_db" { Floorplan "G:/ezNiosC6C/TestUSB/" "" "" { USB_D[4] } "NODE_NAME" } "" } } { "G:/ezNiosC6C/TestUSB/TestUSB.fld" "" { Floorplan "G:/ezNiosC6C/TestUSB/TestUSB.fld" "" "" { USB_D[4] } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_SAME_OUTPUT_ENABLE_GROUP_SUB" "bidirectional USB_D\[3\] LVTTL " "Info: Type bidirectional pin USB_D\[3\] uses the LVTTL I/O standard" {  } { { "testusb.v" "" { Text "G:/ezNiosC6C/TestUSB/testusb.v" 10 -1 0 } } { "c:/altera/quartus42/bin/Assignment Editor.qase" "" { Assignment "c:/altera/quartus42/bin/Assignment Editor.qase" 1 { { 0 "USB_D\[3\]" } } } } { "G:/ezNiosC6C/TestUSB/db/TestUSB_cmp.qrpt" "" { Report "G:/ezNiosC6C/TestUSB/db/TestUSB_cmp.qrpt" Compiler "TestUSB" "UNKNOWN" "V1" "G:/ezNiosC6C/TestUSB/db/TestUSB.quartus_db" { Floorplan "G:/ezNiosC6C/TestUSB/" "" "" { USB_D[3] } "NODE_NAME" } "" } } { "G:/ezNiosC6C/TestUSB/TestUSB.fld" "" { Floorplan "G:/ezNiosC6C/TestUSB/TestUSB.fld" "" "" { USB_D[3] } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_SAME_OUTPUT_ENABLE_GROUP_SUB" "bidirectional USB_D\[2\] LVTTL " "Info: Type bidirectional pin USB_D\[2\] uses the LVTTL I/O standard" {  } { { "testusb.v" "" { Text "G:/ezNiosC6C/TestUSB/testusb.v" 10 -1 0 } } { "c:/altera/quartus42/bin/Assignment Editor.qase" "" { Assignment "c:/altera/quartus42/bin/Assignment Editor.qase" 1 { { 0 "USB_D\[2\]" } } } } { "G:/ezNiosC6C/TestUSB/db/TestUSB_cmp.qrpt" "" { Report "G:/ezNiosC6C/TestUSB/db/TestUSB_cmp.qrpt" Compiler "TestUSB" "UNKNOWN" "V1" "G:/ezNiosC6C/TestUSB/db/TestUSB.quartus_db" { Floorplan "G:/ezNiosC6C/TestUSB/" "" "" { USB_D[2] } "NODE_NAME" } "" } } { "G:/ezNiosC6C/TestUSB/TestUSB.fld" "" { Floorplan "G:/ezNiosC6C/TestUSB/TestUSB.fld" "" "" { USB_D[2] } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_SAME_OUTPUT_ENABLE_GROUP_SUB" "bidirectional USB_D\[1\] LVTTL " "Info: Type bidirectional pin USB_D\[1\] uses the LVTTL I/O standard" {  } { { "testusb.v" "" { Text "G:/ezNiosC6C/TestUSB/testusb.v" 10 -1 0 } } { "c:/altera/quartus42/bin/Assignment Editor.qase" "" { Assignment "c:/altera/quartus42/bin/Assignment Editor.qase" 1 { { 0 "USB_D\[1\]" } } } } { "G:/ezNiosC6C/TestUSB/db/TestUSB_cmp.qrpt" "" { Report "G:/ezNiosC6C/TestUSB/db/TestUSB_cmp.qrpt" Compiler "TestUSB" "UNKNOWN" "V1" "G:/ezNiosC6C/TestUSB/db/TestUSB.quartus_db" { Floorplan "G:/ezNiosC6C/TestUSB/" "" "" { USB_D[1] } "NODE_NAME" } "" } } { "G:/ezNiosC6C/TestUSB/TestUSB.fld" "" { Floorplan "G:/ezNiosC6C/TestUSB/TestUSB.fld" "" "" { USB_D[1] } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_SAME_OUTPUT_ENABLE_GROUP_SUB" "bidirectional USB_D\[0\] LVTTL " "Info: Type bidirectional pin USB_D\[0\] uses the LVTTL I/O standard" {  } { { "testusb.v" "" { Text "G:/ezNiosC6C/TestUSB/testusb.v" 10 -1 0 } } { "c:/altera/quartus42/bin/Assignment Editor.qase" "" { Assignment "c:/altera/quartus42/bin/Assignment Editor.qase" 1 { { 0 "USB_D\[0\]" } } } } { "G:/ezNiosC6C/TestUSB/db/TestUSB_cmp.qrpt" "" { Report "G:/ezNiosC6C/TestUSB/db/TestUSB_cmp.qrpt" Compiler "TestUSB" "UNKNOWN" "V1" "G:/ezNiosC6C/TestUSB/db/TestUSB.quartus_db" { Floorplan "G:/ezNiosC6C/TestUSB/" "" "" { USB_D[0] } "NODE_NAME" } "" } } { "G:/ezNiosC6C/TestUSB/TestUSB.fld" "" { Floorplan "G:/ezNiosC6C/TestUSB/TestUSB.fld" "" "" { USB_D[0] } "NODE_NAME" } }  } 0}  } {  } 0}  } {  } 0}
{ "Info" "IQEXE_ERROR_COUNT" "Fitter 0 s 146 s " "Info: Quartus II Fitter was successful. 0 errors, 146 warnings" { { "Info" "IQEXE_END_BANNER_TIME" "Wed Oct 24 19:40:12 2007 " "Info: Processing ended: Wed Oct 24 19:40:12 2007" {  } {  } 0} { "Info" "IQEXE_ELAPSED_TIME" "00:00:12 " "Info: Elapsed time: 00:00:12" {  } {  } 0}  } {  } 0}

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