testusb.map.eqn

fpga之ep1 c6的usb实验源码,经实验验证好好用,大家可以试试看哦

--DataReg[3] is DataReg[3]
--operation mode is normal

DataReg[3]_lut_out = A1L04;
DataReg[3] = DFFEAS(DataReg[3]_lut_out, clk_usbwrd, RESET_, , , , , , );


--DataReg[2] is DataReg[2]
--operation mode is normal

DataReg[2]_lut_out = A1L73;
DataReg[2] = DFFEAS(DataReg[2]_lut_out, clk_usbwrd, RESET_, , , , , , );


--DataReg[1] is DataReg[1]
--operation mode is normal

DataReg[1]_lut_out = A1L43;
DataReg[1] = DFFEAS(DataReg[1]_lut_out, clk_usbwrd, RESET_, , , , , , );


--DataReg[0] is DataReg[0]
--operation mode is normal

DataReg[0]_lut_out = A1L13;
DataReg[0] = DFFEAS(DataReg[0]_lut_out, clk_usbwrd, RESET_, , , , , , );


--clk_usbwrd is clk_usbwrd
--operation mode is normal

clk_usbwrd = USB_WR_ # USB_DS_;


--DataReg[7] is DataReg[7]
--operation mode is normal

DataReg[7]_lut_out = A1L25;
DataReg[7] = DFFEAS(DataReg[7]_lut_out, clk_usbwrd, RESET_, , , , , , );


--AddrReg[7] is AddrReg[7]
--operation mode is normal

AddrReg[7]_lut_out = A1L25;
AddrReg[7] = DFFEAS(AddrReg[7]_lut_out, clk_usbwra, RESET_, , , , , , );


--put_addrreg is put_addrreg
--operation mode is normal

put_addrreg = USB_WR_ & !USB_AS_;


--put_dreg is put_dreg
--operation mode is normal

put_dreg = USB_WR_ & !USB_DS_;


--A1L35 is USB_D[7]~494
--operation mode is normal

A1L35 = DataReg[7] & AddrReg[7] # !put_addrreg # !DataReg[7] & !put_dreg & AddrReg[7] # !put_addrreg;


--A1L45 is USB_D[7]~495
--operation mode is normal

A1L45 = USB_WR_ & !USB_AS_ # !USB_DS_;


--AddrReg[6] is AddrReg[6]
--operation mode is normal

AddrReg[6]_lut_out = A1L94;
AddrReg[6] = DFFEAS(AddrReg[6]_lut_out, clk_usbwra, RESET_, , , , , , );


--DataReg[6] is DataReg[6]
--operation mode is normal

DataReg[6]_lut_out = A1L94;
DataReg[6] = DFFEAS(DataReg[6]_lut_out, clk_usbwrd, RESET_, , , , , , );


--A1L05 is USB_D[6]~496
--operation mode is normal

A1L05 = AddrReg[6] & DataReg[6] # !put_dreg # !AddrReg[6] & !put_addrreg & DataReg[6] # !put_dreg;


--AddrReg[5] is AddrReg[5]
--operation mode is normal

AddrReg[5]_lut_out = A1L64;
AddrReg[5] = DFFEAS(AddrReg[5]_lut_out, clk_usbwra, RESET_, , , , , , );


--DataReg[5] is DataReg[5]
--operation mode is normal

DataReg[5]_lut_out = A1L64;
DataReg[5] = DFFEAS(DataReg[5]_lut_out, clk_usbwrd, RESET_, , , , , , );


--A1L74 is USB_D[5]~497
--operation mode is normal

A1L74 = AddrReg[5] & DataReg[5] # !put_dreg # !AddrReg[5] & !put_addrreg & DataReg[5] # !put_dreg;


--AddrReg[4] is AddrReg[4]
--operation mode is normal

AddrReg[4]_lut_out = A1L34;
AddrReg[4] = DFFEAS(AddrReg[4]_lut_out, clk_usbwra, RESET_, , , , , , );


--DataReg[4] is DataReg[4]
--operation mode is normal

DataReg[4]_lut_out = A1L34;
DataReg[4] = DFFEAS(DataReg[4]_lut_out, clk_usbwrd, RESET_, , , , , , );


--A1L44 is USB_D[4]~498
--operation mode is normal

A1L44 = AddrReg[4] & DataReg[4] # !put_dreg # !AddrReg[4] & !put_addrreg & DataReg[4] # !put_dreg;


--AddrReg[3] is AddrReg[3]
--operation mode is normal

AddrReg[3]_lut_out = A1L04;
AddrReg[3] = DFFEAS(AddrReg[3]_lut_out, clk_usbwra, RESET_, , , , , , );


--A1L14 is USB_D[3]~499
--operation mode is normal

A1L14 = DataReg[3] & AddrReg[3] # !put_addrreg # !DataReg[3] & !put_dreg & AddrReg[3] # !put_addrreg;


--AddrReg[2] is AddrReg[2]
--operation mode is normal

AddrReg[2]_lut_out = A1L73;
AddrReg[2] = DFFEAS(AddrReg[2]_lut_out, clk_usbwra, RESET_, , , , , , );


--A1L83 is USB_D[2]~500
--operation mode is normal

A1L83 = DataReg[2] & AddrReg[2] # !put_addrreg # !DataReg[2] & !put_dreg & AddrReg[2] # !put_addrreg;


--AddrReg[1] is AddrReg[1]
--operation mode is normal

AddrReg[1]_lut_out = A1L43;
AddrReg[1] = DFFEAS(AddrReg[1]_lut_out, clk_usbwra, RESET_, , , , , , );


--A1L53 is USB_D[1]~501
--operation mode is normal

A1L53 = DataReg[1] & AddrReg[1] # !put_addrreg # !DataReg[1] & !put_dreg & AddrReg[1] # !put_addrreg;


--AddrReg[0] is AddrReg[0]
--operation mode is normal

AddrReg[0]_lut_out = A1L13;
AddrReg[0] = DFFEAS(AddrReg[0]_lut_out, clk_usbwra, RESET_, , , , , , );


--A1L23 is USB_D[0]~502
--operation mode is normal

A1L23 = DataReg[0] & AddrReg[0] # !put_addrreg # !DataReg[0] & !put_dreg & AddrReg[0] # !put_addrreg;


--clk_usbwra is clk_usbwra
--operation mode is normal

clk_usbwra = USB_WR_ # USB_AS_;


--USB_WR_ is USB_WR_
--operation mode is input

USB_WR_ = INPUT();


--USB_DS_ is USB_DS_
--operation mode is input

USB_DS_ = INPUT();


--RESET_ is RESET_
--operation mode is input

RESET_ = INPUT();


--USB_AS_ is USB_AS_
--operation mode is input

USB_AS_ = INPUT();


--USB_INT_ is USB_INT_
--operation mode is output

USB_INT_ = OUTPUT(VCC);


--SDRAM_CS_ is SDRAM_CS_
--operation mode is output

SDRAM_CS_ = OUTPUT(VCC);


--FLASH_CE_ is FLASH_CE_
--operation mode is output

FLASH_CE_ = OUTPUT(VCC);


--LED[3] is LED[3]
--operation mode is output

LED[3] = OUTPUT(!DataReg[3]);


--LED[2] is LED[2]
--operation mode is output

LED[2] = OUTPUT(!DataReg[2]);


--LED[1] is LED[1]
--operation mode is output

LED[1] = OUTPUT(!DataReg[1]);


--LED[0] is LED[0]
--operation mode is output

LED[0] = OUTPUT(!DataReg[0]);


--A1L25 is USB_D[7]~0
--operation mode is bidir

A1L25 = USB_D[7];

--USB_D[7] is USB_D[7]
--operation mode is bidir

USB_D[7]_tri_out = TRI(A1L35, A1L45);
USB_D[7] = BIDIR(USB_D[7]_tri_out);


--A1L94 is USB_D[6]~1
--operation mode is bidir

A1L94 = USB_D[6];

--USB_D[6] is USB_D[6]
--operation mode is bidir

USB_D[6]_tri_out = TRI(A1L05, A1L45);
USB_D[6] = BIDIR(USB_D[6]_tri_out);


--A1L64 is USB_D[5]~2
--operation mode is bidir

A1L64 = USB_D[5];

--USB_D[5] is USB_D[5]
--operation mode is bidir

USB_D[5]_tri_out = TRI(A1L74, A1L45);
USB_D[5] = BIDIR(USB_D[5]_tri_out);


--A1L34 is USB_D[4]~3
--operation mode is bidir

A1L34 = USB_D[4];

--USB_D[4] is USB_D[4]
--operation mode is bidir

USB_D[4]_tri_out = TRI(A1L44, A1L45);
USB_D[4] = BIDIR(USB_D[4]_tri_out);


--A1L04 is USB_D[3]~4
--operation mode is bidir

A1L04 = USB_D[3];

--USB_D[3] is USB_D[3]
--operation mode is bidir

USB_D[3]_tri_out = TRI(A1L14, A1L45);
USB_D[3] = BIDIR(USB_D[3]_tri_out);


--A1L73 is USB_D[2]~5
--operation mode is bidir

A1L73 = USB_D[2];

--USB_D[2] is USB_D[2]
--operation mode is bidir

USB_D[2]_tri_out = TRI(A1L83, A1L45);
USB_D[2] = BIDIR(USB_D[2]_tri_out);


--A1L43 is USB_D[1]~6
--operation mode is bidir

A1L43 = USB_D[1];

--USB_D[1] is USB_D[1]
--operation mode is bidir

USB_D[1]_tri_out = TRI(A1L53, A1L45);
USB_D[1] = BIDIR(USB_D[1]_tri_out);


--A1L13 is USB_D[0]~7
--operation mode is bidir

A1L13 = USB_D[0];

--USB_D[0] is USB_D[0]
--operation mode is bidir

USB_D[0]_tri_out = TRI(A1L23, A1L45);
USB_D[0] = BIDIR(USB_D[0]_tri_out);