testusb.fit.eqn

fpga之ep1 c6的usb实验源码,经实验验证好好用,大家可以试试看哦

--DataReg[3] is DataReg[3] at LC_X34_Y20_N8
--operation mode is normal

DataReg[3]_lut_out = GND;
DataReg[3] = DFFEAS(DataReg[3]_lut_out, GLOBAL(clk_usbwrd), GLOBAL(RESET_), , , A1L04, , , VCC);


--DataReg[2] is DataReg[2] at LC_X34_Y20_N5
--operation mode is normal

DataReg[2]_lut_out = GND;
DataReg[2] = DFFEAS(DataReg[2]_lut_out, GLOBAL(clk_usbwrd), GLOBAL(RESET_), , , A1L73, , , VCC);


--DataReg[1] is DataReg[1] at LC_X34_Y20_N0
--operation mode is normal

DataReg[1]_lut_out = GND;
DataReg[1] = DFFEAS(DataReg[1]_lut_out, GLOBAL(clk_usbwrd), GLOBAL(RESET_), , , A1L43, , , VCC);


--DataReg[0] is DataReg[0] at LC_X34_Y20_N1
--operation mode is normal

DataReg[0]_lut_out = GND;
DataReg[0] = DFFEAS(DataReg[0]_lut_out, GLOBAL(clk_usbwrd), GLOBAL(RESET_), , , A1L13, , , VCC);


--clk_usbwrd is clk_usbwrd at LC_X32_Y14_N9
--operation mode is normal

clk_usbwrd = USB_DS_ # USB_WR_;


--AddrReg[7] is AddrReg[7] at LC_X32_Y14_N7
--operation mode is normal

AddrReg[7]_lut_out = GND;
AddrReg[7] = DFFEAS(AddrReg[7]_lut_out, GLOBAL(clk_usbwra), GLOBAL(RESET_), , , A1L25, , , VCC);


--put_addrreg is put_addrreg at LC_X32_Y14_N4
--operation mode is normal

put_addrreg = !USB_AS_ & USB_WR_;


--put_dreg is put_dreg at LC_X32_Y14_N5
--operation mode is normal

put_dreg = !USB_DS_ & USB_WR_;


--A1L35 is USB_D[7]~494 at LC_X32_Y14_N2
--operation mode is normal

DataReg[7]_qfbk = DataReg[7];
A1L35 = AddrReg[7] & DataReg[7]_qfbk # !put_dreg # !AddrReg[7] & !put_addrreg & DataReg[7]_qfbk # !put_dreg;

--DataReg[7] is DataReg[7] at LC_X32_Y14_N2
--operation mode is normal

DataReg[7] = DFFEAS(A1L35, GLOBAL(clk_usbwrd), GLOBAL(RESET_), , , A1L25, , , VCC);


--A1L45 is USB_D[7]~495 at LC_X32_Y14_N8
--operation mode is normal

A1L45 = USB_WR_ & !USB_DS_ # !USB_AS_;


--DataReg[6] is DataReg[6] at LC_X32_Y14_N3
--operation mode is normal

DataReg[6]_lut_out = GND;
DataReg[6] = DFFEAS(DataReg[6]_lut_out, GLOBAL(clk_usbwrd), GLOBAL(RESET_), , , A1L94, , , VCC);


--A1L05 is USB_D[6]~496 at LC_X32_Y14_N0
--operation mode is normal

AddrReg[6]_qfbk = AddrReg[6];
A1L05 = put_dreg & DataReg[6] & AddrReg[6]_qfbk # !put_addrreg # !put_dreg & AddrReg[6]_qfbk # !put_addrreg;

--AddrReg[6] is AddrReg[6] at LC_X32_Y14_N0
--operation mode is normal

AddrReg[6] = DFFEAS(A1L05, GLOBAL(clk_usbwra), GLOBAL(RESET_), , , A1L94, , , VCC);


--DataReg[5] is DataReg[5] at LC_X33_Y14_N9
--operation mode is normal

DataReg[5]_lut_out = A1L64;
DataReg[5] = DFFEAS(DataReg[5]_lut_out, GLOBAL(clk_usbwrd), GLOBAL(RESET_), , , , , , );


--A1L74 is USB_D[5]~497 at LC_X32_Y14_N1
--operation mode is normal

AddrReg[5]_qfbk = AddrReg[5];
A1L74 = put_dreg & DataReg[5] & AddrReg[5]_qfbk # !put_addrreg # !put_dreg & AddrReg[5]_qfbk # !put_addrreg;

--AddrReg[5] is AddrReg[5] at LC_X32_Y14_N1
--operation mode is normal

AddrReg[5] = DFFEAS(A1L74, GLOBAL(clk_usbwra), GLOBAL(RESET_), , , A1L64, , , VCC);


--DataReg[4] is DataReg[4] at LC_X34_Y20_N4
--operation mode is normal

DataReg[4]_lut_out = GND;
DataReg[4] = DFFEAS(DataReg[4]_lut_out, GLOBAL(clk_usbwrd), GLOBAL(RESET_), , , A1L34, , , VCC);


--A1L44 is USB_D[4]~498 at LC_X34_Y20_N7
--operation mode is normal

AddrReg[4]_qfbk = AddrReg[4];
A1L44 = put_addrreg & AddrReg[4]_qfbk & DataReg[4] # !put_dreg # !put_addrreg & DataReg[4] # !put_dreg;

--AddrReg[4] is AddrReg[4] at LC_X34_Y20_N7
--operation mode is normal

AddrReg[4] = DFFEAS(A1L44, GLOBAL(clk_usbwra), GLOBAL(RESET_), , , A1L34, , , VCC);


--A1L14 is USB_D[3]~499 at LC_X34_Y20_N3
--operation mode is normal

AddrReg[3]_qfbk = AddrReg[3];
A1L14 = put_addrreg & AddrReg[3]_qfbk & DataReg[3] # !put_dreg # !put_addrreg & DataReg[3] # !put_dreg;

--AddrReg[3] is AddrReg[3] at LC_X34_Y20_N3
--operation mode is normal

AddrReg[3] = DFFEAS(A1L14, GLOBAL(clk_usbwra), GLOBAL(RESET_), , , A1L04, , , VCC);


--A1L83 is USB_D[2]~500 at LC_X34_Y20_N9
--operation mode is normal

AddrReg[2]_qfbk = AddrReg[2];
A1L83 = put_addrreg & AddrReg[2]_qfbk & DataReg[2] # !put_dreg # !put_addrreg & DataReg[2] # !put_dreg;

--AddrReg[2] is AddrReg[2] at LC_X34_Y20_N9
--operation mode is normal

AddrReg[2] = DFFEAS(A1L83, GLOBAL(clk_usbwra), GLOBAL(RESET_), , , A1L73, , , VCC);


--A1L53 is USB_D[1]~501 at LC_X34_Y20_N2
--operation mode is normal

AddrReg[1]_qfbk = AddrReg[1];
A1L53 = put_addrreg & AddrReg[1]_qfbk & DataReg[1] # !put_dreg # !put_addrreg & DataReg[1] # !put_dreg;

--AddrReg[1] is AddrReg[1] at LC_X34_Y20_N2
--operation mode is normal

AddrReg[1] = DFFEAS(A1L53, GLOBAL(clk_usbwra), GLOBAL(RESET_), , , A1L43, , , VCC);


--A1L23 is USB_D[0]~502 at LC_X34_Y20_N6
--operation mode is normal

AddrReg[0]_qfbk = AddrReg[0];
A1L23 = put_addrreg & AddrReg[0]_qfbk & DataReg[0] # !put_dreg # !put_addrreg & DataReg[0] # !put_dreg;

--AddrReg[0] is AddrReg[0] at LC_X34_Y20_N6
--operation mode is normal

AddrReg[0] = DFFEAS(A1L23, GLOBAL(clk_usbwra), GLOBAL(RESET_), , , A1L13, , , VCC);


--clk_usbwra is clk_usbwra at LC_X32_Y14_N6
--operation mode is normal

clk_usbwra = USB_AS_ # USB_WR_;


--USB_WR_ is USB_WR_ at PIN_176
--operation mode is input

USB_WR_ = INPUT();


--USB_DS_ is USB_DS_ at PIN_163
--operation mode is input

USB_DS_ = INPUT();


--RESET_ is RESET_ at PIN_188
--operation mode is input

RESET_ = INPUT();


--USB_AS_ is USB_AS_ at PIN_162
--operation mode is input

USB_AS_ = INPUT();


--USB_INT_ is USB_INT_ at PIN_165
--operation mode is output

USB_INT_ = OUTPUT(VCC);


--SDRAM_CS_ is SDRAM_CS_ at PIN_82
--operation mode is output

SDRAM_CS_ = OUTPUT(VCC);


--FLASH_CE_ is FLASH_CE_ at PIN_197
--operation mode is output

FLASH_CE_ = OUTPUT(VCC);


--LED[3] is LED[3] at PIN_120
--operation mode is output

LED[3] = OUTPUT(!DataReg[3]);


--LED[2] is LED[2] at PIN_119
--operation mode is output

LED[2] = OUTPUT(!DataReg[2]);


--LED[1] is LED[1] at PIN_118
--operation mode is output

LED[1] = OUTPUT(!DataReg[1]);


--LED[0] is LED[0] at PIN_117
--operation mode is output

LED[0] = OUTPUT(!DataReg[0]);


--A1L25 is USB_D[7]~0 at PIN_177
--operation mode is bidir

A1L25 = USB_D[7];

--USB_D[7] is USB_D[7] at PIN_177
--operation mode is bidir

USB_D[7]_tri_out = TRI(A1L35, A1L45);
USB_D[7] = BIDIR(USB_D[7]_tri_out);


--A1L94 is USB_D[6]~1 at PIN_178
--operation mode is bidir

A1L94 = USB_D[6];

--USB_D[6] is USB_D[6] at PIN_178
--operation mode is bidir

USB_D[6]_tri_out = TRI(A1L05, A1L45);
USB_D[6] = BIDIR(USB_D[6]_tri_out);


--A1L64 is USB_D[5]~2 at PIN_179
--operation mode is bidir

A1L64 = USB_D[5];

--USB_D[5] is USB_D[5] at PIN_179
--operation mode is bidir

USB_D[5]_tri_out = TRI(A1L74, A1L45);
USB_D[5] = BIDIR(USB_D[5]_tri_out);


--A1L34 is USB_D[4]~3 at PIN_180
--operation mode is bidir

A1L34 = USB_D[4];

--USB_D[4] is USB_D[4] at PIN_180
--operation mode is bidir

USB_D[4]_tri_out = TRI(A1L44, A1L45);
USB_D[4] = BIDIR(USB_D[4]_tri_out);


--A1L04 is USB_D[3]~4 at PIN_181
--operation mode is bidir

A1L04 = USB_D[3];

--USB_D[3] is USB_D[3] at PIN_181
--operation mode is bidir

USB_D[3]_tri_out = TRI(A1L14, A1L45);
USB_D[3] = BIDIR(USB_D[3]_tri_out);


--A1L73 is USB_D[2]~5 at PIN_182
--operation mode is bidir

A1L73 = USB_D[2];

--USB_D[2] is USB_D[2] at PIN_182
--operation mode is bidir

USB_D[2]_tri_out = TRI(A1L83, A1L45);
USB_D[2] = BIDIR(USB_D[2]_tri_out);


--A1L43 is USB_D[1]~6 at PIN_183
--operation mode is bidir

A1L43 = USB_D[1];

--USB_D[1] is USB_D[1] at PIN_183
--operation mode is bidir

USB_D[1]_tri_out = TRI(A1L53, A1L45);
USB_D[1] = BIDIR(USB_D[1]_tri_out);


--A1L13 is USB_D[0]~7 at PIN_184
--operation mode is bidir

A1L13 = USB_D[0];

--USB_D[0] is USB_D[0] at PIN_184
--operation mode is bidir

USB_D[0]_tri_out = TRI(A1L23, A1L45);
USB_D[0] = BIDIR(USB_D[0]_tri_out);