testusb.fit.summary

fpga之ep1 c6的usb实验源码,经实验验证好好用,大家可以试试看哦

Flow Status : Successful - Wed Oct 24 19:40:12 2007
Quartus II Version : 4.2 Build 157 12/07/2004 SJ Full Version
Revision Name : TestUSB
Top-level Entity Name : TestUSB
Family : Cyclone
Device : EP1C6Q240C8
Timing Models : Final
Met timing requirements : N/A
Total logic elements : 21 / 5,980 ( < 1 % )
Total pins : 19 / 185 ( 10 % )
Total virtual pins : 0
Total memory bits : 0 / 92,160 ( 0 % )
Total PLLs : 0 / 2 ( 0 % )