mc68hc908jb16.inc

bdm源代码. coldfire处理器用

mCONFIG_LVI5OR3:    equ    %01000000
mCONFIG_LVIDR:      equ    %10000000


;*** UE0D0 - USB Endpoint 0 Data Register 0; 0x00000020 ***
UE0D0:              equ    $00000020                                ;*** UE0D0 - USB Endpoint 0 Data Register 0; 0x00000020 ***
; bit numbers for user in BCLR, BSET, BRCLR and BRSET
UE0D0_UE0R00_UE0T00: equ    0                                        ; Endpoint 0 Receive Data Buffer 0 Bit 0, Endpoint 0 Transmit Data Buffer 0 Bit 0
UE0D0_UE0R01_UE0T01: equ    1                                        ; Endpoint 0 Receive Data Buffer 0 Bit 1, Endpoint 0 Transmit Data Buffer 0 Bit 1
UE0D0_UE0R02_UE0T02: equ    2                                        ; Endpoint 0 Receive Data Buffer 0 Bit 2, Endpoint 0 Transmit Data Buffer 0 Bit 2
UE0D0_UE0R03_UE0T03: equ    3                                        ; Endpoint 0 Receive Data Buffer 0 Bit 3, Endpoint 0 Transmit Data Buffer 0 Bit 3
UE0D0_UE0R04_UE0T04: equ    4                                        ; Endpoint 0 Receive Data Buffer 0 Bit 4, Endpoint 0 Transmit Data Buffer 0 Bit 4
UE0D0_UE0R05_UE0T05: equ    5                                        ; Endpoint 0 Receive Data Buffer 0 Bit 5, Endpoint 0 Transmit Data Buffer 0 Bit 5
UE0D0_UE0R06_UE0T06: equ    6                                        ; Endpoint 0 Receive Data Buffer 0 Bit 6, Endpoint 0 Transmit Data Buffer 0 Bit 6
UE0D0_UE0R07_UE0T07: equ    7                                        ; Endpoint 0 Receive Data Buffer 0 Bit 7, Endpoint 0 Transmit Data Buffer 0 Bit 7
; bit position masks
mUE0D0_UE0R00_UE0T00: equ    %00000001
mUE0D0_UE0R01_UE0T01: equ    %00000010
mUE0D0_UE0R02_UE0T02: equ    %00000100
mUE0D0_UE0R03_UE0T03: equ    %00001000
mUE0D0_UE0R04_UE0T04: equ    %00010000
mUE0D0_UE0R05_UE0T05: equ    %00100000
mUE0D0_UE0R06_UE0T06: equ    %01000000
mUE0D0_UE0R07_UE0T07: equ    %10000000


;*** UE0D1 - USB Endpoint 0 Data Register 1; 0x00000021 ***
UE0D1:              equ    $00000021                                ;*** UE0D1 - USB Endpoint 0 Data Register 1; 0x00000021 ***
; bit numbers for user in BCLR, BSET, BRCLR and BRSET
UE0D1_UE0R10_UE0T10: equ    0                                        ; Endpoint 0 Receive Data Buffer 1 Bit 0, Endpoint 0 Transmit Data Buffer 1 Bit 0
UE0D1_UE0R11_UE0T11: equ    1                                        ; Endpoint 0 Receive Data Buffer 1 Bit 1, Endpoint 0 Transmit Data Buffer 1 Bit 1
UE0D1_UE0R12_UE0T12: equ    2                                        ; Endpoint 0 Receive Data Buffer 1 Bit 2, Endpoint 0 Transmit Data Buffer 1 Bit 2
UE0D1_UE0R13_UE0T13: equ    3                                        ; Endpoint 0 Receive Data Buffer 1 Bit 3, Endpoint 0 Transmit Data Buffer 1 Bit 3
UE0D1_UE0R14_UE0T14: equ    4                                        ; Endpoint 0 Receive Data Buffer 1 Bit 4, Endpoint 0 Transmit Data Buffer 1 Bit 4
UE0D1_UE0R15_UE0T15: equ    5                                        ; Endpoint 0 Receive Data Buffer 1 Bit 5, Endpoint 0 Transmit Data Buffer 1 Bit 5
UE0D1_UE0R16_UE0T16: equ    6                                        ; Endpoint 0 Receive Data Buffer 1 Bit 6, Endpoint 0 Transmit Data Buffer 1 Bit 6
UE0D1_UE0R17_UE0T17: equ    7                                        ; Endpoint 0 Receive Data Buffer 1 Bit 7, Endpoint 0 Transmit Data Buffer 1 Bit 7
; bit position masks
mUE0D1_UE0R10_UE0T10: equ    %00000001
mUE0D1_UE0R11_UE0T11: equ    %00000010
mUE0D1_UE0R12_UE0T12: equ    %00000100
mUE0D1_UE0R13_UE0T13: equ    %00001000
mUE0D1_UE0R14_UE0T14: equ    %00010000
mUE0D1_UE0R15_UE0T15: equ    %00100000
mUE0D1_UE0R16_UE0T16: equ    %01000000
mUE0D1_UE0R17_UE0T17: equ    %10000000


;*** UE0D2 - USB Endpoint 0 Data Register 2; 0x00000022 ***
UE0D2:              equ    $00000022                                ;*** UE0D2 - USB Endpoint 0 Data Register 2; 0x00000022 ***
; bit numbers for user in BCLR, BSET, BRCLR and BRSET
UE0D2_UE0R20_UE0T20: equ    0                                        ; Endpoint 0 Receive Data Buffer 2 Bit 0, Endpoint 0 Transmit Data Buffer 2 Bit 0
UE0D2_UE0R21_UE0T21: equ    1                                        ; Endpoint 0 Receive Data Buffer 2 Bit 1, Endpoint 0 Transmit Data Buffer 2 Bit 1
UE0D2_UE0R22_UE0T22: equ    2                                        ; Endpoint 0 Receive Data Buffer 2 Bit 2, Endpoint 0 Transmit Data Buffer 2 Bit 2
UE0D2_UE0R23_UE0T23: equ    3                                        ; Endpoint 0 Receive Data Buffer 2 Bit 3, Endpoint 0 Transmit Data Buffer 2 Bit 3
UE0D2_UE0R24_UE0T24: equ    4                                        ; Endpoint 0 Receive Data Buffer 2 Bit 4, Endpoint 0 Transmit Data Buffer 2 Bit 4
UE0D2_UE0R25_UE0T25: equ    5                                        ; Endpoint 0 Receive Data Buffer 2 Bit 5, Endpoint 0 Transmit Data Buffer 2 Bit 5
UE0D2_UE0R26_UE0T26: equ    6                                        ; Endpoint 0 Receive Data Buffer 2 Bit 6, Endpoint 0 Transmit Data Buffer 2 Bit 6
UE0D2_UE0R27_UE0T27: equ    7                                        ; Endpoint 0 Receive Data Buffer 2 Bit 7, Endpoint 0 Transmit Data Buffer 2 Bit 7
; bit position masks
mUE0D2_UE0R20_UE0T20: equ    %00000001
mUE0D2_UE0R21_UE0T21: equ    %00000010
mUE0D2_UE0R22_UE0T22: equ    %00000100
mUE0D2_UE0R23_UE0T23: equ    %00001000
mUE0D2_UE0R24_UE0T24: equ    %00010000
mUE0D2_UE0R25_UE0T25: equ    %00100000
mUE0D2_UE0R26_UE0T26: equ    %01000000
mUE0D2_UE0R27_UE0T27: equ    %10000000


;*** UE0D3 - USB Endpoint 0 Data Register 3; 0x00000023 ***
UE0D3:              equ    $00000023                                ;*** UE0D3 - USB Endpoint 0 Data Register 3; 0x00000023 ***
; bit numbers for user in BCLR, BSET, BRCLR and BRSET
UE0D3_UE0R30_UE0T30: equ    0                                        ; Endpoint 0 Receive Data Buffer 3 Bit 0, Endpoint 0 Transmit Data Buffer 3 Bit 0
UE0D3_UE0R31_UE0T31: equ    1                                        ; Endpoint 0 Receive Data Buffer 3 Bit 1, Endpoint 0 Transmit Data Buffer 3 Bit 1
UE0D3_UE0R32_UE0T32: equ    2                                        ; Endpoint 0 Receive Data Buffer 3 Bit 2, Endpoint 0 Transmit Data Buffer 3 Bit 2
UE0D3_UE0R33_UE0T33: equ    3                                        ; Endpoint 0 Receive Data Buffer 3 Bit 3, Endpoint 0 Transmit Data Buffer 3 Bit 3
UE0D3_UE0R34_UE0T34: equ    4                                        ; Endpoint 0 Receive Data Buffer 3 Bit 4, Endpoint 0 Transmit Data Buffer 3 Bit 4
UE0D3_UE0R35_UE0T35: equ    5                                        ; Endpoint 0 Receive Data Buffer 3 Bit 5, Endpoint 0 Transmit Data Buffer 3 Bit 5
UE0D3_UE0R36_UE0T36: equ    6                                        ; Endpoint 0 Receive Data Buffer 3 Bit 6, Endpoint 0 Transmit Data Buffer 3 Bit 6
UE0D3_UE0R37_UE0T37: equ    7                                        ; Endpoint 0 Receive Data Buffer 3 Bit 7, Endpoint 0 Transmit Data Buffer 3 Bit 7
; bit position masks
mUE0D3_UE0R30_UE0T30: equ    %00000001
mUE0D3_UE0R31_UE0T31: equ    %00000010
mUE0D3_UE0R32_UE0T32: equ    %00000100
mUE0D3_UE0R33_UE0T33: equ    %00001000
mUE0D3_UE0R34_UE0T34: equ    %00010000
mUE0D3_UE0R35_UE0T35: equ    %00100000
mUE0D3_UE0R36_UE0T36: equ    %01000000
mUE0D3_UE0R37_UE0T37: equ    %10000000


;*** UE0D4 - USB Endpoint 0 Data Register 4; 0x00000024 ***
UE0D4:              equ    $00000024                                ;*** UE0D4 - USB Endpoint 0 Data Register 4; 0x00000024 ***
; bit numbers for user in BCLR, BSET, BRCLR and BRSET
UE0D4_UE0R40_UE0T40: equ    0                                        ; Endpoint 0 Receive Data Buffer 4 Bit 0, Endpoint 0 Transmit Data Buffer 4 Bit 0
UE0D4_UE0R41_UE0T41: equ    1                                        ; Endpoint 0 Receive Data Buffer 4 Bit 1, Endpoint 0 Transmit Data Buffer 4 Bit 1
UE0D4_UE0R42_UE0T42: equ    2                                        ; Endpoint 0 Receive Data Buffer 4 Bit 2, Endpoint 0 Transmit Data Buffer 4 Bit 2
UE0D4_UE0R43_UE0T43: equ    3                                        ; Endpoint 0 Receive Data Buffer 4 Bit 3, Endpoint 0 Transmit Data Buffer 4 Bit 3
UE0D4_UE0R44_UE0T44: equ    4                                        ; Endpoint 0 Receive Data Buffer 4 Bit 4, Endpoint 0 Transmit Data Buffer 4 Bit 4
UE0D4_UE0R45_UE0T45: equ    5                                        ; Endpoint 0 Receive Data Buffer 4 Bit 5, Endpoint 0 Transmit Data Buffer 4 Bit 5
UE0D4_UE0R46_UE0T46: equ    6                                        ; Endpoint 0 Receive Data Buffer 4 Bit 6, Endpoint 0 Transmit Data Buffer 4 Bit 6
UE0D4_UE0R47_UE0T47: equ    7                                        ; Endpoint 0 Receive Data Buffer 4 Bit 7, Endpoint 0 Transmit Data Buffer 4 Bit 7
; bit position masks
mUE0D4_UE0R40_UE0T40: equ    %00000001
mUE0D4_UE0R41_UE0T41: equ    %00000010
mUE0D4_UE0R42_UE0T42: equ    %00000100
mUE0D4_UE0R43_UE0T43: equ    %00001000
mUE0D4_UE0R44_UE0T44: equ    %00010000
mUE0D4_UE0R45_UE0T45: equ    %00100000
mUE0D4_UE0R46_UE0T46: equ    %01000000
mUE0D4_UE0R47_UE0T47: equ    %10000000


;*** UE0D5 - USB Endpoint 0 Data Register 5; 0x00000025 ***
UE0D5:              equ    $00000025                                ;*** UE0D5 - USB Endpoint 0 Data Register 5; 0x00000025 ***
; bit numbers for user in BCLR, BSET, BRCLR and BRSET
UE0D5_UE0R50_UE0T50: equ    0                                        ; Endpoint 0 Receive Data Buffer 5 Bit 0, Endpoint 0 Transmit Data Buffer 5 Bit 0
UE0D5_UE0R51_UE0T51: equ    1                                        ; Endpoint 0 Receive Data Buffer 5 Bit 1, Endpoint 0 Transmit Data Buffer 5 Bit 1
UE0D5_UE0R52_UE0T52: equ    2                                        ; Endpoint 0 Receive Data Buffer 5 Bit 2, Endpoint 0 Transmit Data Buffer 5 Bit 2
UE0D5_UE0R53_UE0T53: equ    3                                        ; Endpoint 0 Receive Data Buffer 5 Bit 3, Endpoint 0 Transmit Data Buffer 5 Bit 3
UE0D5_UE0R54_UE0T54: equ    4                                        ; Endpoint 0 Receive Data Buffer 5 Bit 4, Endpoint 0 Transmit Data Buffer 5 Bit 4
UE0D5_UE0R55_UE0T55: equ    5                                        ; Endpoint 0 Receive Data Buffer 5 Bit 5, Endpoint 0 Transmit Data Buffer 5 Bit 5
UE0D5_UE0R56_UE0T56: equ    6                                        ; Endpoint 0 Receive Data Buffer 5 Bit 6, Endpoint 0 Transmit Data Buffer 5 Bit 6
UE0D5_UE0R57_UE0T57: equ    7                                        ; Endpoint 0 Receive Data Buffer 5 Bit 7, Endpoint 0 Transmit Data Buffer 5 Bit 7
; bit position masks
mUE0D5_UE0R50_UE0T50: equ    %00000001
mUE0D5_UE0R51_UE0T51: equ    %00000010
mUE0D5_UE0R52_UE0T52: equ    %00000100
mUE0D5_UE0R53_UE0T53: equ    %00001000
mUE0D5_UE0R54_UE0T54: equ    %00010000
mUE0D5_UE0R55_UE0T55: equ    %00100000
mUE0D5_UE0R56_UE0T56: equ    %01000000
mUE0D5_UE0R57_UE0T57: equ    %10000000


;*** UE0D6 - USB Endpoint 0 Data Register 6; 0x00000026 ***
UE0D6:              equ    $00000026                                ;*** UE0D6 - USB Endpoint 0 Data Register 6; 0x00000026 ***
; bit numbers for user in BCLR, BSET, BRCLR and BRSET
UE0D6_UE0R60_UE0T60: equ    0                                        ; Endpoint 0 Receive Data Buffer 6 Bit 0, Endpoint 0 Transmit Data Buffer 6 Bit 0
UE0D6_UE0R61_UE0T61: equ    1                                        ; Endpoint 0 Receive Data Buffer 6 Bit 1, Endpoint 0 Transmit Data Buffer 6 Bit 1
UE0D6_UE0R62_UE0T62: equ    2                                        ; Endpoint 0 Receive Data Buffer 6 Bit 2, Endpoint 0 Transmit Data Buffer 6 Bit 2
UE0D6_UE0R63_UE0T63: equ    3                                        ; Endpoint 0 Receive Data Buffer 6 Bit 3, Endpoint 0 Transmit Data Buffer 6 Bit 3
UE0D6_UE0R64_UE0T64: equ    4                                        ; Endpoint 0 Receive Data Buffer 6 Bit 4, Endpoint 0 Transmit Data Buffer 6 Bit 4
UE0D6_UE0R65_UE0T65: equ    5                                        ; Endpoint 0 Receive Data Buffer 6 Bit 5, Endpoint 0 Transmit Data Buffer 6 Bit 5
UE0D6_UE0R66_UE0T66: equ    6                                        ; Endpoint 0 Receive Data Buffer 6 Bit 6, Endpoint 0 Transmit Data Buffer 6 Bit 6
UE0D6_UE0R67_UE0T67: equ    7                                        ; Endpoint 0 Receive Data Buffer 6 Bit 7, Endpoint 0 Transmit Data Buffer 6 Bit 7
; bit position masks
mUE0D6_UE0R60_UE0T60: equ    %00000001
mUE0D6_UE0R61_UE0T61: equ    %00000010
mUE0D6_UE0R62_UE0T62: equ    %00000100
mUE0D6_UE0R63_UE0T63: equ    %00001000
mUE0D6_UE0R64_UE0T64: equ    %00010000
mUE0D6_UE0R65_UE0T65: equ    %00100000
mUE0D6_UE0R66_UE0T66: equ    %01000000
mUE0D6_UE0R67_UE0T67: equ    %10000000


;*** UE0D7 - USB Endpoint 0 Data Register 7; 0x00000027 ***
UE0D7:              equ    $00000027                                ;*** UE0D7 - USB Endpoint 0 Data Register 7; 0x00000027 ***
; bit numbers for user in BCLR, BSET, BRCLR and BRSET
UE0D7_UE0R70_UE0T70: equ    0                                        ; Endpoint 0 Receive Data Buffer 7 Bit 0, Endpoint 0 Transmit Data Buffer 7 Bit 0
UE0D7_UE0R71_UE0T71: equ    1                                        ; Endpoint 0 Receive Data Buffer 7 Bit 1, Endpoint 0 Transmit Data Buffer 7 Bit 1
UE0D7_UE0R72_UE0T72: equ    2                                        ; Endpoint 0 Receive Data Buffer 7 Bit 2, Endpoint 0 Transmit Data Buffer 7 Bit 2
UE0D7_UE0R73_UE0T73: equ    3                                        ; Endpoint 0 Receive Data Buffer 7 Bit 3, Endpoint 0 Transmit Data Buffer 7 Bit 3
UE0D7_UE0R74_UE0T74: equ    4                                        ; Endpoint 0 Receive Data Buffer 7 Bit 4, Endpoint 0 Transmit Data Buffer 7 Bit 4
UE0D7_UE0R75_UE0T75: equ    5                                        ; Endpoint 0 Receive Data Buffer 7 Bit 5, Endpoint 0 Transmit Data Buffer 7 Bit 5
UE0D7_UE0R76_UE0T76: equ    6                                        ; Endpoint 0 Receive Data Buffer 7 Bit 6, Endpoint 0 Transmit Data Buffer 7 Bit 6
UE0D7_UE0R77_UE0T77: equ    7                                        ; Endpoint 0 Receive Data Buffer 7 Bit 7, Endpoint 0 Transmit Data Buffer 7 Bit 7
; bit position masks
mUE0D7_UE0R70_UE0T70: equ    %00000001
mUE0D7_UE0R71_UE0T71: equ    %00000010
mUE0D7_UE0R72_UE0T72: equ    %00000100
mUE0D7_UE0R73_UE0T73: equ    %00001000
mUE0D7_UE0R74_UE0T74: equ    %00010000
mUE0D7_UE0R75_UE0T75: equ    %00100000
mUE0D7_UE0R76_UE0T76: equ    %01000000
mUE0D7_UE0R77_UE0T77: equ    %10000000


;*** UE1D0 - USB Endpoint 1 Data Register 0; 0x00000028 ***
UE1D0:              equ    $00000028                                ;*** UE1D0 - USB Endpoint 1 Data Register 0; 0x00000028 ***
; bit numbers for user in BCLR, BSET, BRCLR and BRSET
UE1D0_UE1T00:       equ    0                                         ; Endpoint 1 Transmit Data Buffer 0 Bit 0
UE1D0_UE1T01:       equ    1                                         ; Endpoint 1 Transmit Data Buffer 0 Bit 1
UE1D0_UE1T02:       equ    2                                         ; Endpoint 1 Transmit Data Buffer 0 Bit 2
UE1D0_UE1T03:       equ    3                                         ; Endpoint 1 Transmit Data Buffer 0 Bit 3
UE1D0_UE1T04:       equ    4                                         ; Endpoint 1 Transmit Data Buffer 0 Bit 4
UE1D0_UE1T05:       equ    5                                         ; Endpoint 1 Transmit Data Buffer 0 Bit 5
UE1D0_UE1T06:       equ    6                                         ; Endpoint 1 Transmit Data Buffer 0 Bit 6
UE1D0_UE1T07:       equ    7                                         ; Endpoint 1 Transmit Data Buffer 0 Bit 7
; bit position masks
mUE1D0_UE1T00:      equ    %00000001
mUE1D0_UE1T01:      equ    %00000010
mUE1D0_UE1T02:      equ    %00000100
mUE1D0_UE1T03:      equ    %00001000
mUE1D0_UE1T04:      equ    %00010000
mUE1D0_UE1T05:      equ    %00100000
mUE1D0_UE1T06:      equ    %01000000
mUE1D0_UE1T07:      equ    %10000000


;*** UE1D1 - USB Endpoint 1 Data Register 1; 0x00000029 ***