mc68hc908jb16.inc
来自「bdm源代码. coldfire处理器用」· INC 代码 · 共 1,012 行 · 第 1/5 页
INC
1,012 行
UE1D1: equ $00000029 ;*** UE1D1 - USB Endpoint 1 Data Register 1; 0x00000029 ***
; bit numbers for user in BCLR, BSET, BRCLR and BRSET
UE1D1_UE1T10: equ 0 ; Endpoint 1 Transmit Data Buffer 1 Bit 0
UE1D1_UE1T11: equ 1 ; Endpoint 1 Transmit Data Buffer 1 Bit 1
UE1D1_UE1T12: equ 2 ; Endpoint 1 Transmit Data Buffer 1 Bit 2
UE1D1_UE1T13: equ 3 ; Endpoint 1 Transmit Data Buffer 1 Bit 3
UE1D1_UE1T14: equ 4 ; Endpoint 1 Transmit Data Buffer 1 Bit 4
UE1D1_UE1T15: equ 5 ; Endpoint 1 Transmit Data Buffer 1 Bit 5
UE1D1_UE1T16: equ 6 ; Endpoint 1 Transmit Data Buffer 1 Bit 6
UE1D1_UE1T17: equ 7 ; Endpoint 1 Transmit Data Buffer 1 Bit 7
; bit position masks
mUE1D1_UE1T10: equ %00000001
mUE1D1_UE1T11: equ %00000010
mUE1D1_UE1T12: equ %00000100
mUE1D1_UE1T13: equ %00001000
mUE1D1_UE1T14: equ %00010000
mUE1D1_UE1T15: equ %00100000
mUE1D1_UE1T16: equ %01000000
mUE1D1_UE1T17: equ %10000000
;*** UE1D2 - USB Endpoint 1 Data Register 2; 0x0000002A ***
UE1D2: equ $0000002A ;*** UE1D2 - USB Endpoint 1 Data Register 2; 0x0000002A ***
; bit numbers for user in BCLR, BSET, BRCLR and BRSET
UE1D2_UE1T20: equ 0 ; Endpoint 1 Transmit Data Buffer 2 Bit 0
UE1D2_UE1T21: equ 1 ; Endpoint 1 Transmit Data Buffer 2 Bit 1
UE1D2_UE1T22: equ 2 ; Endpoint 1 Transmit Data Buffer 2 Bit 2
UE1D2_UE1T23: equ 3 ; Endpoint 1 Transmit Data Buffer 2 Bit 3
UE1D2_UE1T24: equ 4 ; Endpoint 1 Transmit Data Buffer 2 Bit 4
UE1D2_UE1T25: equ 5 ; Endpoint 1 Transmit Data Buffer 2 Bit 5
UE1D2_UE1T26: equ 6 ; Endpoint 1 Transmit Data Buffer 2 Bit 6
UE1D2_UE1T27: equ 7 ; Endpoint 1 Transmit Data Buffer 2 Bit 7
; bit position masks
mUE1D2_UE1T20: equ %00000001
mUE1D2_UE1T21: equ %00000010
mUE1D2_UE1T22: equ %00000100
mUE1D2_UE1T23: equ %00001000
mUE1D2_UE1T24: equ %00010000
mUE1D2_UE1T25: equ %00100000
mUE1D2_UE1T26: equ %01000000
mUE1D2_UE1T27: equ %10000000
;*** UE1D3 - USB Endpoint 1 Data Register 3; 0x0000002B ***
UE1D3: equ $0000002B ;*** UE1D3 - USB Endpoint 1 Data Register 3; 0x0000002B ***
; bit numbers for user in BCLR, BSET, BRCLR and BRSET
UE1D3_UE1T30: equ 0 ; Endpoint 1 Transmit Data Buffer 3 Bit 0
UE1D3_UE1T31: equ 1 ; Endpoint 1 Transmit Data Buffer 3 Bit 1
UE1D3_UE1T32: equ 2 ; Endpoint 1 Transmit Data Buffer 3 Bit 2
UE1D3_UE1T33: equ 3 ; Endpoint 1 Transmit Data Buffer 3 Bit 3
UE1D3_UE1T34: equ 4 ; Endpoint 1 Transmit Data Buffer 3 Bit 4
UE1D3_UE1T35: equ 5 ; Endpoint 1 Transmit Data Buffer 3 Bit 5
UE1D3_UE1T36: equ 6 ; Endpoint 1 Transmit Data Buffer 3 Bit 6
UE1D3_UE1T37: equ 7 ; Endpoint 1 Transmit Data Buffer 3 Bit 7
; bit position masks
mUE1D3_UE1T30: equ %00000001
mUE1D3_UE1T31: equ %00000010
mUE1D3_UE1T32: equ %00000100
mUE1D3_UE1T33: equ %00001000
mUE1D3_UE1T34: equ %00010000
mUE1D3_UE1T35: equ %00100000
mUE1D3_UE1T36: equ %01000000
mUE1D3_UE1T37: equ %10000000
;*** UE1D4 - USB Endpoint 1 Data Register 4; 0x0000002C ***
UE1D4: equ $0000002C ;*** UE1D4 - USB Endpoint 1 Data Register 4; 0x0000002C ***
; bit numbers for user in BCLR, BSET, BRCLR and BRSET
UE1D4_UE1T40: equ 0 ; Endpoint 1 Transmit Data Buffer 4 Bit 0
UE1D4_UE1T41: equ 1 ; Endpoint 1 Transmit Data Buffer 4 Bit 1
UE1D4_UE1T42: equ 2 ; Endpoint 1 Transmit Data Buffer 4 Bit 2
UE1D4_UE1T43: equ 3 ; Endpoint 1 Transmit Data Buffer 4 Bit 3
UE1D4_UE1T44: equ 4 ; Endpoint 1 Transmit Data Buffer 4 Bit 4
UE1D4_UE1T45: equ 5 ; Endpoint 1 Transmit Data Buffer 4 Bit 5
UE1D4_UE1T46: equ 6 ; Endpoint 1 Transmit Data Buffer 4 Bit 6
UE1D4_UE1T47: equ 7 ; Endpoint 1 Transmit Data Buffer 4 Bit 7
; bit position masks
mUE1D4_UE1T40: equ %00000001
mUE1D4_UE1T41: equ %00000010
mUE1D4_UE1T42: equ %00000100
mUE1D4_UE1T43: equ %00001000
mUE1D4_UE1T44: equ %00010000
mUE1D4_UE1T45: equ %00100000
mUE1D4_UE1T46: equ %01000000
mUE1D4_UE1T47: equ %10000000
;*** UE1D5 - USB Endpoint 1 Data Register 5; 0x0000002D ***
UE1D5: equ $0000002D ;*** UE1D5 - USB Endpoint 1 Data Register 5; 0x0000002D ***
; bit numbers for user in BCLR, BSET, BRCLR and BRSET
UE1D5_UE1T50: equ 0 ; Endpoint 1 Transmit Data Buffer 5 Bit 0
UE1D5_UE1T51: equ 1 ; Endpoint 1 Transmit Data Buffer 5 Bit 1
UE1D5_UE1T52: equ 2 ; Endpoint 1 Transmit Data Buffer 5 Bit 2
UE1D5_UE1T53: equ 3 ; Endpoint 1 Transmit Data Buffer 5 Bit 3
UE1D5_UE1T54: equ 4 ; Endpoint 1 Transmit Data Buffer 5 Bit 4
UE1D5_UE1T55: equ 5 ; Endpoint 1 Transmit Data Buffer 5 Bit 5
UE1D5_UE1T56: equ 6 ; Endpoint 1 Transmit Data Buffer 5 Bit 6
UE1D5_UE1T57: equ 7 ; Endpoint 1 Transmit Data Buffer 5 Bit 7
; bit position masks
mUE1D5_UE1T50: equ %00000001
mUE1D5_UE1T51: equ %00000010
mUE1D5_UE1T52: equ %00000100
mUE1D5_UE1T53: equ %00001000
mUE1D5_UE1T54: equ %00010000
mUE1D5_UE1T55: equ %00100000
mUE1D5_UE1T56: equ %01000000
mUE1D5_UE1T57: equ %10000000
;*** UE1D6 - USB Endpoint 1 Data Register 6; 0x0000002E ***
UE1D6: equ $0000002E ;*** UE1D6 - USB Endpoint 1 Data Register 6; 0x0000002E ***
; bit numbers for user in BCLR, BSET, BRCLR and BRSET
UE1D6_UE1T60: equ 0 ; Endpoint 1 Transmit Data Buffer 6 Bit 0
UE1D6_UE1T61: equ 1 ; Endpoint 1 Transmit Data Buffer 6 Bit 1
UE1D6_UE1T62: equ 2 ; Endpoint 1 Transmit Data Buffer 6 Bit 2
UE1D6_UE1T63: equ 3 ; Endpoint 1 Transmit Data Buffer 6 Bit 3
UE1D6_UE1T64: equ 4 ; Endpoint 1 Transmit Data Buffer 6 Bit 4
UE1D6_UE1T65: equ 5 ; Endpoint 1 Transmit Data Buffer 6 Bit 5
UE1D6_UE1T66: equ 6 ; Endpoint 1 Transmit Data Buffer 6 Bit 6
UE1D6_UE1T67: equ 7 ; Endpoint 1 Transmit Data Buffer 6 Bit 7
; bit position masks
mUE1D6_UE1T60: equ %00000001
mUE1D6_UE1T61: equ %00000010
mUE1D6_UE1T62: equ %00000100
mUE1D6_UE1T63: equ %00001000
mUE1D6_UE1T64: equ %00010000
mUE1D6_UE1T65: equ %00100000
mUE1D6_UE1T66: equ %01000000
mUE1D6_UE1T67: equ %10000000
;*** UE1D7 - USB Endpoint 1 Data Register 7; 0x0000002F ***
UE1D7: equ $0000002F ;*** UE1D7 - USB Endpoint 1 Data Register 7; 0x0000002F ***
; bit numbers for user in BCLR, BSET, BRCLR and BRSET
UE1D7_UE1T70: equ 0 ; Endpoint 1 Transmit Data Buffer 7 Bit 0
UE1D7_UE1T71: equ 1 ; Endpoint 1 Transmit Data Buffer 7 Bit 1
UE1D7_UE1T72: equ 2 ; Endpoint 1 Transmit Data Buffer 7 Bit 2
UE1D7_UE1T73: equ 3 ; Endpoint 1 Transmit Data Buffer 7 Bit 3
UE1D7_UE1T74: equ 4 ; Endpoint 1 Transmit Data Buffer 7 Bit 4
UE1D7_UE1T75: equ 5 ; Endpoint 1 Transmit Data Buffer 7 Bit 5
UE1D7_UE1T76: equ 6 ; Endpoint 1 Transmit Data Buffer 7 Bit 6
UE1D7_UE1T77: equ 7 ; Endpoint 1 Transmit Data Buffer 7 Bit 7
; bit position masks
mUE1D7_UE1T70: equ %00000001
mUE1D7_UE1T71: equ %00000010
mUE1D7_UE1T72: equ %00000100
mUE1D7_UE1T73: equ %00001000
mUE1D7_UE1T74: equ %00010000
mUE1D7_UE1T75: equ %00100000
mUE1D7_UE1T76: equ %01000000
mUE1D7_UE1T77: equ %10000000
;*** UE2D0 - USB Endpoint 2 Data Register 0; 0x00000030 ***
UE2D0: equ $00000030 ;*** UE2D0 - USB Endpoint 2 Data Register 0; 0x00000030 ***
; bit numbers for user in BCLR, BSET, BRCLR and BRSET
UE2D0_UE2R00_UE2T00: equ 0 ; Endpoint 2 Receive Data Buffer 0 Bit 0, Endpoint 2 Transmit Data Buffer 0 Bit 0
UE2D0_UE2R01_UE2T01: equ 1 ; Endpoint 2 Receive Data Buffer 0 Bit 1, Endpoint 2 Transmit Data Buffer 0 Bit 1
UE2D0_UE2R02_UE2T02: equ 2 ; Endpoint 2 Receive Data Buffer 0 Bit 2, Endpoint 2 Transmit Data Buffer 0 Bit 2
UE2D0_UE2R03_UE2T03: equ 3 ; Endpoint 2 Receive Data Buffer 0 Bit 3, Endpoint 2 Transmit Data Buffer 0 Bit 3
UE2D0_UE2R04_UE2T04: equ 4 ; Endpoint 2 Receive Data Buffer 0 Bit 4, Endpoint 2 Transmit Data Buffer 0 Bit 4
UE2D0_UE2R05_UE2T05: equ 5 ; Endpoint 2 Receive Data Buffer 0 Bit 5, Endpoint 2 Transmit Data Buffer 0 Bit 5
UE2D0_UE2R06_UE2T06: equ 6 ; Endpoint 2 Receive Data Buffer 0 Bit 6, Endpoint 2 Transmit Data Buffer 0 Bit 6
UE2D0_UE2R07_UE2T07: equ 7 ; Endpoint 2 Receive Data Buffer 0 Bit 7, Endpoint 2 Transmit Data Buffer 0 Bit 7
; bit position masks
mUE2D0_UE2R00_UE2T00: equ %00000001
mUE2D0_UE2R01_UE2T01: equ %00000010
mUE2D0_UE2R02_UE2T02: equ %00000100
mUE2D0_UE2R03_UE2T03: equ %00001000
mUE2D0_UE2R04_UE2T04: equ %00010000
mUE2D0_UE2R05_UE2T05: equ %00100000
mUE2D0_UE2R06_UE2T06: equ %01000000
mUE2D0_UE2R07_UE2T07: equ %10000000
;*** UE2D1 - USB Endpoint 2 Data Register 1; 0x00000031 ***
UE2D1: equ $00000031 ;*** UE2D1 - USB Endpoint 2 Data Register 1; 0x00000031 ***
; bit numbers for user in BCLR, BSET, BRCLR and BRSET
UE2D1_UE2R10_UE2T10: equ 0 ; Endpoint 2 Receive Data Buffer 1 Bit 0, Endpoint 2 Transmit Data Buffer 1 Bit 0
UE2D1_UE2R11_UE2T11: equ 1 ; Endpoint 2 Receive Data Buffer 1 Bit 1, Endpoint 2 Transmit Data Buffer 1 Bit 1
UE2D1_UE2R12_UE2T12: equ 2 ; Endpoint 2 Receive Data Buffer 1 Bit 2, Endpoint 2 Transmit Data Buffer 1 Bit 2
UE2D1_UE2R13_UE2T13: equ 3 ; Endpoint 2 Receive Data Buffer 1 Bit 3, Endpoint 2 Transmit Data Buffer 1 Bit 3
UE2D1_UE2R14_UE2T14: equ 4 ; Endpoint 2 Receive Data Buffer 1 Bit 4, Endpoint 2 Transmit Data Buffer 1 Bit 4
UE2D1_UE2R15_UE2T15: equ 5 ; Endpoint 2 Receive Data Buffer 1 Bit 5, Endpoint 2 Transmit Data Buffer 1 Bit 5
UE2D1_UE2R16_UE2T16: equ 6 ; Endpoint 2 Receive Data Buffer 1 Bit 6, Endpoint 2 Transmit Data Buffer 1 Bit 6
UE2D1_UE2R17_UE2T17: equ 7 ; Endpoint 2 Receive Data Buffer 1 Bit 7, Endpoint 2 Transmit Data Buffer 1 Bit 7
; bit position masks
mUE2D1_UE2R10_UE2T10: equ %00000001
mUE2D1_UE2R11_UE2T11: equ %00000010
mUE2D1_UE2R12_UE2T12: equ %00000100
mUE2D1_UE2R13_UE2T13: equ %00001000
mUE2D1_UE2R14_UE2T14: equ %00010000
mUE2D1_UE2R15_UE2T15: equ %00100000
mUE2D1_UE2R16_UE2T16: equ %01000000
mUE2D1_UE2R17_UE2T17: equ %10000000
;*** UE2D2 - USB Endpoint 2 Data Register 2; 0x00000032 ***
UE2D2: equ $00000032 ;*** UE2D2 - USB Endpoint 2 Data Register 2; 0x00000032 ***
; bit numbers for user in BCLR, BSET,⌨️ 快捷键说明
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