i2c.map.eqn

FPGA使用I2C总线

--A1L581 is Mux~11470
--operation mode is normal

A1L581 = i2c_state[2] & (i2c_state[0]) # !i2c_state[2] & (i2c_state[0] & A1L381 # !i2c_state[0] & (A1L612));


--A1L681 is Mux~11471
--operation mode is normal

A1L681 = i2c_state[2] & (A1L581 & (!sda_buf) # !A1L581 & A1L971) # !i2c_state[2] & (A1L581);


--A1L781 is Mux~11472
--operation mode is normal

A1L781 = !main_state[0] & (A1L681 & !i2c_state[1] # !main_state[1]);


--A1L881 is Mux~11473
--operation mode is normal

A1L881 = inner_state[1] & phase1 # !inner_state[1] & (A1L203 & phase0);


--A1L981 is Mux~11474
--operation mode is normal

A1L981 = inner_state[1] # inner_state[0] & (!phase3) # !inner_state[0] & !phase0;


--A1L091 is Mux~11475
--operation mode is normal

A1L091 = A1L881 & (A1L981 & !sda_buf # !inner_state[0]) # !A1L881 & A1L981 & (!sda_buf);


--A1L191 is Mux~11476
--operation mode is normal

A1L191 = phase0 & (A1L332 & (!sda_buf) # !A1L332 & A1L203) # !phase0 & (!sda_buf);


--A1L291 is Mux~11477
--operation mode is normal

A1L291 = inner_state[2] & (inner_state[3]) # !inner_state[2] & (inner_state[3] & A1L091 # !inner_state[3] & (A1L191));


--A1L391 is Mux~11478
--operation mode is normal

A1L391 = inner_state[2] & (A1L291 & (!sda_buf) # !A1L291 & A1L103) # !inner_state[2] & (A1L291);


--A1L491 is Mux~11479
--operation mode is normal

A1L491 = A1L372 & A1L391 & (!main_state[0]) # !A1L372 & (!sda_buf);


--A1L591 is Mux~11480
--operation mode is normal

A1L591 = A1L781 # main_state[1] & i2c_state[1] & A1L491;


--A1L691 is Mux~11481
--operation mode is normal

A1L691 = main_state[0] & (!sda_buf);


--A1L782 is rtl~2807
--operation mode is normal

A1L782 = !i2c_state[0] & !i2c_state[1];


--A1L791 is Mux~11482
--operation mode is normal

A1L791 = inner_state[2] & A1L782 & !inner_state[3] & !phase3;


--A1L891 is Mux~11483
--operation mode is normal

A1L891 = A1L591 # A1L691 & (A1L791 # !A1L872);


--A1L991 is Mux~11484
--operation mode is normal

A1L991 = inner_state[1] & (inner_state[0]) # !inner_state[1] & (inner_state[0] & !writeData_reg[2] # !inner_state[0] & (writeData_reg[3]));


--A1L002 is Mux~11485
--operation mode is normal

A1L002 = inner_state[1] & (A1L991 & (!writeData_reg[0]) # !A1L991 & writeData_reg[1]) # !inner_state[1] & (A1L991);


--A1L102 is Mux~11486
--operation mode is normal

A1L102 = phase3 & A1L002 # !phase3 & (!sda_buf);


--A1L202 is Mux~11487
--operation mode is normal

A1L202 = inner_state[1] & (phase1 & !inner_state[0] # !sda_buf) # !inner_state[1] & (!inner_state[0] & !sda_buf);


--A1L302 is Mux~11488
--operation mode is normal

A1L302 = phase3 & (!phase1);


--A1L402 is Mux~11489
--operation mode is normal

A1L402 = A1L202 # A1L103 & A1L371 & !A1L302;


--A1L502 is Mux~11490
--operation mode is normal

A1L502 = !sda_buf & (!inner_state[1] & !inner_state[0] # !phase3);


--A1L602 is Mux~11491
--operation mode is normal

A1L602 = inner_state[2] & (inner_state[3]) # !inner_state[2] & (inner_state[3] & A1L402 # !inner_state[3] & (A1L502));


--A1L702 is Mux~11492
--operation mode is normal

A1L702 = inner_state[2] & (A1L602 & (!sda_buf) # !A1L602 & A1L102) # !inner_state[2] & (A1L602);


--A1L802 is Mux~11493
--operation mode is normal

A1L802 = i2c_state[1] & A1L702 & (!i2c_state[0]);


--A1L902 is Mux~11494
--operation mode is normal

A1L902 = i2c_state[0] & A1L281 # !i2c_state[0] & (A1L771 & !inner_state[2]);


--A1L012 is Mux~11495
--operation mode is normal

A1L012 = !i2c_state[1] & (inner_state[3] & A1L481 # !inner_state[3] & (A1L902));


--A1L41 is add~584
--operation mode is arithmetic

A1L41_carry_eqn = A1L32;
A1L41 = cnt_delay[18] $ (!A1L41_carry_eqn);

--A1L51 is add~586
--operation mode is arithmetic

A1L51 = CARRY(cnt_delay[18] & (!A1L32));


--start_delaycnt is start_delaycnt
--operation mode is normal

start_delaycnt_lut_out = A1L622 & (A1L822 # A1L442 & start_delaycnt) # !A1L622 & A1L442 & start_delaycnt;
start_delaycnt = DFFEAS(start_delaycnt_lut_out, clk, rst, , A1L541, , , , );


--A1L61 is add~589
--operation mode is arithmetic

A1L61_carry_eqn = A1L91;
A1L61 = cnt_delay[13] $ (A1L61_carry_eqn);

--A1L71 is add~591
--operation mode is arithmetic

A1L71 = CARRY(!A1L91 # !cnt_delay[13]);


--A1L81 is add~594
--operation mode is arithmetic

A1L81_carry_eqn = A1L13;
A1L81 = cnt_delay[12] $ (!A1L81_carry_eqn);

--A1L91 is add~596
--operation mode is arithmetic

A1L91 = CARRY(cnt_delay[12] & (!A1L13));


--A1L02 is add~599
--operation mode is arithmetic

A1L02_carry_eqn = A1L33;
A1L02 = cnt_delay[10] $ (!A1L02_carry_eqn);

--A1L12 is add~601
--operation mode is arithmetic

A1L12 = CARRY(cnt_delay[10] & (!A1L33));


--A1L22 is add~604
--operation mode is arithmetic

A1L22_carry_eqn = A1L52;
A1L22 = cnt_delay[17] $ (A1L22_carry_eqn);

--A1L32 is add~606
--operation mode is arithmetic

A1L32 = CARRY(!A1L52 # !cnt_delay[17]);


--A1L42 is add~609
--operation mode is arithmetic

A1L42_carry_eqn = A1L72;
A1L42 = cnt_delay[16] $ (!A1L42_carry_eqn);

--A1L52 is add~611
--operation mode is arithmetic

A1L52 = CARRY(cnt_delay[16] & (!A1L72));


--A1L62 is add~614
--operation mode is arithmetic

A1L62_carry_eqn = A1L92;
A1L62 = cnt_delay[15] $ (A1L62_carry_eqn);

--A1L72 is add~616
--operation mode is arithmetic

A1L72 = CARRY(!A1L92 # !cnt_delay[15]);


--A1L82 is add~619
--operation mode is arithmetic

A1L82_carry_eqn = A1L71;
A1L82 = cnt_delay[14] $ (!A1L82_carry_eqn);

--A1L92 is add~621
--operation mode is arithmetic

A1L92 = CARRY(cnt_delay[14] & (!A1L71));


--A1L03 is add~624
--operation mode is arithmetic

A1L03_carry_eqn = A1L12;
A1L03 = cnt_delay[11] $ (A1L03_carry_eqn);

--A1L13 is add~626
--operation mode is arithmetic

A1L13 = CARRY(!A1L12 # !cnt_delay[11]);


--A1L23 is add~629
--operation mode is arithmetic

A1L23_carry_eqn = A1L15;
A1L23 = cnt_delay[9] $ (A1L23_carry_eqn);

--A1L33 is add~631
--operation mode is arithmetic

A1L33 = CARRY(!A1L15 # !cnt_delay[9]);


--A1L43 is add~634
--operation mode is arithmetic

A1L43_carry_eqn = A1L73;
A1L43 = cnt_delay[7] $ (A1L43_carry_eqn);

--A1L53 is add~636
--operation mode is arithmetic

A1L53 = CARRY(!A1L73 # !cnt_delay[7]);


--A1L63 is add~639
--operation mode is arithmetic

A1L63_carry_eqn = A1L93;
A1L63 = cnt_delay[6] $ (!A1L63_carry_eqn);

--A1L73 is add~641
--operation mode is arithmetic

A1L73 = CARRY(cnt_delay[6] & (!A1L93));


--A1L83 is add~644
--operation mode is arithmetic

A1L83_carry_eqn = A1L14;
A1L83 = cnt_delay[5] $ (A1L83_carry_eqn);

--A1L93 is add~646
--operation mode is arithmetic

A1L93 = CARRY(!A1L14 # !cnt_delay[5]);


--A1L04 is add~649
--operation mode is arithmetic

A1L04_carry_eqn = A1L34;
A1L04 = cnt_delay[4] $ (!A1L04_carry_eqn);

--A1L14 is add~651
--operation mode is arithmetic

A1L14 = CARRY(cnt_delay[4] & (!A1L34));


--A1L24 is add~654
--operation mode is arithmetic

A1L24_carry_eqn = A1L54;
A1L24 = cnt_delay[3] $ (A1L24_carry_eqn);

--A1L34 is add~656
--operation mode is arithmetic

A1L34 = CARRY(!A1L54 # !cnt_delay[3]);


--A1L44 is add~659
--operation mode is arithmetic

A1L44_carry_eqn = A1L74;
A1L44 = cnt_delay[2] $ (!A1L44_carry_eqn);

--A1L54 is add~661
--operation mode is arithmetic

A1L54 = CARRY(cnt_delay[2] & (!A1L74));


--A1L64 is add~664
--operation mode is arithmetic

A1L64_carry_eqn = A1L94;
A1L64 = cnt_delay[1] $ (A1L64_carry_eqn);

--A1L74 is add~666
--operation mode is arithmetic

A1L74 = CARRY(!A1L94 # !cnt_delay[1]);


--A1L84 is add~669
--operation mode is arithmetic

A1L84 = !cnt_delay[0];

--A1L94 is add~671
--operation mode is arithmetic

A1L94 = CARRY(cnt_delay[0]);


--A1L05 is add~674
--operation mode is arithmetic

A1L05_carry_eqn = A1L53;
A1L05 = cnt_delay[8] $ (!A1L05_carry_eqn);

--A1L15 is add~676
--operation mode is arithmetic

A1L15 = CARRY(cnt_delay[8] & (!A1L53));


--A1L25 is add~679
--operation mode is normal

A1L25_carry_eqn = A1L51;
A1L25 = cnt_delay[19] $ (A1L25_carry_eqn);


--A1L882 is rtl~2808
--operation mode is normal

A1L882 = link # phase3 & (!inner_state[3]);


--A1L982 is rtl~2809
--operation mode is normal

A1L982 = phase1 & !inner_state[3] & !inner_state[0] & !i2c_state[0];


--A1L092 is rtl~2810
--operation mode is normal

A1L092 = A1L851 & (A1L651 # A1L982) # !A1L851 & A1L882;


--A1L192 is rtl~2811
--operation mode is normal

A1L192 = A1L092 # link & (!phase3 # !inner_state[3]);


--A1L292 is rtl~2812
--operation mode is normal

A1L292 = i2c_state[1] & (link # A1L941) # !i2c_state[1] & A1L192;


--A1L112 is Mux~11497
--operation mode is normal

A1L112 = link # inner_state[0] & phase3 # !inner_state[0] & (phase1);


--A1L212 is Mux~11498
--operation mode is normal

A1L212 = A1L112 & (link & !phase3 # !inner_state[3]) # !A1L112 & link & (!phase3);


--A1L392 is rtl~2813
--operation mode is normal

A1L392 = link & (inner_state[0] # !phase3 # !inner_state[3]);


--A1L492 is rtl~2814
--operation mode is normal

A1L492 = phase3 & inner_state[0] & (!phase1 # !inner_state[3]);


--A1L592 is rtl~2815
--operation mode is normal

A1L592 = A1L851 & (A1L392 # A1L492) # !A1L851 & A1L882;


--A1L692 is rtl~2816
--operation mode is normal

A1L692 = main_state[0] & (i2c_state[1] & A1L592 # !i2c_state[1] & (A1L192));


--A1L45 is add~686
--operation mode is arithmetic

A1L45 = CARRY(!A1L2 # !cnt_scan[1]);


--A1L722 is process2~154
--operation mode is normal

A1L722 = !cnt_delay[12] & !cnt_delay[10] & !cnt_delay[8] & !cnt_delay[19];


--A1L822 is process2~155
--operation mode is normal

A1L822 = A1L722 & !cnt_delay[18] & !cnt_delay[13] & !A1L931;


--A1L312 is Mux~11499
--operation mode is normal

A1L312 = !inner_state[1] & !inner_state[2] & (!phase1 # !inner_state[0]);


--A1L412 is Mux~11500
--operation mode is normal

A1L412 = inner_state[1] & (A1L882) # !inner_state[1] & (inner_state[2] & (A1L882) # !inner_state[2] & A1L212);


--A1L512 is Mux~11501
--operation mode is normal

A1L512 = inner_state[2] & !phase3 & !sda_buf # !inner_state[2] & (A1L771);


--A1L612 is Mux~11502
--operation mode is normal

A1L612 = inner_state[3] & (A1L481) # !inner_state[3] & A1L512;


--clk is clk
--operation mode is input

clk = INPUT();


--rst is rst
--operation mode is input

rst = INPUT();


--data_in[3] is data_in[3]
--operation mode is input

data_in[3] = INPUT();


--data_in[2] is data_in[2]
--operation mode is input

data_in[2] = INPUT();


--data_in[1] is data_in[1]
--operation mode is input

data_in[1] = INPUT();


--data_in[0] is data_in[0]
--operation mode is input

data_in[0] = INPUT();


--wr_input is wr_input
--operation mode is input

wr_input = INPUT();


--rd_input is rd_input
--operation mode is input

rd_input = INPUT();


--scl is scl
--operation mode is output

scl = OUTPUT(!scl_xhdl1);


--lowbit is lowbit
--operation mode is output

lowbit = OUTPUT(GND);


--en[0] is en[0]
--operation mode is output

en[0] = OUTPUT(en_xhdl3[0]);


--en[1] is en[1]
--operation mode is output

en[1] = OUTPUT(!en_xhdl3[1]);


--seg_data[0] is seg_data[0]
--operation mode is output

seg_data[0] = OUTPUT(VCC);


--seg_data[1] is seg_data[1]
--operation mode is output

seg_data[1] = OUTPUT(A1L652);


--seg_data[2] is seg_data[2]
--operation mode is output

seg_data[2] = OUTPUT(A1L852);


--seg_data[3] is seg_data[3]
--operation mode is output

seg_data[3] = OUTPUT(A1L062);


--seg_data[4] is seg_data[4]
--operation mode is output

seg_data[4] = OUTPUT(A1L262);


--seg_data[5] is seg_data[5]
--operation mode is output

seg_data[5] = OUTPUT(A1L462);


--seg_data[6] is seg_data[6]
--operation mode is output

seg_data[6] = OUTPUT(A1L662);


--seg_data[7] is seg_data[7]
--operation mode is output

seg_data[7] = OUTPUT(A1L862);


--A1L203 is sda~0
--operation mode is bidir

A1L203 = sda;

--sda is sda
--operation mode is bidir

sda_tri_out = TRI(!sda_buf, link);
sda = BIDIR(sda_tri_out);