i2c.fit.eqn

FPGA使用I2C总线

--A1L713 is rtl~2805 at LC_X15_Y7_N1
--operation mode is normal

A1L713 = inner_state[3] & (inner_state[1] # A1L881 & A1L613) # !inner_state[3] & (inner_state[1] $ A1L881);


--A1L813 is rtl~2806 at LC_X15_Y7_N2
--operation mode is normal

A1L813 = main_state[0] & (A1L713);


--A1L091 is Mux~11442 at LC_X13_Y6_N0
--operation mode is normal

A1L091 = !inner_state[2] & !inner_state[1];


--A1L191 is Mux~11443 at LC_X13_Y6_N4
--operation mode is normal

A1L191 = phase3 & (inner_state[3] & (A1L091 $ inner_state[0]) # !inner_state[3] & !A1L091 & !inner_state[0]) # !phase3 & (inner_state[0]);


--A1L291 is Mux~11444 at LC_X13_Y6_N2
--operation mode is normal

A1L291 = phase3 & inner_state[3] & (inner_state[0] # A1L091) # !phase3 & inner_state[0];


--A1L391 is Mux~11445 at LC_X13_Y5_N5
--operation mode is normal

A1L391 = !inner_state[0] & (phase3);


--link is link at LC_X13_Y5_N1
--operation mode is normal

link_lut_out = i2c_state[2] & A1L642 # !i2c_state[2] & (A1L423);
link = DFFEAS(link_lut_out, GLOBAL(clk), GLOBAL(rst), , A1L213, A1L823, , , !main_state[1]);


--A1L491 is Mux~11446 at LC_X13_Y6_N7
--operation mode is normal

A1L491 = link # inner_state[2] # inner_state[1];


--A1L591 is Mux~11447 at LC_X13_Y6_N8
--operation mode is normal

A1L591 = A1L291 # !inner_state[3] & A1L391 & A1L491;


--A1L691 is Mux~11448 at LC_X13_Y6_N9
--operation mode is normal

A1L691 = i2c_state[0] & A1L191 # !i2c_state[0] & (A1L591);


--A1L791 is Mux~11449 at LC_X14_Y4_N5
--operation mode is normal

A1L791 = !main_state[0] & (i2c_state[0] & (!i2c_state[2]) # !i2c_state[0] & !i2c_state[1]);


--A1L891 is Mux~11450 at LC_X13_Y6_N1
--operation mode is normal

A1L891 = main_state[1] & (A1L791 & (A1L691) # !A1L791 & inner_state[0]);


--A1L991 is Mux~11451 at LC_X14_Y4_N2
--operation mode is normal

A1L991 = inner_state[0] & i2c_state[2] & main_state[0];


--A1L002 is Mux~11452 at LC_X12_Y6_N4
--operation mode is normal

A1L002 = inner_state[0] & (inner_state[3] & !A1L542 # !phase3) # !inner_state[0] & phase3 & (inner_state[3] $ !A1L542);


--A1L102 is Mux~11453 at LC_X13_Y6_N6
--operation mode is normal

A1L102 = phase3 & (inner_state[3] $ (!inner_state[0] & !A1L091)) # !phase3 & inner_state[0];


--A1L202 is Mux~11454 at LC_X13_Y6_N5
--operation mode is normal

A1L202 = i2c_state[1] & i2c_state[0] # !i2c_state[1] & (i2c_state[0] & A1L102 # !i2c_state[0] & (A1L591));


--A1L302 is Mux~11455 at LC_X13_Y6_N3
--operation mode is normal

A1L302 = i2c_state[1] & (A1L202 & inner_state[0] # !A1L202 & (A1L002)) # !i2c_state[1] & (A1L202);


--A1L4 is add~554 at LC_X13_Y8_N3
--operation mode is arithmetic

A1L4 = clk_div[3] $ A1L21;

--A1L5 is add~556 at LC_X13_Y8_N3
--operation mode is arithmetic

A1L5_cout_0 = !A1L21 # !clk_div[3];
A1L5 = CARRY(A1L5_cout_0);

--A1L6 is add~556COUT1_717 at LC_X13_Y8_N3
--operation mode is arithmetic

A1L6_cout_1 = !A1L31 # !clk_div[3];
A1L6 = CARRY(A1L6_cout_1);


--A1L7 is add~559 at LC_X13_Y8_N5
--operation mode is arithmetic

A1L7_carry_eqn = (!A1L51 & GND) # (A1L51 & VCC);
A1L7 = clk_div[5] $ (A1L7_carry_eqn);

--A1L8 is add~561 at LC_X13_Y8_N5
--operation mode is arithmetic

A1L8_cout_0 = !A1L51 # !clk_div[5];
A1L8 = CARRY(A1L8_cout_0);

--A1L9 is add~561COUT1_719 at LC_X13_Y8_N5
--operation mode is arithmetic

A1L9_cout_1 = !A1L51 # !clk_div[5];
A1L9 = CARRY(A1L9_cout_1);


--A1L01 is add~564 at LC_X13_Y8_N7
--operation mode is normal

A1L01_carry_eqn = (!A1L51 & A1L91) # (A1L51 & A1L02);
A1L01 = A1L01_carry_eqn $ clk_div[7];


--A1L11 is add~569 at LC_X13_Y8_N2
--operation mode is arithmetic

A1L11 = clk_div[2] $ !A1L77;

--A1L21 is add~571 at LC_X13_Y8_N2
--operation mode is arithmetic

A1L21_cout_0 = clk_div[2] & !A1L77;
A1L21 = CARRY(A1L21_cout_0);

--A1L31 is add~571COUT1_716 at LC_X13_Y8_N2
--operation mode is arithmetic

A1L31_cout_1 = clk_div[2] & !A1L87;
A1L31 = CARRY(A1L31_cout_1);


--A1L41 is add~574 at LC_X13_Y8_N4
--operation mode is arithmetic

A1L41 = clk_div[4] $ !A1L5;

--A1L51 is add~576 at LC_X13_Y8_N4
--operation mode is arithmetic

A1L51 = A1L61;


--A1L81 is add~579 at LC_X13_Y8_N6
--operation mode is arithmetic

A1L81_carry_eqn = (!A1L51 & A1L8) # (A1L51 & A1L9);
A1L81 = clk_div[6] $ !A1L81_carry_eqn;

--A1L91 is add~581 at LC_X13_Y8_N6
--operation mode is arithmetic

A1L91_cout_0 = clk_div[6] & !A1L8;
A1L91 = CARRY(A1L91_cout_0);

--A1L02 is add~581COUT1_721 at LC_X13_Y8_N6
--operation mode is arithmetic

A1L02_cout_1 = clk_div[6] & !A1L9;
A1L02 = CARRY(A1L02_cout_1);


--A1L572 is reduce_nor~3 at LC_X14_Y8_N2
--operation mode is normal

A1L572 = !A1L482 # !A1L382 # !clk_div[3];


--A1L402 is Mux~11457 at LC_X13_Y5_N9
--operation mode is normal

A1L402 = phase3 & (inner_state[0] & inner_state[1]) # !phase3 & !sda_buf;


--A1L502 is Mux~11458 at LC_X13_Y5_N4
--operation mode is normal

A1L502 = inner_state[0] & !inner_state[1];


--A1L602 is Mux~11459 at LC_X13_Y5_N6
--operation mode is normal

A1L602 = A1L502 & (phase0 & (A1L433) # !phase0 & !sda_buf) # !A1L502 & (!sda_buf);


--A1L702 is Mux~11460 at LC_X15_Y5_N9
--operation mode is normal

A1L702 = inner_state[1] # !phase1;


--A1L802 is Mux~11461 at LC_X15_Y5_N1
--operation mode is normal

A1L802 = !sda_buf & (inner_state[0] & !phase3 # !inner_state[0] & (A1L702));


--A1L902 is Mux~11462 at LC_X13_Y5_N2
--operation mode is normal

A1L902 = A1L802 # A1L391 & (link # inner_state[1]);


--A1L012 is Mux~11463 at LC_X13_Y5_N7
--operation mode is normal

A1L012 = inner_state[3] & (inner_state[2] # A1L602) # !inner_state[3] & A1L902 & !inner_state[2];


--A1L112 is Mux~11464 at LC_X13_Y5_N8
--operation mode is normal

A1L112 = inner_state[2] & (A1L012 & !sda_buf # !A1L012 & (A1L402)) # !inner_state[2] & (A1L012);


--A1L333 is sda_buf~92 at LC_X15_Y5_N0
--operation mode is normal

A1L333 = phase0 & (A1L433) # !phase0 & !sda_buf;


--A1L212 is Mux~11465 at LC_X15_Y5_N2
--operation mode is normal

A1L212 = A1L871 & (phase3 # A1L333) # !A1L871 & !sda_buf;


--A1L312 is Mux~11466 at LC_X15_Y5_N4
--operation mode is normal

A1L312 = !inner_state[1] & !inner_state[2] & !inner_state[0] # !phase3;


--A1L412 is Mux~11467 at LC_X15_Y5_N5
--operation mode is normal

A1L412 = inner_state[2] & (A1L391 # !sda_buf & A1L312) # !inner_state[2] & (!sda_buf & A1L312);


--A1L512 is Mux~11468 at LC_X15_Y5_N3
--operation mode is normal

A1L512 = inner_state[3] & (A1L212) # !inner_state[3] & A1L412;


--A1L612 is Mux~11469 at LC_X14_Y5_N0
--operation mode is normal

A1L612 = A1L871 & !phase3 & A1L333 # !A1L871 & (!sda_buf);


--A1L712 is Mux~11470 at LC_X14_Y5_N4
--operation mode is normal

A1L712 = i2c_state[2] & i2c_state[0] # !i2c_state[2] & (i2c_state[0] & A1L512 # !i2c_state[0] & (A1L842));


--A1L812 is Mux~11471 at LC_X14_Y5_N5
--operation mode is normal

A1L812 = i2c_state[2] & (A1L712 & !sda_buf # !A1L712 & (A1L112)) # !i2c_state[2] & (A1L712);


--A1L912 is Mux~11472 at LC_X14_Y5_N6
--operation mode is normal

A1L912 = !main_state[0] & (!i2c_state[1] & A1L812 # !main_state[1]);


--A1L022 is Mux~11473 at LC_X15_Y6_N5
--operation mode is normal

A1L022 = inner_state[1] & (phase1) # !inner_state[1] & phase0 & (A1L433);


--A1L122 is Mux~11474 at LC_X15_Y6_N1
--operation mode is normal

A1L122 = inner_state[1] # inner_state[0] & (!phase3) # !inner_state[0] & !phase0;


--A1L222 is Mux~11475 at LC_X15_Y6_N6
--operation mode is normal

A1L222 = inner_state[0] & !sda_buf & A1L122 # !inner_state[0] & (A1L022 # !sda_buf & A1L122);


--A1L322 is Mux~11476 at LC_X15_Y6_N0
--operation mode is normal

A1L322 = A1L562 & !sda_buf # !A1L562 & (phase0 & (A1L433) # !phase0 & !sda_buf);


--A1L422 is Mux~11477 at LC_X15_Y6_N7
--operation mode is normal

A1L422 = inner_state[3] & (inner_state[2] # A1L222) # !inner_state[3] & !inner_state[2] & A1L322;


--A1L522 is Mux~11478 at LC_X15_Y6_N8
--operation mode is normal

A1L522 = inner_state[2] & (A1L422 & !sda_buf # !A1L422 & (A1L333)) # !inner_state[2] & (A1L422);


--A1L622 is Mux~11479 at LC_X15_Y6_N9
--operation mode is normal

A1L622 = A1L503 & (!main_state[0] & A1L522) # !A1L503 & !sda_buf;


--A1L722 is Mux~11480 at LC_X14_Y5_N7
--operation mode is normal

A1L722 = A1L912 # main_state[1] & i2c_state[1] & A1L622;


--A1L822 is Mux~11481 at LC_X15_Y4_N5
--operation mode is normal

A1L822 = main_state[0] & !sda_buf;


--A1L913 is rtl~2807 at LC_X15_Y4_N6
--operation mode is normal

A1L913 = !i2c_state[0] & !i2c_state[1];


--A1L922 is Mux~11482 at LC_X15_Y4_N1
--operation mode is normal

A1L922 = inner_state[2] & !phase3 & A1L913 & !inner_state[3];


--A1L032 is Mux~11483 at LC_X14_Y5_N8
--operation mode is normal

A1L032 = A1L722 # A1L822 & (A1L922 # !A1L013);


--A1L132 is Mux~11484 at LC_X16_Y9_N6
--operation mode is normal

writeData_reg[3]_qfbk = writeData_reg[3];
A1L132 = inner_state[1] & (inner_state[0]) # !inner_state[1] & (inner_state[0] & !writeData_reg[2] # !inner_state[0] & (writeData_reg[3]_qfbk));

--writeData_reg[3] is writeData_reg[3] at LC_X16_Y9_N6
--operation mode is normal

writeData_reg[3] = DFFEAS(A1L132, GLOBAL(clk), GLOBAL(rst), , A1L771, data_in[3], , , VCC);


--A1L232 is Mux~11485 at LC_X14_Y9_N5
--operation mode is normal

writeData_reg[1]_qfbk = writeData_reg[1];
A1L232 = inner_state[1] & (A1L132 & !writeData_reg[0] # !A1L132 & (writeData_reg[1]_qfbk)) # !inner_state[1] & (A1L132);

--writeData_reg[1] is writeData_reg[1] at LC_X14_Y9_N5
--operation mode is normal

writeData_reg[1] = DFFEAS(A1L232, GLOBAL(clk), GLOBAL(rst), , A1L771, data_in[1], , , VCC);


--A1L332 is Mux~11486 at LC_X16_Y5_N0
--operation mode is normal

A1L332 = phase3 & (A1L232) # !phase3 & !sda_buf;


--A1L432 is Mux~11487 at LC_X16_Y5_N3
--operation mode is normal

A1L432 = inner_state[1] & (phase1 & !inner_state[0] # !sda_buf) # !inner_state[1] & (!sda_buf & !inner_state[0]);


--A1L532 is Mux~11488 at LC_X16_Y5_N8
--operation mode is normal

A1L532 = !phase1 & phase3;


--A1L632 is Mux~11489 at LC_X16_Y5_N5
--operation mode is normal

A1L632 = A1L432 # A1L502 & !A1L532 & A1L333;


--A1L732 is Mux~11490 at LC_X16_Y5_N9
--operation mode is normal

A1L732 = !sda_buf & (!inner_state[1] & !inner_state[0] # !phase3);


--A1L832 is Mux~11491 at LC_X16_Y5_N6
--operation mode is normal

A1L832 = inner_state[3] & (inner_state[2] # A1L632) # !inner_state[3] & A1L732 & !inner_state[2];


--A1L932 is Mux~11492 at LC_X16_Y5_N1
--operation mode is normal

A1L932 = inner_state[2] & (A1L832 & !sda_buf # !A1L832 & (A1L332)) # !inner_state[2] & (A1L832);


--A1L042 is Mux~11493 at LC_X16_Y5_N2
--operation mode is normal

A1L042 = i2c_state[1] & !i2c_state[0] & A1L932;


--A1L142 is Mux~11494 at LC_X14_Y6_N4
--operation mode is normal

A1L142 = i2c_state[0] & A1L412 # !i2c_state[0] & (!inner_state[2] & A1L902);


--A1L242 is Mux~11495 at LC_X14_Y6_N5
--operation mode is normal

A1L242 = !i2c_state[1] & (inner_state[3] & (A1L612) # !inner_state[3] & A1L142);


--A1L12 is add~584 at LC_X11_Y5_N8
--operation mode is arithmetic

A1L12_carry_eqn = (!A1L34 & A1L43) # (A1L34 & A1L53);
A1L12 = cnt_delay[18] $ !A1L12_carry_eqn;

--A1L22 is add~586 at LC_X11_Y5_N8
--operation mode is arithmetic

A1L22_cout_0 = cnt_delay[18] & !A1L43;
A1L22 = CARRY(A1L22_cout_0);

--A1L32 is add~586COUT1_753 at LC_X11_Y5_N8
--operation mode is arithmetic

A1L32_cout_1 = cnt_delay[18] & !A1L53;
A1L32 = CARRY(A1L32_cout_1);


--start_delaycnt is start_delaycnt at LC_X11_Y6_N7
--operation mode is normal

start_delaycnt_lut_out = A1L672 & (start_delaycnt # A1L852 & A1L062) # !A1L672 & A1L852 & (A1L062);
start_delaycnt = DFFEAS(start_delaycnt_lut_out, GLOBAL(clk), GLOBAL(rst), , A1L771, , , , );


--A1L42 is add~589 at LC_X11_Y5_N3
--operation mode is arithmetic

A1L42_carry_eqn = (!A1L84 & A1L82) # (A1L84 & A1L92);
A1L42 = cnt_delay[13] $ A1L42_carry_eqn;

--A1L52 is add~591 at LC_X11_Y5_N3
--operation mode is arithmetic

A1L52_cout_0 = !A1L82 # !cnt_delay[13];
A1L52 = CARRY(A1L52_cout_0);

--A1L62 is add~591COUT1_745 at LC_X11_Y5_N3
--operation mode is arithmetic

A1L62_cout_1 = !A1L92 # !cnt_delay[13];
A1L62 = CARRY(A1L62_cout_1);


--A1L72 is add~594 at LC_X11_Y5_N2
--operation mode is arithmetic

A1L72_carry_eqn = (!A1L84 & A1L54) # (A1L84 & A1L64);
A1L72 = cnt_delay[12] $ !A1L72_carry_eqn;

--A1L82 is add~596 at LC_X11_Y5_N2
--operation mode is arithmetic

A1L82_cout_0 = cnt_delay[12] & !A1L54;
A1L82 = CARRY(A1L82_cout_0);

--A1L92 is add~596COUT1_743 at LC_X11_Y5_N2
--operation mode is arithmetic

A1L92_cout_1 = cnt_delay[12] & !A1L64;
A1L92 = CARRY(A1L92_cout_1);


--A1L03 is add~599 at LC_X11_Y5_N0
--operation mode is arithmetic

A1L03_carry_eqn = A1L84;
A1L03 = cnt_delay[10] $ !A1L03_carry_eqn;