shift_l.exe

將Verilog設計轉成VHDL設計的程式

function verilog_left_shift(val: Bit_Vector; n: integer)
	return Bit_Vector is
	variable result: Bit_Vector ( 0 to (val'length -1));
	begin
		result:=val;
		if (val'length > n) then
			for i in 0 to (val'length-1-n) loop
				result(i) := result(i+n);
			end loop;
			for i in 0 to n-1
				result(val'length-1) := 0;
			end loop;
		else
			for i in 0 to (val'length - 1) loop
				result(i) := 0;
			end loop;
		endif;
		return result;
end verilog_left_shift;