vram_602.vhd

实现cpld 外挂存储器,并实时测试内存的好坏.可嵌入到系统中

---***************************************************---
--PROJECT: VIDEO SAVAING DISPLAY
--FUNCTIONS: 
--AUTHO: 
--DATA:
---***************************************************---
LIBRARY IEEE;
USE IEEE.STD_LOGIC_1164.ALL;
USE IEEE.STD_LOGIC_UNSIGNED.ALL;

ENTITY VRAM_602 IS
PORT ( 
         CLK         :  IN  STD_LOGIC;
		 RST         :  IN  STD_LOGIC;
--------------MCU INTERFACE-------------------------------
         --RD_N        :  IN  STD_LOGIC;
         --CS_N        :  IN  STD_LOGIC;
         --WR_N        :  IN  STD_LOGIC;
         --RS          :  IN STD_LOGIC;
         --DB          :  INOUT STD_LOGIC_VECTOR(7 DOWNTO 0);
--------------SRAM INTERFACE-------------------------------
         SRAM_WE_N   :  OUT STD_LOGIC;
         SRAM_DATA   :  INOUT STD_LOGIC_VECTOR(7 DOWNTO 0);
         SRAM_ADD    :  OUT STD_LOGIC_VECTOR(16 DOWNTO 0);
--------------LCD INTERFACE--------------------------------
         VCOM        :  OUT STD_LOGIC;
         CPH         :  OUT STD_LOGIC;
         STHL_R      :  OUT STD_LOGIC;
         OEH         :  OUT STD_LOGIC;
         CKV         :  OUT STD_LOGIC;
         STVU_D      :  OUT STD_LOGIC;
         OEV         :  OUT STD_LOGIC;
         RGB         :  OUT STD_LOGIC_VECTOR(7 DOWNTO 0));
END VRAM_602;

ARCHITECTURE BEHAVE OF VRAM_602 IS
signal counter1 : integer range 0 to 151200;
signal control_add: std_logic_vector(16 downto 0);
signal control_wr : std_Logic;
signal control_data: std_logic_vector(7 downto 0);
signal control_b   : std_logic; 
signal read_next_pix: std_Logic;
signal lcd_add: std_Logic_vector (16 downto 0);

COMPONENT LCD_CONTROLLER IS
  PORT ( 
         RST           :  IN  STD_LOGIC;
         CLK           :  IN  STD_LOGIC;
         READ_NEXT_PIX :  OUT STD_LOGIC;
         LCD_ADD       :  OUT STD_LOGIC_VECTOR (16 DOWNTO 0);
         VCOM          :  OUT STD_lOGIC;
         CPH           :  OUT  STD_LOGIC;
         STHL_R        :  OUT STD_LOGIC;
         OEH           :  OUT STD_LOGIC;
         CKV           :  OUT STD_LOGIC;
         STVU_D        :  OUT STD_LOGIC;
         OEV           :  OUT STD_LOGIC);
END COMPONENT;

BEGIN
process (clk, rst)
begin 
  if rst='0' then 
       counter1<=0;
  elsif rising_edge(clk) then 
       if counter1=151200 then
               counter1<=0;
       else 
               counter1<=counter1+1;
       end if;
  end if;
end process;

process (clk,rst,counter1)
begin
  if rst='0' then 
      control_b<='1';
  elsif clk'event and clk='1' then 
      if counter1=151200 then
            control_b<=not control_b;
      end if;
  end if;
end process;

process (clk,rst,control_data)
begin 
   if rst='0' then 
           control_data<=(others=>'0');
   elsif rising_edge (clk) then
           if control_data="11111111" then 
                    control_data<=(others=>'0');
           else
              control_data<=control_data+"00000001";
           end if;
   end if;
end process;

process (clk, rst, control_add)
begin
  if rst='0' then
           control_add<=(others=>'0'); 
   elsif clk'event and clk='1' then 
           if control_add="11011011010111111"  then 
                 control_add<=(others=>'0');
           else
                 control_add<=control_add+"00000000000000001";    
           end if;
   end if;
end process;

process (CLK,RST)
begin
 if rst='0' then 
       rgb<=(others=>'0');
       sram_add<=(others=>'0');
       sram_we_n<='1';
       sram_data<=(others=>'Z');
 elsif rising_edge (clk) then 
       if control_b='1' then 
              sram_add<=control_add;
              sram_we_n<='0'; 
              sram_data<=control_data;
       else
              if read_next_pix='1' then 
                    sram_add<= lcd_add;
                    sram_we_n<='1';
                    rgb<=sram_data;
              end if;
       end if;
  end if;
end process;

LCD_CONTROLLER1: LCD_CONTROLLER 
  PORT MAP (
               RST=>RST,
               CLK=>CLK,
               READ_NEXT_PIX=>READ_NEXT_PIX,
               LCD_ADD=>LCD_ADD,
               VCOM=>VCOM,
               CPH=>CPH,
               STHL_R=>STHL_R,
               OEH=>OEH,
               CKV=>CKV,
               STVU_D=>STVU_D,
               OEV=>OEV
);
END BEHAVE;