📄 serial.fit.rpt
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; 14 - 15 ; 0 ;
; 16 - 17 ; 1 ;
; 18 - 19 ; 2 ;
; 20 - 21 ; 1 ;
; 22 - 23 ; 0 ;
; 24 - 25 ; 1 ;
+-----------------------------------------------+-----------------------------+
+-----------------------------------------------------------------------+
; LAB Macrocells ;
+-----------------------------------------+-----------------------------+
; Number of Macrocells (Average = 14.00) ; Number of LABs (Total = 8) ;
+-----------------------------------------+-----------------------------+
; 0 ; 0 ;
; 1 ; 0 ;
; 2 ; 0 ;
; 3 ; 0 ;
; 4 ; 0 ;
; 5 ; 0 ;
; 6 ; 0 ;
; 7 ; 1 ;
; 8 ; 0 ;
; 9 ; 0 ;
; 10 ; 0 ;
; 11 ; 1 ;
; 12 ; 0 ;
; 13 ; 0 ;
; 14 ; 1 ;
; 15 ; 0 ;
; 16 ; 5 ;
+-----------------------------------------+-----------------------------+
+---------------------------------------------------------+
; Parallel Expander ;
+--------------------------+------------------------------+
; Parallel Expander Length ; Number of Parallel Expanders ;
+--------------------------+------------------------------+
; 0 ; 0 ;
; 1 ; 6 ;
; 2 ; 1 ;
; 3 ; 2 ;
+--------------------------+------------------------------+
+-------------------------------------------------------------------------------+
; Shareable Expander ;
+-------------------------------------------------+-----------------------------+
; Number of shareable expanders (Average = 3.88) ; Number of LABs (Total = 7) ;
+-------------------------------------------------+-----------------------------+
; 0 ; 1 ;
; 1 ; 1 ;
; 2 ; 1 ;
; 3 ; 1 ;
; 4 ; 0 ;
; 5 ; 2 ;
; 6 ; 1 ;
; 7 ; 0 ;
; 8 ; 0 ;
; 9 ; 1 ;
+-------------------------------------------------+-----------------------------+
+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Logic Cell Interconnection ;
+-----+------------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; LAB ; Logic Cell ; Input ; Output ;
+-----+------------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; A ; LC14 ; clk, rst, cnt_delay[13], cnt_delay[12], cnt_delay[11], cnt_delay[10], cnt_delay[9], cnt_delay[8], cnt_delay[3], cnt_delay[2], cnt_delay[7], cnt_delay[6], cnt_delay[1], cnt_delay[0], cnt_delay[5], cnt_delay[4], start_delaycnt ; cnt_delay[8], cnt_delay[10], cnt_delay[12], cnt_delay[13], cnt_delay[15], cnt_delay[16], cnt_delay[17], cnt_delay[18], cnt_delay[19], start_delaycnt, cnt_delay[0], key_entry1 ;
; A ; LC15 ; clk, rst, cnt_delay[4], cnt_delay[5], cnt_delay[0], cnt_delay[7], cnt_delay[15], cnt_delay[17], cnt_delay[1], cnt_delay[6], cnt_delay[14], cnt_delay[2], cnt_delay[16], cnt_delay[3], cnt_delay[19], cnt_delay[18], cnt_delay[9], cnt_delay[10], cnt_delay[11], cnt_delay[12], cnt_delay[8], cnt_delay[13], start_delaycnt ; cnt_delay[8], cnt_delay[10], cnt_delay[12], cnt_delay[13], cnt_delay[14], cnt_delay[15], cnt_delay[16], cnt_delay[17], cnt_delay[18], cnt_delay[19], start_delaycnt, cnt_delay[0], key_entry1 ;
; A ; LC12 ; clk, rst, cnt_delay[14], cnt_delay[13], cnt_delay[12], cnt_delay[11], cnt_delay[10], cnt_delay[9], cnt_delay[8], cnt_delay[3], cnt_delay[2], cnt_delay[7], cnt_delay[6], cnt_delay[1], cnt_delay[0], cnt_delay[5], cnt_delay[4], start_delaycnt ; cnt_delay[8], cnt_delay[10], cnt_delay[12], cnt_delay[13], cnt_delay[16], cnt_delay[17], cnt_delay[18], cnt_delay[19], start_delaycnt, cnt_delay[0], key_entry1 ;
; A ; LC11 ; clk, rst, cnt_delay[4], cnt_delay[5], cnt_delay[0], cnt_delay[7], cnt_delay[15], cnt_delay[17], cnt_delay[1], cnt_delay[6], cnt_delay[14], cnt_delay[2], cnt_delay[16], cnt_delay[3], cnt_delay[19], cnt_delay[13], cnt_delay[18], cnt_delay[9], cnt_delay[10], cnt_delay[11], cnt_delay[8], cnt_delay[12], start_delaycnt ; cnt_delay[8], cnt_delay[10], cnt_delay[12], cnt_delay[13], cnt_delay[14], cnt_delay[15], cnt_delay[16], cnt_delay[17], cnt_delay[18], cnt_delay[19], start_delaycnt, cnt_delay[0], key_entry1 ;
; A ; LC7 ; clk, rst, cnt_delay[10], cnt_delay[9], cnt_delay[8], cnt_delay[3], cnt_delay[2], cnt_delay[7], cnt_delay[6], cnt_delay[1], cnt_delay[0], cnt_delay[5], cnt_delay[4], start_delaycnt ; cnt_delay[8], cnt_delay[10], cnt_delay[12], cnt_delay[13], cnt_delay[14], cnt_delay[15], cnt_delay[16], cnt_delay[17], cnt_delay[18], cnt_delay[19], start_delaycnt, cnt_delay[0], key_entry1 ;
; A ; LC9 ; clk, rst, cnt_delay[3], cnt_delay[2], cnt_delay[7], cnt_delay[6], cnt_delay[1], cnt_delay[0], cnt_delay[5], cnt_delay[4], cnt_delay[10], cnt_delay[11], cnt_delay[15], cnt_delay[14], cnt_delay[8], cnt_delay[9], cnt_delay[13], cnt_delay[12], start_delaycnt ; cnt_delay[8], cnt_delay[10], cnt_delay[12], cnt_delay[13], cnt_delay[17], cnt_delay[18], cnt_delay[19], start_delaycnt, cnt_delay[0], key_entry1 ;
; A ; LC10 ; clk, rst, cnt_delay[4], cnt_delay[5], cnt_delay[0], cnt_delay[7], cnt_delay[15], cnt_delay[17], cnt_delay[1], cnt_delay[6], cnt_delay[14], cnt_delay[2], cnt_delay[16], cnt_delay[3], cnt_delay[11], cnt_delay[19], cnt_delay[13], cnt_delay[12], cnt_delay[18], cnt_delay[9], cnt_delay[8], cnt_delay[10], start_delaycnt ; cnt_delay[8], cnt_delay[10], cnt_delay[11], cnt_delay[12], cnt_delay[13], cnt_delay[14], cnt_delay[15], cnt_delay[16], cnt_delay[17], cnt_delay[18], cnt_delay[19], start_delaycnt, cnt_delay[0], key_entry1 ;
; A ; LC5 ; clk, rst, cnt_delay[8], cnt_delay[3], cnt_delay[2], cnt_delay[7], cnt_delay[6], cnt_delay[1], cnt_delay[0], cnt_delay[5], cnt_delay[4], start_delaycnt ; cnt_delay[8], cnt_delay[10], cnt_delay[11], cnt_delay[12], cnt_delay[13], cnt_delay[14], cnt_delay[15], cnt_delay[16], cnt_delay[17], cnt_delay[18], cnt_delay[19], start_delaycnt, cnt_delay[0], key_entry1 ;
; A ; LC8 ; clk, rst, cnt_delay[16], cnt_delay[3], cnt_delay[2], cnt_delay[7], cnt_delay[6], cnt_delay[1], cnt_delay[0], cnt_delay[5], cnt_delay[4], cnt_delay[10], cnt_delay[11], cnt_delay[15], cnt_delay[14], cnt_delay[8], cnt_delay[9], cnt_delay[13], cnt_delay[12], start_delaycnt ; cnt_delay[8], cnt_delay[10], cnt_delay[12], cnt_delay[13], cnt_delay[18], cnt_delay[19], start_delaycnt, cnt_delay[0], key_entry1 ;
; A ; LC2 ; clk, rst, cnt_delay[4], cnt_delay[5], cnt_delay[0], cnt_delay[7], cnt_delay[15], cnt_delay[17], cnt_delay[9], cnt_delay[1], cnt_delay[6], cnt_delay[14], cnt_delay[2], cnt_delay[16], cnt_delay[3], cnt_delay[11], cnt_delay[19], cnt_delay[10], cnt_delay[13], cnt_delay[12], cnt_delay[18], cnt_delay[8], start_delaycnt ; cnt_delay[8], cnt_delay[9], cnt_delay[10], cnt_delay[11], cnt_delay[12], cnt_delay[13], cnt_delay[14], cnt_delay[15], cnt_delay[16], cnt_delay[17], cnt_delay[18], cnt_delay[19], start_delaycnt, cnt_delay[0], key_entry1 ;
; A ; LC6 ; clk, rst, cnt_delay[4], cnt_delay[5], cnt_delay[0], cnt_delay[7], cnt_delay[15], cnt_delay[9], cnt_delay[1], cnt_delay[6], cnt_delay[14], cnt_delay[2], cnt_delay[3], cnt_delay[11], cnt_delay[19], cnt_delay[10], cnt_delay[13], cnt_delay[12], cnt_delay[8], cnt_delay[17], cnt_delay[16], cnt_delay[18], start_delaycnt ; cnt_delay[8], cnt_delay[10], cnt_delay[12], cnt_delay[13], cnt_delay[18], cnt_delay[19], start_delaycnt, cnt_delay[0], key_entry1 ;
; A ; LC16 ; clk, rst, cnt_delay[6], cnt_delay[5], cnt_delay[4], cnt_delay[3], cnt_delay[2], cnt_delay[1], cnt_delay[0], start_delaycnt ; cnt_delay[8], cnt_delay[9], cnt_delay[10], cnt_delay[11], cnt_delay[12], cnt_delay[13], cnt_delay[14], cnt_delay[15], cnt_delay[16], cnt_delay[17], cnt_delay[18], cnt_delay[19], start_delaycnt, cnt_delay[0], key_entry1 ;
; A ; LC1 ; clk, rst, key_entry2, key_entry1, key_input, cnt_delay[4], cnt_delay[5], cnt_delay[0], cnt_delay[7], cnt_delay[15], cnt_delay[17], cnt_delay[9], cnt_delay[1], cnt_delay[6], cnt_delay[14], cnt_delay[2], cnt_delay[16], cnt_delay[3], cnt_delay[11], cnt_delay[19], cnt_delay[10], cnt_delay[13], cnt_delay[12], cnt_delay[8], cnt_delay[18] ; key_entry1, key_entry2, txd_buf[0]~552, txd_buf[6]~562, txd_buf[4]~574, txd_buf[3]~587, txd_buf[2]~604, txd_buf[5], txd_buf[1] ;
; A ; LC4 ; clk, rst, cnt_delay[4], cnt_delay[5], cnt_delay[7], cnt_delay[15], cnt_delay[17], cnt_delay[9], cnt_delay[1], cnt_delay[6], cnt_delay[14], cnt_delay[2], cnt_delay[16], cnt_delay[3], cnt_delay[11], cnt_delay[19], cnt_delay[10], cnt_delay[13], cnt_delay[12], cnt_delay[8], cnt_delay[18], cnt_delay[0], start_delaycnt ; cnt_delay[5], cnt_delay[6], cnt_delay[7], cnt_delay[8], cnt_delay[9], cnt_delay[10], cnt_delay[11], cnt_delay[12], cnt_delay[13], cnt_delay[14], cnt_delay[15], cnt_delay[16], cnt_delay[17], cnt_delay[18], cnt_delay[19], start_delaycnt, cnt_delay[0], cnt_delay[1], cnt_delay[2], cnt_delay[3], cnt_delay[4], key_entry1 ;
; A ; LC3 ; clk, rst, cnt_delay[4], cnt_delay[5], cnt_delay[0], cnt_delay[7], cnt_delay[15], cnt_delay[17], cnt_delay[9], cnt_delay[1], cnt_delay[6], cnt_delay[14], cnt_delay[2], cnt_delay[16], cnt_delay[3], cnt_delay[11], cnt_delay[13], cnt_delay[10], cnt_delay[12], cnt_delay[19], cnt_delay[18], key_input, cnt_delay[8], start_delaycnt ; cnt_delay[5], cnt_delay[6], cnt_delay[7], cnt_delay[8], cnt_delay[9], cnt_delay[10], cnt_delay[11], cnt_delay[12], cnt_delay[13], cnt_delay[14], cnt_delay[15], cnt_delay[16], cnt_delay[17], cnt_delay[18], cnt_delay[19], start_delaycnt, cnt_delay[0], cnt_delay[1], cnt_delay[2], cnt_delay[3], cnt_delay[4] ;
; A ; LC13 ; clk, rst, cnt_delay[4], cnt_delay[5], cnt_delay[0], cnt_delay[7], cnt_delay[15], cnt_delay[9], cnt_delay[1], cnt_delay[6], cnt_delay[14], cnt_delay[2], cnt_delay[3], cnt_delay[11], cnt_delay[10], cnt_delay[13], cnt_delay[12], cnt_delay[8], cnt_delay[17], cnt_delay[16], cnt_delay[19], cnt_delay[18], start_delaycnt ; cnt_delay[8], cnt_delay[10], cnt_delay[12], cnt_delay[13], cnt_delay[18], cnt_delay[19], start_delaycnt, cnt_delay[0], key_entry1 ;
; B ; LC21 ; clk, rst, div_reg[14], div_reg[13], div_reg[12], div_reg[11], div_reg[10], div_reg[9], div_reg[8], div_reg[3], div_reg[2], div_reg[7], div_reg[6], div_reg[1], div_reg[0], div_reg[5], div_reg[4] ; div_reg[2], clkbaud8x, reduce_nor~133sexp ;
; B ; LC23 ; clk, rst, div_reg[13], div_reg[12], div_reg[11], div_reg[10], div_reg[9], div_reg[8], div_reg[3], div_reg[2], div_reg[7], div_reg[6], div_reg[1], div_reg[0], div_reg[5], div_reg[4] ; div_reg[2], div_reg[15], clkbaud8x, reduce_nor~133sexp ;
; B ; LC17 ; clk, rst, div_reg[1], div_reg[0], div_reg[13], div_reg[15], div_reg[12], div_reg[8], div_reg[3], div_reg[10], div_reg[4], div_reg[5], div_reg[2], div_reg[9], div_reg[6], div_reg[7], div_reg[11], div_reg[14] ; state_tras[0], state_rec[0], rxd_reg1, rxd_reg2, state_rec[1], state_tras[3], recstart_tmp, send_state[0], recstart, send_state[1], div8_rec_reg[0], div8_rec_reg[1], send_state[2], div8_rec_reg[2], key_entry2, state_rec[2], state_tras[2], state_rec[3], rxd_buf[7], trasstart, div8_tras_reg[0], rxd_buf[6], div8_tras_reg[1], rxd_buf[5], div8_tras_reg[2], rxd_buf[4], rxd_buf[3], state_tras[1], rxd_buf[2], rxd_buf[1], rxd_buf[0], txd_buf[6], txd_buf[5], txd_buf[4], txd_buf[3], txd_buf[2], txd_buf[1], txd_buf[0], txd_reg ;
; B ; LC26 ; clk, rst, div_reg[12], div_reg[11], div_reg[10], div_reg[9], div_reg[8], div_reg[3], div_reg[2], div_reg[7], div_reg[6], div_reg[1], div_reg[0], div_reg[5], div_reg[4] ; div_reg[2], div_reg[14], div_reg[15], clkbaud8x, reduce_nor~133sexp ;
; B ; LC27 ; clk, rst, div_reg[11], div_reg[10], div_reg[9], div_reg[8], div_reg[3], div_reg[2], div_reg[7], div_reg[6], div_reg[1], div_reg[0], div_reg[5], div_reg[4] ; div_reg[2], div_reg[13], div_reg[14], div_reg[15], clkbaud8x, reduce_nor~133sexp ;
; B ; LC29 ; clk, rst, div_reg[10], div_reg[9], div_reg[8], div_reg[3], div_reg[2], div_reg[7], div_reg[6], div_reg[1], div_reg[0], div_reg[5], div_reg[4] ; div_reg[2], div_reg[12], div_reg[13], div_reg[14], div_reg[15], clkbaud8x, reduce_nor~133sexp ;
; B ; LC30 ; clk, rst, div_reg[9], div_reg[8], div_reg[3], div_reg[2], div_reg[7], div_reg[6], div_reg[1], div_reg[0], div_reg[5], div_reg[4] ; div_reg[2], div_reg[11], div_reg[12], div_reg[13], div_reg[14], div_reg[15], clkbaud8x, reduce_nor~133sexp ;
; B ; LC28 ; clk, rst, div_reg[8], div_reg[3], div_reg[2], div_reg[7], div_reg[6], div_reg[1], div_reg[0], div_reg[5], div_reg[4] ; div_reg[2], div_reg[10], div_reg[11], div_reg[12], div_reg[13], div_reg[14], div_reg[15], clkbaud8x, reduce_nor~133sexp ;
; B ; LC25 ; clk, rst, lpm_add_sub:add_rtl_0|addcore:adder[1]|unreg_result[0]~21, reduce_nor~133sexp ; div_reg[2], lpm_add_sub:add_rtl_0|addcore:adder[1]|unreg_result[0]~21, div_reg[9], div_reg[10], div_reg[11], div_reg[12], div_reg[13], div_reg[14], div_reg[15], clkbaud8x, reduce_nor~133sexp ;
; B ; LC22 ; div_reg[3], div_reg[2], div_reg[7], div_reg[6], div_reg[1], div_reg[0], div_reg[5], div_reg[4], div_reg[8] ; div_reg[8] ;
; B ; LC20 ; clk, rst, div_reg[6], div_reg[5], div_reg[4], div_reg[3], div_reg[2], div_reg[1], div_reg[0] ; div_reg[2], lpm_add_sub:add_rtl_0|addcore:adder[1]|unreg_result[0]~21, div_reg[9], div_reg[10], div_reg[11], div_reg[12], div_reg[13], div_reg[14], div_reg[15], clkbaud8x, reduce_nor~133sexp ;
; B ; LC24 ; clk, rst, div_reg[5], div_reg[4], div_reg[3], div_reg[2], div_reg[1], div_reg[0] ; div_reg[2], div_reg[7], lpm_add_sub:add_rtl_0|addcore:adder[1]|unreg_result[0]~21, div_reg[9], div_reg[10], div_reg[11], div_reg[12], div_reg[13], div_reg[14], div_reg[15], clkbaud8x, reduce_nor~133sexp ;
; B ; LC19 ; clk, rst, div_reg[4], div_reg[3], div_reg[2], div_reg[1], div_reg[0] ; div_reg[2], div_reg[6], div_reg[7], lpm_add_sub:add_rtl_0|addcore:adder[1]|unreg_result[0]~21, div_reg[9], div_reg[10], div_reg[11], div_reg[12], div_reg[13], div_reg[14], div_reg[15], clkbaud8x, reduce_nor~133sexp ;
; B ; LC18 ; clk, rst, div_reg[3], div_reg[2], div_reg[1], div_reg[0] ; div_reg[2], div_reg[5], div_reg[6], div_reg[7], lpm_add_sub:add_rtl_0|addcore:adder[1]|unreg_result[0]~21, div_reg[9], div_reg[10], div_reg[11], div_reg[12], div_reg[13], div_reg[14], div_reg[15], clkbaud8x, reduce_nor~133sexp ;
; B ; LC32 ; clk, rst, div_reg[2], div_reg[1], div_reg[0] ; div_reg[2], div_reg[4], div_reg[5], div_reg[6], div_reg[7], lpm_add_sub:add_rtl_0|addcore:adder[1]|unreg_result[0]~21, div⌨️ 快捷键说明
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