dout_mux.vhd

8255的vhdl 程序

LIBRARY ieee;
USE ieee.std_logic_1164.ALL;

ENTITY dout_mux IS
   PORT(
      DOUTSelect  : IN std_logic_vector (2 DOWNTO 0);
      ControlReg  : IN std_logic_vector (7 DOWNTO 0);
      PortAInReg  : IN std_logic_vector (7 DOWNTO 0);
      PAIN        : IN std_logic_vector (7 DOWNTO 0);
      PortBInReg  : IN std_logic_vector (7 DOWNTO 0);
      PBIN        : IN std_logic_vector (7 DOWNTO 0);
      PortCStatus : IN std_logic_vector (7 DOWNTO 0);
      DOUT        : OUT std_logic_vector(7 DOWNTO 0)
   );

END dout_mux;


ARCHITECTURE rtl OF dout_mux IS

   BEGIN
      mux_proc : PROCESS( DOUTSelect, PAIN, PortAInReg, PBIN, PortBInReg, PortCStatus, ControlReg, DOUTSelect)
         BEGIN

            CASE DOUTSelect IS

               WHEN "000" => 
                   DOUT <= PAIN;

               WHEN "001" =>                
                   DOUT <= PortAInReg;

               WHEN "010" =>                
                   DOUT <= PBIN;

               WHEN "011" =>                
                   DOUT <= PortBInReg;

               WHEN "100" =>                
                   DOUT <= PortCStatus;

               WHEN "110" =>                
                   DOUT <= ControlReg;

               WHEN OTHERS =>
                   DOUT <= "11111111";

             END CASE;

      END PROCESS mux_proc;

   END rtl;