fre_test.v

本代码为一个相位控制器的源程序

module fre_test(clk,clk_out);
input clk;
output clk_out;
reg clk_out;
reg[15:0] count;
always@(posedge clk)
begin
	count=count+1;
	if(count==1000)
	begin
		clk_out=~clk_out;
		count=0;
	end
	
end
endmodule