jtdtest02.rpt

在maxplusII平台上开发的一个交通等内核

-- synthesized logic cell 
_LC4_C11 = LCELL(!minute2);

-- Node name is ':517' 
-- Equation name is '_LC1_C2', type is buried 
_LC1_C2  = LCELL( _EQ037);
  _EQ037 = !_LC7_C11 &  minuteo5
         #  _LC4_C11;

-- Node name is ':518' 
-- Equation name is '_LC6_C6', type is buried 
_LC6_C6  = LCELL( _EQ038);
  _EQ038 = !minute1 & !minute2
         #  minute0 & !minute1
         #  minuteo4 &  minute0 &  minute2;

-- Node name is '~519~1' 
-- Equation name is '~519~1', location is LC1_C11, type is buried.
-- synthesized logic cell 
_LC1_C11 = LCELL( _EQ039);
  _EQ039 = !minute0 & !minute2
         # !minute1;

-- Node name is ':519' 
-- Equation name is '_LC1_C10', type is buried 
_LC1_C10 = LCELL( _EQ040);
  _EQ040 = !_LC7_C11 &  minuteo3
         #  _LC1_C11;

-- Node name is '~520~1' 
-- Equation name is '~520~1', location is LC5_C12, type is buried.
-- synthesized logic cell 
_LC5_C12 = LCELL( _EQ041);
  _EQ041 = !minute0 &  minute2
         #  minuteo2 & !minute2
         #  minuteo2 & !minute0
         #  minuteo2 &  minute1;

-- Node name is ':521' 
-- Equation name is '_LC3_C6', type is buried 
_LC3_C6  = LCELL( _EQ042);
  _EQ042 = !minute1 &  minute2
         #  minute0 &  minute1 & !minute2
         # !minute0 & !minute1
         # !minute0 &  minute2
         #  minuteo1 &  minute2;

-- Node name is ':2391' 
-- Equation name is '_LC7_C10', type is buried 
!_LC7_C10 = _LC7_C10~NOT;
_LC7_C10~NOT = LCELL( _EQ043);
  _EQ043 = !_LC3_C13 & !_LC4_C13;

-- Node name is '~2401~1' 
-- Equation name is '~2401~1', location is LC4_C13, type is buried.
-- synthesized logic cell 
!_LC4_C13 = _LC4_C13~NOT;
_LC4_C13~NOT = LCELL( _EQ044);
  _EQ044 =  _LC6_C13
         #  _LC1_C13
         #  _LC2_C13 &  _LC7_C13
         # !_LC2_C13 & !_LC7_C13;

-- Node name is '~2401~2' 
-- Equation name is '~2401~2', location is LC3_C13, type is buried.
-- synthesized logic cell 
_LC3_C13 = LCELL( _EQ045);
  _EQ045 = !_LC1_C13 &  _LC6_C13 & !_LC7_C13;

-- Node name is '~2465~1' 
-- Equation name is '~2465~1', location is LC8_C11, type is buried.
-- synthesized logic cell 
_LC8_C11 = LCELL( _EQ046);
  _EQ046 =  _LC2_C11 &  _LC4_C13
         #  _LC3_C11 & !_LC3_C13 & !_LC4_C13;

-- Node name is '~2466~1' 
-- Equation name is '~2466~1', location is LC8_C3, type is buried.
-- synthesized logic cell 
_LC8_C3  = LCELL( _EQ047);
  _EQ047 =  _LC1_C6 &  _LC4_C13
         #  _LC2_C3 & !_LC3_C13 & !_LC4_C13;

-- Node name is '~2467~1' 
-- Equation name is '~2467~1', location is LC8_C2, type is buried.
-- synthesized logic cell 
_LC8_C2  = LCELL( _EQ048);
  _EQ048 =  _LC1_C2 &  _LC4_C13
         # !_LC3_C13 &  _LC4_C2 & !_LC4_C13;

-- Node name is '~2468~1' 
-- Equation name is '~2468~1', location is LC8_C4, type is buried.
-- synthesized logic cell 
_LC8_C4  = LCELL( _EQ049);
  _EQ049 =  _LC4_C13 &  _LC6_C6
         #  _LC1_C4 & !_LC3_C13 & !_LC4_C13;

-- Node name is '~2469~1' 
-- Equation name is '~2469~1', location is LC8_C10, type is buried.
-- synthesized logic cell 
_LC8_C10 = LCELL( _EQ050);
  _EQ050 =  _LC1_C10 &  _LC4_C13
         #  _LC3_C10 & !_LC3_C13 & !_LC4_C13;

-- Node name is '~2470~1' 
-- Equation name is '~2470~1', location is LC7_C12, type is buried.
-- synthesized logic cell 
_LC7_C12 = LCELL( _EQ051);
  _EQ051 =  _LC3_C12 &  _LC3_C13
         # !_LC3_C13 & !_LC4_C13 &  _LC8_C12;

-- Node name is '~2471~1' 
-- Equation name is '~2471~1', location is LC4_C9, type is buried.
-- synthesized logic cell 
_LC4_C9  = LCELL( _EQ052);
  _EQ052 =  _LC3_C6 &  _LC4_C13
         # !_LC3_C13 & !_LC4_C13 &  _LC7_C9;

-- Node name is '~2472~1' 
-- Equation name is '~2472~1', location is LC6_C10, type is buried.
-- synthesized logic cell 
_LC6_C10 = LCELL( _EQ053);
  _EQ053 =  _LC4_C13 & !_LC7_C11 &  minuteo0
         #  _LC1_C11 &  _LC4_C13;

-- Node name is '~2472~2' 
-- Equation name is '~2472~2', location is LC5_C3, type is buried.
-- synthesized logic cell 
_LC5_C3  = LCELL( _EQ054);
  _EQ054 =  _LC3_C13 & !_LC6_C2 &  secondo0
         #  _LC1_C3 &  _LC3_C13;

-- Node name is ':2559' 
-- Equation name is '_LC3_C11', type is buried 
_LC3_C11 = DFFE( _EQ055, GLOBAL( clk),  VCC,  VCC,  VCC);
  _EQ055 =  _LC3_C13 & !_LC6_C2 &  secondo7
         #  _LC8_C11;

-- Node name is ':2560' 
-- Equation name is '_LC2_C3', type is buried 
_LC2_C3  = DFFE( _EQ056, GLOBAL( clk),  VCC,  VCC,  VCC);
  _EQ056 =  _LC8_C3
         #  _LC3_C13 &  _LC6_C3;

-- Node name is ':2561' 
-- Equation name is '_LC4_C2', type is buried 
_LC4_C2  = DFFE( _EQ057, GLOBAL( clk),  VCC,  VCC,  VCC);
  _EQ057 =  _LC8_C2
         #  _LC3_C13 &  _LC5_C2;

-- Node name is ':2562' 
-- Equation name is '_LC1_C4', type is buried 
_LC1_C4  = DFFE( _EQ058, GLOBAL( clk),  VCC,  VCC,  VCC);
  _EQ058 =  _LC8_C4
         #  _LC3_C13 &  _LC4_C4;

-- Node name is ':2563' 
-- Equation name is '_LC3_C10', type is buried 
_LC3_C10 = DFFE( _EQ059, GLOBAL( clk),  VCC,  VCC,  VCC);
  _EQ059 =  _LC8_C10
         #  _LC2_C4 &  _LC3_C13;

-- Node name is ':2564' 
-- Equation name is '_LC8_C12', type is buried 
_LC8_C12 = DFFE( _EQ060, GLOBAL( clk),  VCC,  VCC,  VCC);
  _EQ060 =  _LC7_C12
         #  _LC4_C11 &  _LC4_C13
         #  _LC4_C13 &  _LC5_C12;

-- Node name is ':2565' 
-- Equation name is '_LC7_C9', type is buried 
_LC7_C9  = DFFE( _EQ061, GLOBAL( clk),  VCC,  VCC,  VCC);
  _EQ061 =  _LC1_C9 &  _LC3_C13
         #  _LC3_C13 &  _LC7_C7
         #  _LC4_C9;

-- Node name is ':2566' 
-- Equation name is '_LC5_C10', type is buried 
_LC5_C10 = DFFE( _EQ062, GLOBAL( clk),  VCC,  VCC,  VCC);
  _EQ062 =  _LC6_C10
         #  _LC5_C10 & !_LC7_C10
         #  _LC5_C3;



Project Information                                    d:\dragon\jtdtest02.rpt

** COMPILATION SETTINGS & TIMES **

Processing Menu Commands
------------------------

Design Doctor                             = off

Logic Synthesis:

   Synthesis Type Used                    = Multi-Level

   Default Synthesis Style                = NORMAL

      Logic option settings in 'NORMAL' style for 'FLEX10K' family

      CARRY_CHAIN                         = ignore
      CARRY_CHAIN_LENGTH                  = 32
      CASCADE_CHAIN                       = ignore
      CASCADE_CHAIN_LENGTH                = 2
      DECOMPOSE_GATES                     = on
      DUPLICATE_LOGIC_EXTRACTION          = on
      MINIMIZATION                        = full
      MULTI_LEVEL_FACTORING               = on
      NOT_GATE_PUSH_BACK                  = on
      REDUCE_LOGIC                        = on
      REFACTORIZATION                     = on
      REGISTER_OPTIMIZATION               = on
      RESYNTHESIZE_NETWORK                = on
      SLOW_SLEW_RATE                      = off
      SUBFACTOR_EXTRACTION                = on
      IGNORE_SOFT_BUFFERS                 = on
      USE_LPM_FOR_AHDL_OPERATORS          = off

   Other logic synthesis settings:

      Automatic Global Clock              = on
      Automatic Global Clear              = on
      Automatic Global Preset             = on
      Automatic Global Output Enable      = on
      Automatic Fast I/O                  = off
      Automatic Register Packing          = off
      Automatic Open-Drain Pins           = on
      Automatic Implement in EAB          = off
      Optimize                            = 5

Default Timing Specifications: None

Cut All Bidir Feedback Timing Paths       = on
Cut All Clear & Preset Timing Paths       = on

Ignore Timing Assignments                 = off

Functional SNF Extractor                  = off

Linked SNF Extractor                      = off
Timing SNF Extractor                      = on
Optimize Timing SNF                       = off
Generate AHDL TDO File                    = off
Fitter Settings                           = NORMAL
Use Quartus Fitter                        = on
Smart Recompile                           = off
Total Recompile                           = off

Interfaces Menu Commands
------------------------

EDIF Netlist Writer                       = off
Verilog Netlist Writer                    = off
VHDL Netlist Writer                       = off

Compilation Times
-----------------

   Compiler Netlist Extractor             00:00:00
   Database Builder                       00:00:01
   Logic Synthesizer                      00:00:00
   Partitioner                            00:00:00
   Fitter                                 00:00:02
   Timing SNF Extractor                   00:00:00
   Assembler                              00:00:01
   --------------------------             --------
   Total Time                             00:00:04


Memory Allocated
-----------------

Peak memory allocated during compilation  = 15,455K