📄 hardware.lst
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//
// Ex: F_SACM_A2000_Initial:
// ...
// call F_SP_SACM_A2000_Init_ : S480/S240/MS01 is same
// ...
// retf
////////////////////////////////////////////////////////////////////////////////
F_SP_SACM_A2000_Init_:
0000B2FB 40 92 r1=0x0000; // 24MHz, Fcpu=Fosc
0000B2FC 19 D3 13 70 [P_SystemClock]=r1 // Frequency 20MHz
0000B2FE 70 92 r1 = 0x0030 // TimerA CKA=Fosc/2 CKB=1 Tout:off
0000B2FF 19 D3 0B 70 [P_TimerA_Ctrl] = r1 // Initial Timer A
0000B301 09 93 00 FD r1 = 0xfd00 // 16K
0000B303 19 D3 0A 70 [P_TimerA_Data] = r1
0000B305 09 93 A8 00 r1 = 0x00A8 // Set the DAC Ctrl
0000B307 19 D3 2A 70 [P_DAC_Ctrl] = r1
0000B309 09 93 FF FF r1 = 0xffff
0000B30B 19 D3 11 70 [P_INT_Clear] = r1 // Clear interrupt occuiped events
0000B30D 40 92 r1 =0x0000 //
// r1 = [R_InterruptStatus] //
0000B30E 11 93 2D 70 r1 = [P_INT_Mask]
0000B310 09 A3 00 20 r1 |= C_FIQ_TMA // Enable Timer A FIQ
//R1 |= C_IRQ4_1KHz
// [R_InterruptStatus] = r1 //
0000B312 19 D3 10 70 [P_INT_Ctrl] = r1 //
0000B314 90 9A RETF
//////////////////////////////////////////////////////////////////
// Function: The partial code of hardware setting of SACM_S480_Initial()
// or F_SACM_S480_Initial:
//////////////////////////////////////////////////////////////////
F_SP_SACM_S480_Init_:
0000B315 40 92 r1 = 0x0000 // 24MHz Fosc
0000B316 19 D3 13 70 [P_SystemClock]=r1 // Initial System Clock
0000B318 70 92 r1=0x0030 // TimerA CKA=Fosc/2 CKB=1 Tout:off
0000B319 19 D3 0B 70 [P_TimerA_Ctrl]=r1 // Initial Timer A
//R1 = 0xfd00 // 16K
0000B31B 09 93 ED FC r1 = 0xfced // 15.625K
0000B31D 19 D3 0A 70 [P_TimerA_Data]=r1
0000B31F 09 93 A8 00 r1 = 0x00A8 //
0000B321 19 D3 2A 70 [P_DAC_Ctrl] = r1 //
0000B323 09 93 FF FF r1 = 0xffff
0000B325 19 D3 11 70 [P_INT_Clear] = r1 // Clear interrupt occuiped events
// R1 = [R_InterruptStatus] //
0000B327 11 93 2D 70 r1 = [P_INT_Mask]
0000B329 09 A3 00 20 r1 |= C_FIQ_TMA // Enable Timer A FIQ
//R1 |= C_IRQ4_1KHz // Enable 1KHz IRQ4 for S480 decoder
// [R_InterruptStatus] = r1 //
0000B32B 19 D3 10 70 [P_INT_Ctrl] = r1 //
0000B32D 90 9A RETF
//////////////////////////////////////////////////////////////////
// Function: The partial code of hardware setting of SACM_S240_Initial()
// or F_SACM_S240_Initial:
//////////////////////////////////////////////////////////////////
F_SP_SACM_S240_Init_:
0000B32E 60 92 r1=0x0020;
0000B32F 19 D3 13 70 [P_SystemClock]=r1
0000B331 09 93 A8 00 r1 = 0x00A8; //
0000B333 19 D3 2A 70 [P_DAC_Ctrl]= r1
0000B335 70 92 r1 = 0x0030; // TimerA CKA=Fosc/2 CKB=1 Tout:off
0000B336 19 D3 0B 70 [P_TimerA_Ctrl] = r1;
0000B338 09 93 00 FE r1 = 0xfe00; // 24K
0000B33A 19 D3 0A 70 [P_TimerA_Data] = r1;
0000B33C 09 93 FF FF r1 = 0xffff
0000B33E 19 D3 11 70 [P_INT_Clear] = r1 // Clear interrupt occuiped events
// r1 = [R_InterruptStatus] //
0000B340 11 93 2D 70 r1 = [P_INT_Mask]
0000B342 09 A3 00 20 r1 |= C_FIQ_TMA // Enable Timer A FIQ
// [R_InterruptStatus] = r1 //
0000B344 19 D3 10 70 [P_INT_Ctrl] = r1 //
0000B346 90 9A RETF
//////////////////////////////////////////////////////////////////
// Function: The partial code of hardware setting of SACM_MS01_Initial()
// or F_SACM_MS01_Initial:
//
// Ex: F_SACM_MS01_Initial:
// ...
// call F_SP_SACM_MS01_Init_
// call F_SP_Play_Mode0/1/2/3 ->0,1,2,3 depending on the para1
// ...
// retf
//////////////////////////////////////////////////////////////////
F_SP_SACM_MS01_Init_:
0000B347 40 92 r1 = 0x0000; // 24MHz, Fcpu=Fosc
0000B348 19 D3 13 70 [P_SystemClock] = r1; // Initial System Clock
0000B34A 70 92 r1 = 0x0030; // TimerA CKA=Fosc/2 CKB=1 Tout:off
0000B34B 19 D3 0B 70 [P_TimerA_Ctrl] = r1 // Initial Timer A
//R1 = 0x0003 // 8K
0000B34D 40 92 r1 = 0x0000 // Fosc/2
0000B34E 19 D3 0D 70 [P_TimerB_Ctrl] = r1; // Initial Timer B -> 8192
//R1 = 0xFFFF
0000B350 09 93 00 FA r1 = 0xFA00 // Any time for ADPCM channel 0,1
0000B352 19 D3 0C 70 [P_TimerB_Data] = r1 // 8K sample rate
0000B354 09 93 FF FF r1 = 0xffff
0000B356 19 D3 11 70 [P_INT_Clear] = r1 // Clear interrupt occuiped events
0000B358 90 9A RETF
//........................................
F_SP_PlayMode0_: // with F_SP_SACM_MS01_Initial
0000B359 46 92 r1 = 0x0006
0000B35A 19 D3 2A 70 [P_DAC_Ctrl] = r1
0000B35C 09 93 00 FE r1 = 0xFE00
0000B35E 19 D3 0A 70 [P_TimerA_Data] = r1 //
// r1 = [R_InterruptStatus] //
0000B360 11 93 2D 70 r1 = [P_INT_Mask]
0000B362 09 A3 10 84 r1 |= C_FIQ_PWM+C_IRQ2_TMB+C_IRQ4_1KHz
// [R_InterruptStatus] = r1 //
0000B364 19 D3 10 70 [P_INT_Ctrl] = r1 //
0000B366 90 9A RETF
F_SP_PlayMode1_: // with F_SP_SACM_MS01_Initial
0000B367 09 93 A8 00 r1 = 0x00A8
0000B369 19 D3 2A 70 [P_DAC_Ctrl] = r1
0000B36B 09 93 00 FE r1 = 0xFE00
0000B36D 19 D3 0A 70 [P_TimerA_Data] = r1 //
// r1 = [R_InterruptStatus] //
0000B36F 11 93 2D 70 r1 = [P_INT_Mask]
0000B371 09 A3 10 24 r1 |= C_FIQ_TMA+C_IRQ2_TMB+C_IRQ4_1KHz
// [R_InterruptStatus] = r1 //
0000B373 19 D3 10 70 [P_INT_Ctrl] = r1 //
0000B375 90 9A RETF
F_SP_PlayMode2_: // with F_SP_SACM_MS01_Initial
0000B376 09 93 A8 00 r1 = 0x00A8
0000B378 19 D3 2A 70 [P_DAC_Ctrl] = r1
0000B37A 09 93 9A FD r1 = 0xFD9A
0000B37C 19 D3 0A 70 [P_TimerA_Data] = r1 //
// r1 = [R_InterruptStatus] //
0000B37E 11 93 2D 70 r1 = [P_INT_Mask]
0000B380 09 A3 10 24 r1 |= C_FIQ_TMA+C_IRQ2_TMB+C_IRQ4_1KHz
// [R_InterruptStatus] = r1 //
0000B382 19 D3 10 70 [P_INT_Ctrl] = r1 //
0000B384 90 9A RETF
F_SP_PlayMode3_: // with F_SP_SACM_MS01_Initial
0000B385 09 93 A8 00 r1 = 0x00A8
0000B387 19 D3 2A 70 [P_DAC_Ctrl] = r1
0000B389 09 93 00 FD r1 = 0xFD00
0000B38B 19 D3 0A 70 [P_TimerA_Data] = r1 //
// r1 = [R_InterruptStatus] //
0000B38D 11 93 2D 70 r1 = [P_INT_Mask]
// r1 |= C_FIQ_TMA+C_IRQ2_TMB+C_IRQ4_1KHz
// [R_InterruptStatus] = r1 //
0000B38F 19 D3 10 70 [P_INT_Ctrl] = r1 //
0000B391 90 9A RETF
///////////////////////////////////////////////////////////////////////////////
// Function: The partial code of hardware setting of SACM_MS01_Initial()
// or F_SACM_MS01_Initial:
//
// Ex: F_SACM_DVR_Initial:
// ...
// call F_SP_SACM_DVR_Init_
// call F_SP_Play_Mode0/1/2/3 ->0,1,2,3 depending on the para1
// ...
// retf
// Ex1:
// F_SACM_DVR_Record: (or F_SACM_DVR_InitEncoder)
// ...
// call F_SP_SACM_DVR_Rec_Init
// ...
// retf
// Ex2:
// F_SACM_DVR_Play: (or F_SACM_DVR_InitDecoder)
// ...
// call F_SP_SACM_DVR_Play_Init_
// ...
// retf
///////////////////////////////////////////////////////////////////////////////
F_SP_SACM_DVR_Init_:
0000B392 40 92 r1 = 0x0000; // 24MHz, Fcpu=Fosc
0000B393 19 D3 13 70 [P_SystemClock] = r1; // Frequency 20MHz
0000B395 70 92 r1 = 0x0030; // TimerA CKA=Fosc/2 CKB=1 Tout:off
0000B396 19 D3 0B 70 [P_TimerA_Ctrl] = r1;
0000B398 09 93 00 FA r1 = 0xfa00; // 8K @ 24.576MHz
//r1 = 0xfb1d; // 8K @ 20MHz
0000B39A 19 D3 0A 70 [P_TimerA_Data] = r1;
0000B39C 75 92 r1 = 0x0035; // ADINI should be open (107)
0000B39D 19 D3 15 70 [P_ADC_Ctrl] = r1;
0000B39F 09 93 A8 00 r1 = 0x00A8; // Set the DA Ctrl
0000B3A1 19 D3 2A 70 [P_DAC_Ctrl] = r1;
0000B3A3 09 93 FF FF r1 = 0xffff;
0000B3A5 19 D3 11 70 [P_INT_Clear] = r1; // Clear interrupt occuiped events
// r1 = [R_InterruptStatus] //
0000B3A7 11 93 2D 70 r1 = [P_INT_Mask]
0000B3A9 09 A3 00 20 r1 |= C_FIQ_TMA // Enable Timer A FIQ
// [R_InterruptStatus] = r1 //
0000B3AB 19 D3 10 70 [P_INT_Ctrl] = r1 //
0000B3AD 90 9A RETF
F_SP_SACM_DVR_Rec_Init_: // call by SACM_DVR_Record / SACM_DVR_InitEncoder
0000B3AE 75 92 r1 = 0x0035; //mic input
//r1 = 0x0037 //line_in input
0000B3AF 19 D3 15 70 [P_ADC_Ctrl] = r1; //enable ADC
0000B3B1 09 93 00 FE r1=0xfe00; //24K @ 24.576MHz
0000B3B3 19 D3 0A 70 [P_TimerA_Data] = r1
0000B3B5 90 9A RETF
F_SP_SACM_DVR_Play_Init_:
0000B3B6 40 92 r1 = 0x0000 // call by SACM_DVR_Stop / SACM_DVR_Play
0000B3B7 19 D3 15 70 [P_ADC_Ctrl] = r1; // Disable ADC
0000B3B9 09 93 00 FD r1 = 0xfd00; // 16K @ 24.576MHz
0000B3BB 19 D3 0A 70 [P_TimerA_Data] = r1;
0000B3BD 90 9A RETF
///////////////////////////////////////////////////////////////////////////////
// Function: Extra Functions provided by Sunplus
// Type:
// 1. DAC Ramp up/down
// 2. IO config/import/export
// 3. Get resource data
//
//
///////////////////////////////////////////////////////////////////////////////
////////////////////////////////////////////////////////
// Function: Ramp Up/Down to avoid speaker "pow" noise
// Destory: R1,R2
////////////////////////////////////////////////////////
_SP_RampUpDAC1: .PROC
F_SP_RampUpDAC1:
0000B3BE 90 D4 push r1,r2 to [sp]
0000B3BF 11 93 17 70 r1=[P_DAC1]
0000B3C1 09 B3 C0 FF r1 &= ~0x003f
0000B3C3 09 43 00 80 cmp r1,0x8000
0000B3C5 0E 0E jb L_RU_NormalUp
0000B3C6 19 5E je L_RU_End
L_RU_DownLoop:
0000B3C7 40 F0 2A B4 call F_Delay
0000B3C9 41 94 r2 = 0x0001
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