gal_300f.vt

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// Jed2vlog, ispLEVER version 5.01 
// Header :
//    File Name :
//       gal_300f 
//    Circuit Name :
//       gal_300f 
//    Last Update :
//       Sun Dec 03 17:52:02 2006
//    Device Information :
//       PLD Type P16V8AS
//    Delay Model Selected :TYP
//    Jedec Information :
//	ispLEVER 5.1.02.70.06.06.SP2006.02 Lattice Semiconductor Corp.
//	JEDEC file for: P16V8AS V9.0
//	Created on: Sun Dec 03 17:51:58 2006
//	
//	gal_300f.bls 
//	
// endHeader


// Delay Assigments
`timescale 1ns /100ps
//----------------------------------------------------------------------//
//                                                                      //
//              MAIN PLD NETLIST MODULE                                 //
//                                                                      //
//----------------------------------------------------------------------//

module gal_300f(POW1,POW0,RD,WR,A0,A1,A2,PIN08,PIN09,PIN10,PIN11,PIN12,PIN13,
             PIN14,CS0,CS2,PIN17,POW_EN,CS1,PIN20);
	output CS0, CS2;
	inout PIN12,PIN13,PIN14,PIN17, POW_EN, CS1;
	input POW1, POW0, RD, WR, A0, A1, A2, PIN08, PIN09, PIN10, PIN11, PIN20;
	supply0 GND;
	supply1 PWR;

//Pin Assignments:
//        PIN01 = POW1;
//        PIN02 = POW0;
//        PIN03 = RD;
//        PIN04 = WR;
//        PIN05 = A0;
//        PIN06 = A1;
//        PIN07 = A2;
//        PIN15 = CS0;
//        PIN16 = CS2;
//        PIN18 = POW_EN;
//        PIN19 = CS1;

// Delay Parameters:
//   TYP delay used
parameter tpLH06 = 0:0:0;
parameter tpHL06 = 0:0:0;
parameter tpLH09 = 0:0:0;
parameter tpHL09 = 0:0:0;
parameter tpLH12 = 0:0:0;
parameter tpHL12 = 0:0:0;
parameter tpLH03 = 0:0:0;
parameter tpHL03 = 0:0:0;
parameter tpLH05 = 0:0:0;
parameter tpHL05 = 0:0:0;
parameter tpLH_inco_lump = 3:9:15;
parameter tpHL_inco_lump = 3:9:15;
parameter tpLH_oe = 15:15:15;
parameter tpHL_oe = 15:15:15;
parameter tpLH_oe_pterm = 15:15:15;
parameter tpHL_oe_pterm = 15:15:15;

//   Input Buffer:
	andinv_gal_300f  INBUF01( INBUF01_o, INBUF01_ob, POW1);
	andinv_gal_300f  INBUF02( INBUF02_o, INBUF02_ob, POW0);
	andinv_gal_300f  INBUF03( INBUF03_o, INBUF03_ob, RD);
	andinv_gal_300f  INBUF04( INBUF04_o, INBUF04_ob, WR);
	andinv_gal_300f  INBUF05( INBUF05_o, INBUF05_ob, A0);
	andinv_gal_300f  INBUF06( INBUF06_o, INBUF06_ob, A1);
	andinv_gal_300f  INBUF07( INBUF07_o, INBUF07_ob, A2);
	andinv_gal_300f  INBUF08( INBUF08_o, INBUF08_ob, PIN08);
	andinv_gal_300f  INBUF09( INBUF09_o, INBUF09_ob, PIN09);
	andinv_gal_300f  INBUF11( INBUF11_o, INBUF11_ob, PIN11);
	andinv_gal_300f  INBUF12( INBUF12_o, INBUF12_ob, PIN12);
	andinv_gal_300f  INBUF13( INBUF13_o, INBUF13_ob, PIN13);
	andinv_gal_300f  INBUF14( INBUF14_o, INBUF14_ob, PIN14);
	andinv_gal_300f  INBUF17( INBUF17_o, INBUF17_ob, PIN17);
	andinv_gal_300f  INBUF18( INBUF18_o, INBUF18_ob, POW_EN);
	andinv_gal_300f  INBUF19( INBUF19_o, INBUF19_ob, CS1);

//   Product Terms (AND array):
	and  #(tpLH03,tpHL03) PT000_0( PT000_0_o, INBUF03_ob, INBUF05_ob, INBUF06_o, INBUF07_ob);
	and  #(tpLH03,tpHL03) PT008_256( PT008_256_o, INBUF02_ob, INBUF01_ob);
	and  #(tpLH03,tpHL03) PT024_768( PT024_768_o, INBUF05_ob, INBUF06_ob, INBUF07_o);
	and  #(tpLH03,tpHL03) PT032_1024( PT032_1024_o, INBUF04_ob, INBUF05_o, INBUF06_ob, INBUF07_ob);

//   Sum Terms (OR arrray):
	or  #(tpLH_inco_lump,tpHL_inco_lump) ST015( ST015_o, PT032_1024_o);
	or  #(tpLH_inco_lump,tpHL_inco_lump) ST016( ST016_o, PT024_768_o);
	or  #(tpLH_inco_lump,tpHL_inco_lump) ST018( ST018_o, PT008_256_o);
	xor  #(tpLH06,tpHL06) XOR018( XOR018_o, ST018_o, PWR);
	or  #(tpLH_inco_lump,tpHL_inco_lump) ST019( ST019_o, PT000_0_o);

//   Macro Cells:

//   Feedback Node:

//   Output Buffer:
	notif1  #(tpLH09,tpHL09) OUTBUF12( PIN12, GND, PWR);
	notif1  #(tpLH09,tpHL09) OUTBUF13( PIN13, GND, PWR);
	notif1  #(tpLH09,tpHL09) OUTBUF14( PIN14, GND, PWR);
	notif1  #(tpLH09,tpHL09) OUTBUF15( CS0, ST015_o, PWR);
	notif1  #(tpLH09,tpHL09) OUTBUF16( CS2, ST016_o, PWR);
	notif1  #(tpLH09,tpHL09) OUTBUF17( PIN17, GND, PWR);
	notif1  #(tpLH09,tpHL09) OUTBUF18( POW_EN, XOR018_o, PWR);
	notif1  #(tpLH09,tpHL09) OUTBUF19( CS1, ST019_o, PWR);
endmodule
/************************************************************************
*                                                                       *
*   MODULE: ANDINV                                                      *
*     Input Buffer with dual outputs.                                   *
*                                                                       *
*************************************************************************/
module andinv_gal_300f(out,outb,in);
output out,outb;
input  in;
parameter tpLH_iob = 0:0:0; 
parameter tpHL_iob = 0:0:0; 
        
   and #(tpLH_iob,tpHL_iob) n1(out,in);
   not #(tpLH_iob,tpHL_iob) n2(outb,in);
endmodule