gal_300f.tcl

一个组合逻辑实例,完成地址选择,读写信号产生等时序

########## Tcl recorder starts at 06/16/06 23:19:18 ##########

set version "5.1"
set proj_dir "I:/gal_300f"
cd $proj_dir

# Get directory paths
set pver $version
regsub -all {\.} $pver {_} pver
set lscfile "lsc_"
append lscfile $pver ".ini"
set lsvini_dir [lindex [array get env LSC_INI_PATH] 1]
set lsvini_path [file join $lsvini_dir $lscfile]
if {[catch {set fid [open $lsvini_path]} msg]} {
	 puts "File Open Error: $lsvini_path"
	 return false
} else {set data [read $fid]; close $fid }
foreach line [split $data '\n'] { 
	set lline [string tolower $line]
	set lline [string trim $lline]
	if {[string compare $lline "\[paths\]"] == 0} { set path 1; continue}
	if {$path && [regexp {^\[} $lline]} {set path 0; break}
	if {$path && [regexp {^bin} $lline]} {set cpld_bin $line; continue}
	if {$path && [regexp {^fpgapath} $lline]} {set fpga_dir $line}}

set cpld_bin [string range $cpld_bin [expr [string first "=" $cpld_bin]+1] end]
regsub -all "\"" $cpld_bin "" cpld_bin
set cpld_bin [file join $cpld_bin]
set install_dir [string range $cpld_bin 0 [expr [string first "ispcpld" $cpld_bin]-2]]
regsub -all "\"" $install_dir "" install_dir
set install_dir [file join $install_dir]
set fpga_dir [string range $fpga_dir [expr [string first "=" $fpga_dir]+1] end]
regsub -all "\"" $fpga_dir "" fpga_dir
set fpga_dir [file join $fpga_dir]

switch $tcl_platform(platform) {
   windows {
      set fpga_bin [file join $fpga_dir "bin" "nt"]
	     if {[string match "*$fpga_bin;*" $env(PATH)] == 0 } {
	        set env(PATH) "$fpga_bin;$env(PATH)" } }
   unix {
      set fpga_bin [file join $fpga_dir "bin" "sol"]
      if {[string match "*$fpga_bin;*" $env(PATH)] == 0 } {
         set env(PATH) "$fpga_bin;$env(PATH)"}}}

if {[string match "*$cpld_bin;*" $env(PATH)] == 0 } {
   set env(PATH) "$cpld_bin;$env(PATH)" }

lappend auto_path [file join $install_dir "ispcpld" "tcltk" "lib" "ispwidget" "runproc"]
package require runcmd

# Commands to make the Process: 
# Hierarchy
if [runCmd "\"$cpld_bin/sch2jhd\" \"gal_300f.sch\" "] {
	return
} else {
	vwait done
	if [checkResult $done] {
		return
	}
}

########## Tcl recorder end at 06/16/06 23:19:18 ###########


########## Tcl recorder starts at 06/16/06 23:19:54 ##########

# Commands to make the Process: 
# Hierarchy
if [runCmd "\"$cpld_bin/vhd2jhd\" \"addr_select.vhd\" -o \"addr_select.jhd\" -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] {
	return
} else {
	vwait done
	if [checkResult $done] {
		return
	}
}

########## Tcl recorder end at 06/16/06 23:19:54 ###########


########## Tcl recorder starts at 06/16/06 23:29:42 ##########

# Commands to make the Process: 
# Hierarchy
if [runCmd "\"$cpld_bin/vhd2jhd\" \"addr_select.vhd\" -o \"addr_select.jhd\" -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] {
	return
} else {
	vwait done
	if [checkResult $done] {
		return
	}
}

########## Tcl recorder end at 06/16/06 23:29:42 ###########


########## Tcl recorder starts at 06/16/06 23:31:38 ##########

# Commands to make the Process: 
# Hierarchy
if [runCmd "\"$cpld_bin/sch2jhd\" \"gal_300f.sch\" "] {
	return
} else {
	vwait done
	if [checkResult $done] {
		return
	}
}

########## Tcl recorder end at 06/16/06 23:31:38 ###########


########## Tcl recorder starts at 06/16/06 23:33:33 ##########

# Commands to make the Process: 
# Hierarchy
if [runCmd "\"$cpld_bin/vhd2jhd\" \"addr_select.vhd\" -o \"addr_select.jhd\" -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] {
	return
} else {
	vwait done
	if [checkResult $done] {
		return
	}
}

########## Tcl recorder end at 06/16/06 23:33:34 ###########


########## Tcl recorder starts at 06/16/06 23:34:43 ##########

# Commands to make the Process: 
# Hierarchy
if [runCmd "\"$cpld_bin/vhd2jhd\" \"addr_select.vhd\" -o \"addr_select.jhd\" -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] {
	return
} else {
	vwait done
	if [checkResult $done] {
		return
	}
}

########## Tcl recorder end at 06/16/06 23:34:43 ###########


########## Tcl recorder starts at 06/16/06 23:37:00 ##########

# Commands to make the Process: 
# Hierarchy
if [runCmd "\"$cpld_bin/vhd2jhd\" \"addr_select.vhd\" -o \"addr_select.jhd\" -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] {
	return
} else {
	vwait done
	if [checkResult $done] {
		return
	}
}

########## Tcl recorder end at 06/16/06 23:37:00 ###########


########## Tcl recorder starts at 06/16/06 23:37:10 ##########

# Commands to make the Process: 
# Synplify Synthesize VHDL File
if [catch {open ADDR_SELECT.cmd w} rspFile] {
	puts stderr "Cannot create response file ADDR_SELECT.cmd: $rspFile"
} else {
	puts $rspFile "PROJECT: ADDR_SELECT
working_path: \"$proj_dir\"
module: addr_select
vhdl_file_list: addr_select.vhd
output_file_name: addr_select
suffix_name: edi
"
	close $rspFile
}
if [runCmd "\"$cpld_bin/synpwrap\" -e addr_select -target ispgal"] {
	return
} else {
	vwait done
	if [checkResult $done] {
		return
	}
}
file delete ADDR_SELECT.cmd

########## Tcl recorder end at 06/16/06 23:37:10 ###########


########## Tcl recorder starts at 06/16/06 23:37:50 ##########

# Commands to make the Process: 
# Fit Design
if [runCmd "\"$cpld_bin/sch2blf\" -sup \"gal_300f.sch\" -err automake.err "] {
	return
} else {
	vwait done
	if [checkResult $done] {
		return
	}
}
if [runCmd "\"$cpld_bin/iblflink\" \"gal_300f.bls\" -o \"gal_300f.bl0\" -ipo -family -err automake.err "] {
	return
} else {
	vwait done
	if [checkResult $done] {
		return
	}
}
if [runCmd "\"$cpld_bin/iblifopt\" -i \"gal_300f.bl0\" -o \"gal_300f.bl1\" -red bypin choose -sweep -collapse none -pterms 8 -family -err automake.err "] {
	return
} else {
	vwait done
	if [checkResult $done] {
		return
	}
}
if [runCmd "\"$cpld_bin/edif2blf\" -edf \"addr_select.edi\" -out \"addr_select.bl0\" -err automake.err -log \"addr_select.log\" -prj gal_300f -lib \"$install_dir/ispcpld/dat/mach.edn\" -cvt yes -net_vcc vcc -net_gnd gnd -nbx -dse -tlw"] {
	return
} else {
	vwait done
	if [checkResult $done] {
		return
	}
}
if [runCmd "\"$cpld_bin/iblifopt\" \"addr_select.bl0\" -red bypin choose -collapse -pterms 8 -family -err automake.err "] {
	return
} else {
	vwait done
	if [checkResult $done] {
		return
	}
}
if [runCmd "\"$cpld_bin/iblflink\" \"gal_300f.bl1\" -o \"gal_300f.bl2\" -omod gal_300f -family -err automake.err "] {
	return
} else {
	vwait done
	if [checkResult $done] {
		return
	}
}
if [runCmd "\"$cpld_bin/iblifopt\" gal_300f.bl2 -red bypin choose -sweep -collapse all -pterms 8 -err automake.err "] {
	return
} else {
	vwait done
	if [checkResult $done] {
		return
	}
}
if [runCmd "\"$cpld_bin/idiofft\" gal_300f.bl3 -pla -o gal_300f.tt2 -dev p16v8 -define n -err automake.err "] {
	return
} else {
	vwait done
	if [checkResult $done] {
		return
	}
}
if [runCmd "\"$cpld_bin/fit\" gal_300f.tt2 -dev p16v8 -str -err automake.err "] {
	return
} else {
	vwait done
	if [checkResult $done] {
		return
	}
}

########## Tcl recorder end at 06/16/06 23:37:50 ###########


########## Tcl recorder starts at 06/16/06 23:38:57 ##########

# Commands to make the Process: 
# Hierarchy
if [runCmd "\"$cpld_bin/sch2jhd\" \"gal_300f.sch\" "] {
	return
} else {
	vwait done
	if [checkResult $done] {
		return
	}
}

########## Tcl recorder end at 06/16/06 23:38:58 ###########


########## Tcl recorder starts at 06/16/06 23:39:08 ##########

# Commands to make the Process: 
# Fit Design
if [runCmd "\"$cpld_bin/sch2blf\" -sup \"gal_300f.sch\" -err automake.err "] {
	return
} else {
	vwait done
	if [checkResult $done] {
		return
	}
}
if [runCmd "\"$cpld_bin/iblflink\" \"gal_300f.bls\" -o \"gal_300f.bl0\" -ipo -family -err automake.err "] {
	return
} else {
	vwait done
	if [checkResult $done] {
		return
	}
}
if [runCmd "\"$cpld_bin/iblifopt\" -i \"gal_300f.bl0\" -o \"gal_300f.bl1\" -red bypin choose -sweep -collapse none -pterms 8 -family -err automake.err "] {
	return
} else {
	vwait done
	if [checkResult $done] {
		return
	}
}
if [runCmd "\"$cpld_bin/iblflink\" \"gal_300f.bl1\" -o \"gal_300f.bl2\" -omod gal_300f -family -err automake.err "] {
	return
} else {
	vwait done
	if [checkResult $done] {
		return
	}
}
if [runCmd "\"$cpld_bin/iblifopt\" gal_300f.bl2 -red bypin choose -sweep -collapse all -pterms 8 -err automake.err "] {
	return
} else {
	vwait done
	if [checkResult $done] {
		return
	}
}
if [runCmd "\"$cpld_bin/idiofft\" gal_300f.bl3 -pla -o gal_300f.tt2 -dev p16v8 -define n -err automake.err "] {
	return
} else {
	vwait done
	if [checkResult $done] {
		return
	}
}
if [runCmd "\"$cpld_bin/fit\" gal_300f.tt2 -dev p16v8 -str -err automake.err "] {
	return
} else {
	vwait done
	if [checkResult $done] {
		return
	}
}

########## Tcl recorder end at 06/16/06 23:39:08 ###########


########## Tcl recorder starts at 06/16/06 23:39:29 ##########

# Commands to make the Process: 
# Linked Equations
if [runCmd "\"$cpld_bin/blif2eqn\" \"gal_300f.bl2\" -o \"gal_300f.eq2\" -err automake.err"] {
	return
} else {
	vwait done
	if [checkResult $done] {
		return
	}
}

########## Tcl recorder end at 06/16/06 23:39:29 ###########


########## Tcl recorder starts at 06/16/06 23:39:33 ##########

# Commands to make the Process: 
# Pre-Fit Equations
if [runCmd "\"$cpld_bin/blif2eqn\" gal_300f.tt2 -o gal_300f.eq3 -err automake.err"] {
	return
} else {
	vwait done
	if [checkResult $done] {
		return
	}
}

########## Tcl recorder end at 06/16/06 23:39:33 ###########


########## Tcl recorder starts at 06/16/06 23:39:36 ##########

# Commands to make the Process: 
# Post-Fit Equations
if [runCmd "\"$cpld_bin/blif2eqn\" gal_300f.tt3 -o gal_300f.eq4 -err automake.err"] {
	return
} else {
	vwait done
	if [checkResult $done] {
		return
	}
}

########## Tcl recorder end at 06/16/06 23:39:36 ###########


########## Tcl recorder starts at 06/16/06 23:39:40 ##########

# Commands to make the Process: 
# Create Fuse Map
if [runCmd "\"$cpld_bin/fuseasm\" gal_300f.tt3 -dev p16v8 -o gal_300f.jed -ivec noinput.tmv -rep gal_300f.rpt -doc brief -con ptblown -for brief -err automake.err "] {
	return
} else {
	vwait done
	if [checkResult $done] {
		return
	}
}
if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj gal_300f -if gal_300f.jed -j2s -log gal_300f.svl "] {
	return
} else {
	vwait done
	if [checkResult $done] {
		return
	}
}

########## Tcl recorder end at 06/16/06 23:39:40 ###########


########## Tcl recorder starts at 06/16/06 23:39:44 ##########

# Commands to make the Process: 
# Verilog Post-Route Simulation Model
if [runCmd "\"$cpld_bin/sch2tf\" -template \"$install_dir/ispcpld/generic/verilog/tfi.tft\" -prj gal_300f gal_300f.sch "] {
	return
} else {
	vwait done
	if [checkResult $done] {
		return
	}
}
if [runCmd "\"$cpld_bin/sch2tf\" -template \"$install_dir/ispcpld/pld/j2mod.tft\" -prj gal_300f -ext .btp gal_300f.sch "] {
	return
} else {
	vwait done
	if [checkResult $done] {
		return
	}
}
if [catch {open gal_300f.psl w} rspFile] {
	puts stderr "Cannot create response file gal_300f.psl: $rspFile"
} else {
	puts $rspFile "-dev p16v8 -part LAT GAL16V8Z-15QS GAL -o gal_300f.tim
"
	close $rspFile
}
if [runCmd "\"$cpld_bin/timsel\" @gal_300f.psl"] {
	return
} else {
	vwait done
	if [checkResult $done] {
		return
	}
}
file delete gal_300f.psl
if [catch {open gal_300f._sp w} rspFile] {
	puts stderr "Cannot create response file gal_300f._sp: $rspFile"
} else {
	puts $rspFile "#insert -- NOTE: Do not edit this file.
#insert -- auto generated by post-route verilog simulation models
#insert --
#unixpath
#unixpath $install_dir/ispcpld/pld/verilog
#libfile pldlib.v
#unixpath
#vlog \"$proj_dir/gal_300f.vt\"
#insert -- end
"
	close $rspFile
}
if [runCmd "\"$cpld_bin/chipsim\" \"gal_300f._sp\" \"gal_300f.vtl\" none"] {
	return
} else {
	vwait done
	if [checkResult $done] {
		return
	}
}
file delete gal_300f._sp
if [runCmd "\"$cpld_bin/j2vlog\" gal_300f.jed -dly custom gal_300f.tim -pldbus default gal_300f.btp -o gal_300f.vt -module gal_300f -suppress -err automake.err "] {
	return
} else {
	vwait done
	if [checkResult $done] {
		return
	}
}

########## Tcl recorder end at 06/16/06 23:39:44 ###########


########## Tcl recorder starts at 06/16/06 23:39:49 ##########

# Commands to make the Process: 
# VHDL Post-Route Simulation Model
if [catch {open gal_300f._sp w} rspFile] {
	puts stderr "Cannot create response file gal_300f._sp: $rspFile"
} else {
	puts $rspFile "#insert -- NOTE: Do not edit this file.
#insert -- auto generated by post-route vhdl simulation models
#insert --
#unixpath $proj_dir
#vcom gal_300f.vhq
"
	close $rspFile
}
if [runCmd "\"$cpld_bin/chipsim\" \"gal_300f._sp\" \"gal_300f.vtd\" none"] {
	return
} else {
	vwait done
	if [checkResult $done] {
		return
	}
}
file delete gal_300f._sp
if [runCmd "\"$cpld_bin/j2svhdl\" gal_300f.jed -dly custom gal_300f.tim max -pldbus default gal_300f.btp -o gal_300f.vhq -module gal_300f -suppress -err automake.err "] {
	return
} else {
	vwait done
	if [checkResult $done] {