rams.mif

这是一个FPGA的BCD码编码器设计.编译后可以下载到ALTEA的器件中仿真.

DEPTH = 16;	% Memory depth and width are required	%
WIDTH = 8;	    % Enter a decimal number	%

ADDRESS_RADIX = DEC;	% Address and value radixes are optional	%
DATA_RADIX    = HEX;	% Enter BIN, DEC, HEX, or OCT; unless 	%
		 	            % otherwise specified, radixes = HEX	%

-- Specify values for addresses, which can be single address or range

CONTENT
BEGIN
0 : 00; 	
1 : 01;
2 : 02;
3 : 03;
4 : 04;
5 : 05;
6 : 06;
7 : 07;
8 : 08;
9 : 09;
10: 0A;
11: 0B;
12: 0C;
13: 0D;
14: 0E;
15: 0F;


END ;