dian.vhd

来自「这是一个用VHDL语言编写的电梯控制程序」· VHDL 代码 · 共 53 行

library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_unsigned.all;
entity dian is
    port(clk,mode:in std_logic;
         sel:out std_logic_vector(3 downto 0);
         q:out std_logic_vector(0 to 15)
         );
end dian;
architecture dian_arc of dian is
begin
   process(clk)
   variable seel:std_logic_vector(3 downto 0);
   begin
      if(clk'event and clk='1')then
         seel:=seel+1;
         if(mode='0')then
            case seel is
                      when"0011"=>q<="0000110000000000";
                      when"0100"=>q<="0001100000000000";
                      when"0101"=>q<="0011000000000000";
                      when"0110"=>q<="0110000000000000";
                      when"0111"=>q<="1111111111111111";
                      when"1000"=>q<="1111111111111111";
                      when"1001"=>q<="0110000000000000";
                      when"1010"=>q<="0011000000000000";
                      when"1011"=>q<="0001100000000000";
                      when"1100"=>q<="0000110000000000";
                      when others=>q<="0000000000000000";
             end case;
           else
                case seel is
                      when"0011"=>q<="0000000000110000";
                      when"0100"=>q<="0000000000011000";
                      when"0101"=>q<="0000000000001100";
                      when"0110"=>q<="0000000000000110";
                      when"0111"=>q<="1111111111111111";
                      when"1000"=>q<="1111111111111111";
                      when"1001"=>q<="0000000000000110";
                      when"1010"=>q<="0000000000001100";
                      when"1011"=>q<="0000000000011000";
                      when"1100"=>q<="0000000000110000";
                      when others=>q<="0000000000000000";
                end case;
         end if;
      end if;
      sel<=seel;
   end process;
end dian_arc;